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* Add support for HiFive Unleashed -- the board with a multi-core RISC-V SoCRuslan Bukin2019-05-126-58/+116
* RISC-V ISA does not specify how to manage physical memory attributes (PMA).Ruslan Bukin2019-05-101-10/+0
* Remove IPSEC from GENERIC due to performance issuesAndrew Gallatin2019-05-091-1/+0
* Connect Xilinx AXI drivers and Cadence Ethernet MAC to the RISC-V build.Ruslan Bukin2019-05-081-0/+10
* tun/tap: merge and rename to `tuntap`Kyle Evans2019-05-081-1/+1
* Disable interrupts first and then set spinlock_count to 1.Ruslan Bukin2019-05-071-1/+3
* Provide a template for busdma code for RISC-V.Ruslan Bukin2019-05-076-35/+1737
* Deactivate IRQ resource by calling to intr_deactivate_irq().Ruslan Bukin2019-05-011-6/+10
* Implement pic_pre_ithread(), pic_post_ithread().Ruslan Bukin2019-04-241-0/+26
* RISC-V: initialize pcpu slightly earlierMitchell Horne2019-04-072-12/+11
* o Grab the number of devices supported by PLIC from FDT.Ruslan Bukin2019-04-021-6/+22
* Grab timer frequency from FDT.Ruslan Bukin2019-03-271-4/+32
* amd64 KPTI: add control from procctl(2).Konstantin Belousov2019-03-162-0/+12
* amd64: Add md process flags and first P_MD_PTI flag.Konstantin Belousov2019-03-161-0/+7
* Reorder copyright lines to preserve the source of "All rights reserved."Mark Johnston2019-03-061-1/+1
* Implement minidump support for RISC-V.Mark Johnston2019-03-063-11/+375
* Initialize dump_avail[] on riscv.Mark Johnston2019-03-051-1/+4
* Add pmap_get_tables() for riscv.Mark Johnston2019-03-051-0/+37
* Remove sv_pagesize, originally introduced with r100384.Edward Tomasz Napierala2019-03-011-1/+0
* Add kernel support for Intel userspace protection keys feature onKonstantin Belousov2019-02-201-0/+7
* Enable enabling ASLR on non-x86 architectures.Konstantin Belousov2019-02-141-1/+1
* Implement per-CPU pmap activation tracking for RISC-V.Mark Johnston2019-02-139-73/+100
* Implement pmap_clear_modify() for RISC-V.Mark Johnston2019-02-131-2/+80
* Implement transparent 2MB superpage promotion for RISC-V.Mark Johnston2019-02-135-238/+1238
* riscv: default to non-executable stackEd Maste2019-02-061-1/+1
* Follow arm[32] and sparc64 KAPI and provide the FreeBSD standard spellingDavid E. O'Brien2019-01-291-0/+2
* Remove a redundant test.Mark Johnston2019-01-281-1/+1
* Optimize RISC-V copyin(9)/copyout(9) routines.Mark Johnston2019-01-212-9/+44
* Deduplicate common code in copyin()/copyout() with a macro.Mark Johnston2019-01-211-27/+28
* Don't enable interrupts in init_secondary().Mark Johnston2019-01-041-4/+0
* Fix dirty bit handling in pmap_remove_write().Mark Johnston2019-01-041-6/+4
* Clear PGA_WRITEABLE in pmap_remove_pages().Mark Johnston2019-01-041-0/+3
* Fix a use-after-free in the riscv pmap_release() implementation.Mark Johnston2019-01-031-7/+3
* Synchronize access to the allpmaps list.Mark Johnston2019-01-031-1/+9
* Fix some issues with the riscv pmap_protect() implementation.Mark Johnston2019-01-031-16/+26
* Set PTE_U on PTEs created by pmap_enter_quick().Mark Johnston2019-01-031-13/+8
* Use regular stores to update PTEs in the riscv pmap layer.Mark Johnston2019-01-031-43/+30
* Configure hz=100 in the QEMU target.Mark Johnston2019-01-031-0/+1
* Remove iBCS2, part2: general kernelMateusz Guzik2018-12-192-3/+0
* Replace uses of sbadaddr with stval.Mark Johnston2018-12-195-15/+15
* Implement cpu_halt() for RISC-V.Mark Johnston2018-12-191-1/+3
* Add some more checking to the RISC-V page fault handler.Mark Johnston2018-12-141-18/+22
* Avoid needless TLB invalidations in pmap_remove_pages().Mark Johnston2018-12-141-5/+5
* Assume that pmap_l1() will return a PTE.Mark Johnston2018-12-141-2/+0
* Add a QEMU config for RISC-V.Mark Johnston2018-12-141-0/+9
* Enable witness(4) in the RISC-V GENERIC config.Mark Johnston2018-12-141-1/+1
* Clean up the riscv pmap_bootstrap() implementation.Mark Johnston2018-12-141-87/+29
* Remove an unused malloc(9) type.Mark Johnston2018-12-111-2/+0
* Use inline tests for individual PTE bits in the RISC-V pmap.Mark Johnston2018-12-111-51/+20
* Update the description of the address space layout on RISC-V.Mark Johnston2018-12-071-15/+14
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