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* Add new tunable 'net.link.ifqmaxlen' to set default send interfaceMaxim Sobolev2010-05-031-2/+2
* Consistently use capital letters.Pyun YongHyeon2010-04-091-2/+2
* Add preliminary support for 8168E/8111E PCIe controller.Pyun YongHyeon2010-04-091-0/+3
* Add initial support for RTL8103E PCIe fastethernet.Pyun YongHyeon2010-01-271-0/+1
* Add support for four more nfsmb controllers, shipping on at least theGavin Atkinson2010-01-241-0/+12
* Remove extraneous semicolons, no functional changes.Martin Blapp2010-01-071-1/+1
* intpm/sb700: force polling mode if configured interrupt is SMIAndriy Gapon2009-09-191-0/+6
* intpm: add support for smbus controller found in AMD SB700Andriy Gapon2009-09-122-13/+43
* Add RTL8168DP/RTL8111DP device id. While I'm here append "8111D" toPyun YongHyeon2009-08-241-0/+1
* Adding hardware ID for RTL810x PCIe found on HP Pavilion DV2-1022AX.Tai-hwa Liang2009-07-141-0/+1
* Use if_maddr_rlock()/if_maddr_runlock() rather than IF_ADDR_LOCK()/Robert Watson2009-06-261-2/+2
* When user_frac in the polling subsystem is low it is going to busy theAttilio Rao2009-05-301-10/+17
* For RTL8139C+ controllers, have controller handle padding shortPyun YongHyeon2009-04-201-0/+1
* intpm: minor enhancementsAndriy Gapon2009-03-161-8/+8
* The callback takes a void *, not a caddr_t * (sic).Warner Losh2009-03-031-2/+2
* Allocating 2 MSI messages do not seem to work on certain controllersPyun YongHyeon2009-02-111-1/+1
* Destroy TX tag outside of loop scope.Max Khon2009-02-091-1/+1
* - Add support for 8110SCe part. Some magic registers were taken fromJung-uk Kim2009-01-201-4/+4
* Retire RL_FLAG_INVMAR bit to match its comment and reality.Jung-uk Kim2009-01-201-1/+0
* Sometimes RTL8168B seems to take long time to access GMII registersPyun YongHyeon2009-01-191-0/+1
* Since we don't request reset for rlphy(4), the link state 'UP'Pyun YongHyeon2008-12-221-0/+2
* It seems that RealTek PCIe controllers require an explicit Tx pollPyun YongHyeon2008-12-171-0/+1
* For RTL8168C SPIN2 controllers, make sure to take the controllerPyun YongHyeon2008-12-171-0/+3
* By default assume a 8139 chip if the EEPROM contents prove inconclusive. TheWilko Bulte2008-12-151-3/+9
* Make WOL work on RTL8168B. This controller seems to requirePyun YongHyeon2008-12-111-0/+1
* Don't access undocumented register 0x82 on controllers thatPyun YongHyeon2008-12-111-0/+2
* Newer RealTek controllers requires setting stop request bit toPyun YongHyeon2008-12-111-0/+2
* o Implemented miibus_statchg handler. It detects whether re(4)Pyun YongHyeon2008-12-081-0/+1
* Update if_iqdrops instead of if_ierrors when m_devget(9) fails.Pyun YongHyeon2008-12-031-7/+4
* Add 8168D support.Pyun YongHyeon2008-12-021-0/+1
* Move mn over. One of the last stragglers in sys/pci. There's noWarner Losh2008-11-021-1450/+0
* Make RL_TWISTER_ENABLE a tunable/sysctl. Eliminate it as an option.Warner Losh2008-11-022-26/+33
* Fix a few typos/spelling errors in my comments from the last commit,Warner Losh2008-11-011-7/+7
* Add RL_TWISTER_ENABLE option. This enables the magic bits to do longWarner Losh2008-10-312-2/+165
* Implement miibus_statchg handler. It detects whether rl(4)Pyun YongHyeon2008-10-251-0/+34
* After sending stop command to MAC, give hardware chance to drainPyun YongHyeon2008-10-251-0/+8
* Make rl_init_locked() call rl_reset. This will put hardware intoPyun YongHyeon2008-10-251-7/+4
* Don't rearm watchdog timer in rl_txeof(). The watchdog timer wasPyun YongHyeon2008-10-251-2/+0
* Various bus_dma(9) fixes.Pyun YongHyeon2008-10-252-120/+256
* Move wb driver from sys/pci to sys/dev/wb.Warner Losh2008-08-142-2312/+0
* Move pcn driver from sys/pci to sys/dev/pcn.Warner Losh2008-08-142-2057/+0
* Move the ste driver from sys/pci to sys/dev/ste.Warner Losh2008-08-142-2302/+0
* Move the tl driver form sys/pci to sys/dev/tl.Warner Losh2008-08-142-2955/+0
* Move sis to sys/dev/sis for consistency.Warner Losh2008-08-102-2802/+0
* Move the xl driver form sys/pci to sys/dev/xl for consistency.Warner Losh2008-08-102-4112/+0
* Add locking to the various iicbus(4) bridge drivers:John Baldwin2008-08-041-0/+1
* The number of bits reserved for MSS in RealTek controllers isPyun YongHyeon2008-08-041-0/+8
* Set all of the "optimum performance" PHY registers for the 15D parts asJohn Baldwin2008-07-301-10/+8
* SIS_SETBIT() already does a read/modify/write operation, so there isn'tJohn Baldwin2008-07-301-2/+1
* Add driver support for RTL8102E and RTL8102EL which is the secondPyun YongHyeon2008-07-091-0/+2
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