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* vmm(4): Take steps towards multicore bhyve AMD supportConrad Meyer2019-01-162-37/+114
* Align IA32_ARCH_CAP MSR definitions and use with SDM rev. 068.Konstantin Belousov2018-11-161-1/+2
* Merge cases with upper block.Marcelo Araujo2018-10-311-4/+0
* Emulate machine check related MSR_EXTFEATURES to allow guest OSes toMarcelo Araujo2018-10-301-0/+5
* Provide basic descriptions for VMX exit reason (from "Intel 64 and IA-32Yuri Pankov2018-10-271-0/+8
* Reload the LDT selector after an AMD-v #VMEXIT.John Baldwin2018-10-151-0/+13
* bhyve: emulate CLFLUSH and CLFLUSHOPT.Konstantin Belousov2018-10-121-0/+40
* Fully restore the GDTR, IDTR, and LDTR after VT-x VM exits.John Baldwin2018-10-111-0/+22
* Handle a guest executing a vm instruction by trapping and raising anAndrew Turner2018-09-272-0/+17
* Update L1TF workaround to sustain L1D pollution from NMI.Konstantin Belousov2018-08-192-40/+40
* Provide part of the mitigation for L1TF-VMM.Konstantin Belousov2018-08-143-2/+57
* - Add the ability to run bhyve(8) within a jail(8).Marcelo Araujo2018-08-011-3/+41
* Add SPDX tags to vmm(4).Marcelo Araujo2018-06-1323-0/+46
* Cleanups related to debug exceptions on x86.John Baldwin2018-05-222-4/+6
* vmmdev: return EFAULT when trying to read beyond VM system memory max addressAntoine Brodin2018-05-152-5/+6
* Use PCI power-mgmt to reset a device if FLR fails.Peter Grehan2018-05-021-6/+26
* Correct undesirable interaction between caching of %cr4 in bhyve andKonstantin Belousov2018-04-241-1/+10
* Add SDT probes to vmexit on Intel.Tycho Nightingale2018-04-132-0/+111
* Add the ability to control the CPU topology of created VMsRodney W. Grimes2018-04-083-16/+75
* Add a way to temporarily suspend and resume virtual CPUs.John Baldwin2018-04-064-0/+94
* Fix a lock recursion introduced in r327065.Tycho Nightingale2018-03-071-4/+10
* Move the new AMD-Vi IVHD [ACPI_IVRS_HARDWARE_NEW]definitions added in r329360...Anish Gupta2018-03-052-35/+72
* Add a new variant of the GLA2GPA ioctl for use by the debug server.John Baldwin2018-02-262-17/+53
* Add two new ioctls to bhyve for batch register fetch/store operations.John Baldwin2018-02-221-0/+77
* move vintr_intercept_enabled under INVARIANTSAndriy Gapon2018-02-161-0/+2
* This change fixes duplicate detection of same IOMMU/AMD-Vi device for Ryzen w...Anish Gupta2018-02-163-93/+291
* Provide further mitigation against CVE-2017-5715 by flushing theTycho Nightingale2018-02-124-22/+101
* vmm/svm: post LAPIC interrupts using event injection, not virtual interruptsAndriy Gapon2018-01-311-76/+24
* Save and restore guest debug registers.John Baldwin2018-01-175-8/+193
* PTI for amd64.Konstantin Belousov2018-01-172-2/+5
* Provide some mitigation against CVE-2017-5715 by clearing registersTycho Nightingale2018-01-152-1/+29
* vmm/svm: contigmalloc of the whole svm_softc is excessiveAndriy Gapon2018-01-092-8/+21
* Fix a couple of comments in AMD Virtual Machine Control Block structureAndriy Gapon2018-01-051-2/+2
* Recognize a pending virtual interrupt while emulating the halt instruction.Tycho Nightingale2017-12-211-4/+24
* amd-vi: set iommu msi configuration using pci_enable_msi methodAndriy Gapon2017-12-041-56/+16
* vmm/amd: add ivhd device with a higher orderAndriy Gapon2017-12-041-1/+7
* amd-vi: clear event interrupt and overflow bits upon handling the interruptAndriy Gapon2017-12-041-0/+6
* sys/amd64: further adoption of SPDX licensing ID tags.Pedro F. Giffuni2017-11-2739-0/+78
* amd-vi: a small whitespace cleanupAndriy Gapon2017-11-241-2/+2
* amd-vi: use correct type for pci_rid, start_dev_rid, end_dev_rid sysctlsAndriy Gapon2017-11-241-9/+6
* amd-vi: small improvements to event printingAndriy Gapon2017-11-241-4/+4
* amd-vi: print some additional details for INVALID_DEVICE_REQUEST eventAndriy Gapon2017-11-241-2/+3
* amd-vi: fix up r326152, the new width requires a wider typeAndriy Gapon2017-11-241-1/+1
* amd-vi: fix and extend definition of Command and Event Status Register (0x2020)Andriy Gapon2017-11-241-2/+2
* vmm/amd: improve iteration over IVHD (type 10h) entries in IVRS tableAndriy Gapon2017-11-241-7/+19
* sys: further adoption of SPDX licensing ID tags.Pedro F. Giffuni2017-11-201-0/+2
* Emulate the "OR reg, r/m" instruction (opcode 0BH).Peter Grehan2017-11-011-1/+31
* Improve the performance of the hpet timer in bhyve guests by making theIan Lepore2017-10-291-1/+1
* Rework pass through changes in r305485 to be safer.John Baldwin2017-10-272-3/+14
* Save KGSBASE in pcb before overriding it with the guest value.Konstantin Belousov2017-08-241-1/+4
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