diff options
Diffstat (limited to 'sys/powerpc/aim')
| -rw-r--r-- | sys/powerpc/aim/clock.c | 40 | ||||
| -rw-r--r-- | sys/powerpc/aim/locore.S | 10 | ||||
| -rw-r--r-- | sys/powerpc/aim/machdep.c | 15 | ||||
| -rw-r--r-- | sys/powerpc/aim/mmu_oea.c | 82 | ||||
| -rw-r--r-- | sys/powerpc/aim/mp_cpudep.c | 231 | ||||
| -rw-r--r-- | sys/powerpc/aim/swtch.S | 14 | ||||
| -rw-r--r-- | sys/powerpc/aim/trap_subr.S | 71 | ||||
| -rw-r--r-- | sys/powerpc/aim/vm_machdep.c | 9 |
8 files changed, 387 insertions, 85 deletions
diff --git a/sys/powerpc/aim/clock.c b/sys/powerpc/aim/clock.c index 1911220dfbad..34c00c8da6f1 100644 --- a/sys/powerpc/aim/clock.c +++ b/sys/powerpc/aim/clock.c @@ -61,10 +61,11 @@ __FBSDID("$FreeBSD$"); #include <sys/param.h> #include <sys/systm.h> #include <sys/kernel.h> -#include <sys/sysctl.h> #include <sys/bus.h> -#include <sys/timetc.h> #include <sys/interrupt.h> +#include <sys/pcpu.h> +#include <sys/sysctl.h> +#include <sys/timetc.h> #include <dev/ofw/openfirm.h> @@ -76,11 +77,9 @@ __FBSDID("$FreeBSD$"); /* * Initially we assume a processor with a bus frequency of 12.5 MHz. */ -u_int tickspending; u_long ns_per_tick = 80; static u_long ticks_per_sec = 12500000; static long ticks_per_intr; -static volatile u_long lasttb; static timecounter_get_t decr_get_timecount; @@ -95,7 +94,6 @@ static struct timecounter decr_timecounter = { void decr_intr(struct trapframe *frame) { - u_long tb; long tick; int nticks; @@ -109,36 +107,17 @@ decr_intr(struct trapframe *frame) * Based on the actual time delay since the last decrementer reload, * we arrange for earlier interrupt next time. */ - __asm ("mftb %0; mfdec %1" : "=r"(tb), "=r"(tick)); + __asm ("mfdec %0" : "=r"(tick)); for (nticks = 0; tick < 0; nticks++) tick += ticks_per_intr; mtdec(tick); - /* - * lasttb is used during microtime. Set it to the virtual - * start of this tick interval. - */ - lasttb = tb + tick - ticks_per_intr; - nticks += tickspending; - tickspending = 0; - - /* - * Reenable interrupts - */ -#if 0 - msr = mfmsr(); - mtmsr(msr | PSL_EE | PSL_RI); -#endif - /* - * Do standard timer interrupt stuff. - * Do softclock stuff only on the last iteration. - */ -#if 0 - while (--nticks > 0) { - hardclock(TRAPF_USERMODE(frame), TRAPF_PC(frame)); + while (nticks-- > 0) { + if (PCPU_GET(cpuid) == 0) + hardclock(TRAPF_USERMODE(frame), TRAPF_PC(frame)); + else + hardclock_cpu(TRAPF_USERMODE(frame)); } -#endif - hardclock(TRAPF_USERMODE(frame), TRAPF_PC(frame)); } void @@ -166,7 +145,6 @@ decr_init(void) ns_per_tick = 1000000000 / ticks_per_sec; ticks_per_intr = ticks_per_sec / hz; - __asm __volatile ("mftb %0" : "=r"(lasttb)); mtdec(ticks_per_intr); mtmsr(msr); diff --git a/sys/powerpc/aim/locore.S b/sys/powerpc/aim/locore.S index 235e13a03273..ed5c7b87a560 100644 --- a/sys/powerpc/aim/locore.S +++ b/sys/powerpc/aim/locore.S @@ -77,20 +77,21 @@ .globl kernbase .set kernbase, KERNBASE +#define TMPSTKSZ 8192 /* 8K temporary stack */ + /* * Globals */ .data .align 4 GLOBAL(tmpstk) - .space 8192 + .space TMPSTKSZ GLOBAL(esym) .long 0 /* end of symbol table */ GLOBAL(ofmsr) .long 0, 0, 0, 0, 0 /* msr/sprg0-3 used in Open Firmware */ -#define INTSTK 16384 /* 16K interrupt stack */ #define INTRCNT_COUNT 256 /* max(HROWPIC_IRQMAX,OPENPIC_IRQMAX) */ GLOBAL(intrnames) .space INTRCNT_COUNT * (MAXCOMLEN + 1) * 2 @@ -152,9 +153,8 @@ __start: stw 5,openfirmware_entry@l(8) /* save client interface handler */ mr 3,5 - lis 1,tmpstk@ha - addi 1,1,tmpstk@l - addi 1,1,8192-16 + lis 1,(tmpstk+TMPSTKSZ-16)@ha + addi 1,1,(tmpstk+TMPSTKSZ-16)@l mfmsr 0 lis 9,ofmsr@ha diff --git a/sys/powerpc/aim/machdep.c b/sys/powerpc/aim/machdep.c index 15decb7999e4..6a6f407edad4 100644 --- a/sys/powerpc/aim/machdep.c +++ b/sys/powerpc/aim/machdep.c @@ -129,7 +129,8 @@ extern vm_offset_t ksym_start, ksym_end; int cold = 1; -static struct pcpu pcpu0; +struct pcpu __pcpu[MAXCPU]; + static struct trapframe frame0; char machine[] = "powerpc"; @@ -236,6 +237,9 @@ cpu_startup(void *dummy) extern char kernel_text[], _end[]; +#ifdef SMP +extern void *rstcode, *rstsize; +#endif extern void *trapcode, *trapsize; extern void *alitrap, *alisize; extern void *dsitrap, *dsisize; @@ -288,7 +292,7 @@ powerpc_init(u_int startkernel, u_int endkernel, u_int basekernel, void *mdp) /* * Set up per-cpu data. */ - pc = &pcpu0; + pc = __pcpu; pcpu_init(pc, 0, sizeof(struct pcpu)); pc->pc_curthread = &thread0; pc->pc_cpuid = 0; @@ -320,7 +324,11 @@ powerpc_init(u_int startkernel, u_int endkernel, u_int basekernel, void *mdp) */ mtmsr(mfmsr() & ~(PSL_IR | PSL_DR)); isync(); +#ifdef SMP + bcopy(&rstcode, (void *)EXC_RST, (size_t)&rstsize); +#else bcopy(&trapcode, (void *)EXC_RST, (size_t)&trapsize); +#endif bcopy(&trapcode, (void *)EXC_MCHK, (size_t)&trapsize); bcopy(&dsitrap, (void *)EXC_DSI, (size_t)&dsisize); bcopy(&trapcode, (void *)EXC_ISI, (size_t)&trapsize); @@ -337,8 +345,7 @@ powerpc_init(u_int startkernel, u_int endkernel, u_int basekernel, void *mdp) bcopy(&trapcode, (void *)EXC_THRM, (size_t)&trapsize); bcopy(&trapcode, (void *)EXC_BPT, (size_t)&trapsize); #ifdef KDB - bcopy(&dblow, (void *)EXC_RST, (size_t)&dbsize); - bcopy(&dblow, (void *)EXC_MCHK, (size_t)&dbsize); + bcopy(&dblow, (void *)EXC_MCHK, (size_t)&dbsize); bcopy(&dblow, (void *)EXC_PGM, (size_t)&dbsize); bcopy(&dblow, (void *)EXC_TRC, (size_t)&dbsize); bcopy(&dblow, (void *)EXC_BPT, (size_t)&dbsize); diff --git a/sys/powerpc/aim/mmu_oea.c b/sys/powerpc/aim/mmu_oea.c index d76fc2378828..d179b4081c21 100644 --- a/sys/powerpc/aim/mmu_oea.c +++ b/sys/powerpc/aim/mmu_oea.c @@ -147,6 +147,7 @@ __FBSDID("$FreeBSD$"); #include <machine/md_var.h> #include <machine/psl.h> #include <machine/pte.h> +#include <machine/smp.h> #include <machine/sr.h> #include <machine/mmuvar.h> @@ -203,8 +204,6 @@ static struct ofw_map *translations; extern struct pmap ofw_pmap; - - /* * Lock for the pteg and pvo tables. */ @@ -605,6 +604,59 @@ om_cmp(const void *a, const void *b) } void +pmap_cpu_bootstrap(volatile uint32_t *trcp, int ap) +{ + u_int sdr; + int i; + + trcp[0] = 0x1000; + trcp[1] = (uint32_t)&pmap_cpu_bootstrap; + + if (ap) { + __asm __volatile("mtdbatu 0,%0" :: "r"(battable[0].batu)); + __asm __volatile("mtdbatl 0,%0" :: "r"(battable[0].batl)); + isync(); + __asm __volatile("mtibatu 0,%0" :: "r"(battable[0].batu)); + __asm __volatile("mtibatl 0,%0" :: "r"(battable[0].batl)); + isync(); + } + + trcp[0] = 0x1001; + + for (i = 1; i < 4; i++) { + __asm __volatile("mtdbatu %0,%1" :: "n"(i), "r"(0)); + __asm __volatile("mtibatu %0,%1" :: "n"(i), "r"(0)); + isync(); + } + + trcp[0] = 0x1002; + + __asm __volatile("mtdbatu 1,%0" :: "r"(battable[8].batu)); + __asm __volatile("mtdbatl 1,%0" :: "r"(battable[8].batl)); + isync(); + + trcp[0] = 0x1003; + + for (i = 0; i < 16; i++) + mtsrin(i << ADDR_SR_SHFT, EMPTY_SEGMENT); + + trcp[0] = 0x1004; + + __asm __volatile("mtsr %0,%1" :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); + __asm __volatile("mtsr %0,%1" :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT)); + __asm __volatile("sync"); + + trcp[0] = 0x1005; + + sdr = (u_int)moea_pteg_table | (moea_pteg_mask >> 10); + __asm __volatile("mtsdr1 %0" :: "r"(sdr)); + isync(); + + trcp[0] = 0x1006; + trcp[1] = sdr; +} + +void moea_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend) { ihandle_t mmui; @@ -612,9 +664,9 @@ moea_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend) int sz; int i, j; int ofw_mappings; + uint32_t trace[2]; vm_size_t size, physsz, hwphyssz; vm_offset_t pa, va, off; - u_int batl, batu; /* * Set up BAT0 to map the lowest 256 MB area @@ -647,18 +699,15 @@ moea_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend) * Use an IBAT and a DBAT to map the bottom segment of memory * where we are. */ - batu = BATU(0x00000000, BAT_BL_256M, BAT_Vs); - batl = BATL(0x00000000, BAT_M, BAT_PP_RW); __asm (".balign 32; \n" "mtibatu 0,%0; mtibatl 0,%1; isync; \n" "mtdbatu 0,%0; mtdbatl 0,%1; isync" - :: "r"(batu), "r"(batl)); + :: "r"(battable[0].batu), "r"(battable[0].batl)); /* map pci space */ - batu = BATU(0x80000000, BAT_BL_256M, BAT_Vs); - batl = BATL(0x80000000, BAT_I|BAT_G, BAT_PP_RW); - __asm ("mtdbatu 1,%0; mtdbatl 1,%1; isync" - :: "r"(batu), "r"(batl)); + __asm __volatile("mtdbatu 1,%0" :: "r"(battable[8].batu)); + __asm __volatile("mtdbatl 1,%0" :: "r"(battable[8].batl)); + isync(); mem_regions(&pregions, &pregions_sz, ®ions, ®ions_sz); CTR0(KTR_PMAP, "moea_bootstrap: physical memory"); @@ -844,18 +893,7 @@ moea_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend) kernel_pmap->pm_sr[KERNEL2_SR] = KERNEL2_SEGMENT; kernel_pmap->pm_active = ~0; - /* - * Initialize hardware. - */ - for (i = 0; i < 16; i++) { - mtsrin(i << ADDR_SR_SHFT, EMPTY_SEGMENT); - } - __asm __volatile ("mtsr %0,%1" - :: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT)); - __asm __volatile ("mtsr %0,%1" - :: "n"(KERNEL2_SR), "r"(KERNEL2_SEGMENT)); - __asm __volatile ("sync; mtsdr1 %0; isync" - :: "r"((u_int)moea_pteg_table | (moea_pteg_mask >> 10))); + pmap_cpu_bootstrap(trace, 0); tlbia(); pmap_bootstrapped++; diff --git a/sys/powerpc/aim/mp_cpudep.c b/sys/powerpc/aim/mp_cpudep.c new file mode 100644 index 000000000000..5b867dd6ab3b --- /dev/null +++ b/sys/powerpc/aim/mp_cpudep.c @@ -0,0 +1,231 @@ +/*- + * Copyright (c) 2008 Marcel Moolenaar + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT + * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF + * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include <sys/cdefs.h> +__FBSDID("$FreeBSD$"); + +#include <sys/param.h> +#include <sys/systm.h> +#include <sys/kernel.h> +#include <sys/bus.h> +#include <sys/pcpu.h> +#include <sys/proc.h> +#include <sys/smp.h> + +#include <machine/bat.h> +#include <machine/bus.h> +#include <machine/cpu.h> +#include <machine/hid.h> +#include <machine/intr_machdep.h> +#include <machine/pcb.h> +#include <machine/psl.h> +#include <machine/smp.h> +#include <machine/spr.h> +#include <machine/trap_aim.h> + +#include <dev/ofw/openfirm.h> +#include <machine/ofw_machdep.h> + +extern void *rstcode; + +void *ap_pcpu; + +static int +powerpc_smp_fill_cpuref(struct cpuref *cpuref, phandle_t cpu) +{ + int cpuid, res; + + cpuref->cr_hwref = cpu; + res = OF_getprop(cpu, "reg", &cpuid, sizeof(cpuid)); + if (res < 0) + return (ENOENT); + + cpuref->cr_cpuid = cpuid & 0xff; + return (0); +} + +int +powerpc_smp_first_cpu(struct cpuref *cpuref) +{ + char buf[8]; + phandle_t cpu, dev, root; + int res; + + root = OF_peer(0); + + dev = OF_child(root); + while (dev != 0) { + res = OF_getprop(dev, "name", buf, sizeof(buf)); + if (res > 0 && strcmp(buf, "cpus") == 0) + break; + dev = OF_peer(dev); + } + if (dev == 0) + return (ENOENT); + + cpu = OF_child(dev); + while (cpu != 0) { + res = OF_getprop(cpu, "device_type", buf, sizeof(buf)); + if (res > 0 && strcmp(buf, "cpu") == 0) + break; + cpu = OF_peer(cpu); + } + if (cpu == 0) + return (ENOENT); + + return (powerpc_smp_fill_cpuref(cpuref, cpu)); +} + +int +powerpc_smp_next_cpu(struct cpuref *cpuref) +{ + char buf[8]; + phandle_t cpu; + int res; + + cpu = OF_peer(cpuref->cr_hwref); + while (cpu != 0) { + res = OF_getprop(cpu, "device_type", buf, sizeof(buf)); + if (res > 0 && strcmp(buf, "cpu") == 0) + break; + cpu = OF_peer(cpu); + } + if (cpu == 0) + return (ENOENT); + + return (powerpc_smp_fill_cpuref(cpuref, cpu)); +} + +int +powerpc_smp_get_bsp(struct cpuref *cpuref) +{ + ihandle_t inst; + phandle_t bsp, chosen; + int res; + + chosen = OF_finddevice("/chosen"); + if (chosen == 0) + return (ENXIO); + + res = OF_getprop(chosen, "cpu", &inst, sizeof(inst)); + if (res < 0) + return (ENXIO); + + bsp = OF_instance_to_package(inst); + return (powerpc_smp_fill_cpuref(cpuref, bsp)); +} + +uint32_t +cpudep_ap_bootstrap(volatile uint32_t *trcp) +{ + uint32_t hid, msr, sp; + + trcp[0] = 0x2000; + trcp[1] = (uint32_t)&cpudep_ap_bootstrap; + + __asm __volatile("mtsprg 0, %0" :: "r"(ap_pcpu)); + __asm __volatile("sync"); + + trcp[0] = 0x2001; + trcp[1] = (uint32_t)pcpup; + + hid = mfspr(SPR_HID0); + hid &= ~(HID0_ICE | HID0_DCE); + hid &= ~(HID0_DOZE | HID0_NAP | HID0_SLEEP); + mtspr(SPR_HID0, hid); + isync(); + + trcp[0] = 0x2002; + trcp[1] = hid; + + hid |= HID0_ICFI | HID0_DCFI; + hid |= HID0_ICE | HID0_DCE; + mtspr(SPR_HID0, hid); + isync(); + + trcp[0] = 0x2003; + trcp[1] = hid; + + msr = PSL_IR | PSL_DR | PSL_ME; + mtmsr(msr); + isync(); + + trcp[0] = 0x2004; + trcp[1] = msr; + + hid |= HID0_NAP | HID0_DPM; + mtspr(SPR_HID0, hid); + isync(); + + trcp[0] = 0x2005; + trcp[1] = hid; + + pcpup->pc_curthread = pcpup->pc_idlethread; + pcpup->pc_curpcb = pcpup->pc_curthread->td_pcb; + sp = pcpup->pc_curpcb->pcb_sp; + + trcp[0] = 0x2006; + trcp[1] = sp; + + return (sp); +} + +int +powerpc_smp_start_cpu(struct pcpu *pc) +{ + phandle_t cpu; + volatile uint32_t *trcp; + volatile uint8_t *rstvec; + uint32_t trace; + int res, reset, timeout; + + cpu = pc->pc_hwref; + res = OF_getprop(cpu, "soft-reset", &reset, sizeof(reset)); + if (res < 0) + return (ENXIO); + + trcp = (uint32_t *)(EXC_RST + 4); + trace = *trcp; + + ap_pcpu = pc; + + rstvec = (uint8_t *)(0x80000000 + reset); + + *rstvec = 4; + __asm __volatile("sync"); + DELAY(1); + *rstvec = 0; + __asm __volatile("sync"); + + timeout = 1000; + while (!pc->pc_awake && timeout--) + DELAY(100); + + if (!pc->pc_awake) + printf("XXX: timeout (trace=%x; data=%x)\n", trcp[0], trcp[1]); + + return (0); +} diff --git a/sys/powerpc/aim/swtch.S b/sys/powerpc/aim/swtch.S index 70b5b4f082d2..0d6875d836ab 100644 --- a/sys/powerpc/aim/swtch.S +++ b/sys/powerpc/aim/swtch.S @@ -67,6 +67,13 @@ #include <machine/asm.h> /* + * void cpu_throw(struct thread *old, struct thread *new) + */ +ENTRY(cpu_throw) + mr %r15, %r4 + b cpu_switchin + +/* * void cpu_switch(struct thread *old, * struct thread *new, * struct mutex *mtx); @@ -94,7 +101,8 @@ ENTRY(cpu_switch) mr %r14,%r3 /* Copy the old thread ptr... */ mr %r15,%r4 /* and the new thread ptr in scratch */ - lwz %r6,PCB_FLAGS(%r5) /* Save FPU context if needed */ + lwz %r6,PCB_FLAGS(%r5) + /* Save FPU context if needed */ andi. %r6, %r6, PCB_FPU beq .L1 bl save_fpu @@ -102,6 +110,7 @@ ENTRY(cpu_switch) .L1: bl pmap_deactivate /* Deactivate the current pmap */ +cpu_switchin: mr %r3,%r15 /* Get new thread ptr */ bl pmap_activate /* Activate the new address space */ @@ -110,7 +119,8 @@ ENTRY(cpu_switch) lwz %r17,TD_PCB(%r15) /* Store new current PCB */ stw %r17,PC_CURPCB(%r7) - lwz %r6, PCB_FLAGS(%r17) /* Restore FPU context if needed */ + lwz %r6, PCB_FLAGS(%r17) + /* Restore FPU context if needed */ andi. %r6, %r6, PCB_FPU beq .L2 mr %r3,%r15 /* Pass curthread to enable_fpu */ diff --git a/sys/powerpc/aim/trap_subr.S b/sys/powerpc/aim/trap_subr.S index 03fb7ec79830..2c0e78f86cb3 100644 --- a/sys/powerpc/aim/trap_subr.S +++ b/sys/powerpc/aim/trap_subr.S @@ -228,20 +228,67 @@ mfsprg2 %r2; /* restore r2 & r3 */ \ mfsprg3 %r3 -#ifdef KDB +#ifdef SMP /* - * Define the kdb debugger stack + * Processor reset exception handler. These are typically + * the first instructions the processor executes after a + * software reset. */ - .data -GLOBAL(dbstk) - .space INTSTK+8 /* kdb stack */ + .globl CNAME(rstcode), CNAME(rstsize) +CNAME(rstcode): + bl 1f + + /* We use this space for tracing purposes. */ + .long 0 + .long 0 + +1: + mflr %r2 + mfmsr %r3 + stw %r2,0(%r2) /* trace: 0x104 - we're here. */ + stw %r3,4(%r2) /* trace data: MSR */ + sync + + lis %r1,(tmpstk+TMPSTKSZ-16)@ha + addi %r1,%r1,(tmpstk+TMPSTKSZ-16)@l + + addi %r3,%r2,4 + stw %r3,0(%r1) + sync + stw %r3,0(%r2) /* trace: 0x108 - stack is writable */ + stw %r1,4(%r2) /* trace data: SP */ + sync + + mr %r3,%r2 + lis %r4,1@l + bla CNAME(pmap_cpu_bootstrap) + + addi %r3,%r2,8 + stw %r3,0(%r2) /* trace 0x10c - back from 1st call */ + sync + + mr %r3,%r2 + bla CNAME(cpudep_ap_bootstrap) + mr %r1,%r3 + + addi %r3,%r2,12 + stw %r3,0(%r2) /* trace 0x110 - back from 2nd call */ + stw %r1,4(%r2) /* trace data: SP */ + + mr %r3,%r2 + bla CNAME(machdep_ap_bootstrap) + + /* Should not be reached */ +9: + b 9b +CNAME(rstsize) = . - CNAME(rstcode) #endif /* * This code gets copied to all the trap vectors * (except ISI/DSI, ALI, and the interrupts) */ - .text + .globl CNAME(trapcode),CNAME(trapsize) CNAME(trapcode): mtsprg1 %r1 /* save SP */ @@ -385,8 +432,8 @@ disitrap: stw %r30,(PC_DBSAVE +CPUSAVE_R30)(%r1) /* save r30 */ lwz %r31,(PC_DISISAVE+CPUSAVE_R31)(%r1) /* get r31 */ stw %r31,(PC_DBSAVE +CPUSAVE_R31)(%r1) /* save r31 */ - lis %r1,dbstk+INTSTK@ha /* get new SP */ - addi %r1,%r1,dbstk+INTSTK@l + lis %r1,(tmpstk+TMPSTKSZ-16)@ha /* get new SP */ + addi %r1,%r1,(tmpstk+TMPSTKSZ-16)@l b dbtrap #endif @@ -457,8 +504,8 @@ CNAME(vectrapsize) = .-CNAME(vectrap) /* * Deliberate entry to dbtrap */ - .globl CNAME(ppc_db_trap) -CNAME(ppc_db_trap): + .globl CNAME(breakpoint) +CNAME(breakpoint): mtsprg1 %r1 mfmsr %r3 mtsrr1 %r3 @@ -533,8 +580,8 @@ CNAME(dblow): stw %r30,(PC_DBSAVE+CPUSAVE_R30)(%r1) /* free r30 */ stw %r31,(PC_DBSAVE+CPUSAVE_R31)(%r1) /* free r31 */ mflr %r28 /* save LR */ - lis %r1,dbstk+INTSTK@ha /* get new SP */ - addi %r1,%r1,dbstk+INTSTK@l + lis %r1,(tmpstk+TMPSTKSZ-16)@ha /* get new SP */ + addi %r1,%r1,(tmpstk+TMPSTKSZ-16)@l bla dbtrap CNAME(dbsize) = .-CNAME(dblow) #endif /* KDB */ diff --git a/sys/powerpc/aim/vm_machdep.c b/sys/powerpc/aim/vm_machdep.c index 5bd1e2b6815c..33b3382bd449 100644 --- a/sys/powerpc/aim/vm_machdep.c +++ b/sys/powerpc/aim/vm_machdep.c @@ -192,15 +192,6 @@ cpu_exit(td) { } -/* Temporary helper */ -void -cpu_throw(struct thread *old, struct thread *new) -{ - - cpu_switch(old, new, old->td_lock); - panic("cpu_throw() didn't"); -} - /* * Reset back to firmware. */ |