aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/M68k/M68kRegisterInfo.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/lib/Target/M68k/M68kRegisterInfo.cpp')
-rw-r--r--llvm/lib/Target/M68k/M68kRegisterInfo.cpp12
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/M68k/M68kRegisterInfo.cpp b/llvm/lib/Target/M68k/M68kRegisterInfo.cpp
index d12705bc935c..62fb72ba4fd5 100644
--- a/llvm/lib/Target/M68k/M68kRegisterInfo.cpp
+++ b/llvm/lib/Target/M68k/M68kRegisterInfo.cpp
@@ -75,9 +75,9 @@ M68kRegisterInfo::getRegsForTailCall(const MachineFunction &MF) const {
unsigned
M68kRegisterInfo::getMatchingMegaReg(unsigned Reg,
const TargetRegisterClass *RC) const {
- for (MCSuperRegIterator Super(Reg, this); Super.isValid(); ++Super)
- if (RC->contains(*Super))
- return *Super;
+ for (MCPhysReg Super : superregs(Reg))
+ if (RC->contains(Super))
+ return Super;
return 0;
}
@@ -129,8 +129,8 @@ BitVector M68kRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
for (MCRegAliasIterator I(Reg, this, /* self */ true); I.isValid(); ++I) {
Reserved.set(*I);
}
- for (MCSubRegIterator I(Reg, this, /* self */ true); I.isValid(); ++I) {
- Reserved.set(*I);
+ for (MCPhysReg I : subregs_inclusive(Reg)) {
+ Reserved.set(I);
}
};
@@ -213,7 +213,7 @@ bool M68kRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
bool M68kRegisterInfo::requiresRegisterScavenging(
const MachineFunction &MF) const {
- return true;
+ return false;
}
bool M68kRegisterInfo::trackLivenessAfterRegAlloc(