diff options
Diffstat (limited to 'gnu/usr.bin/cc/cc_int')
46 files changed, 1290 insertions, 1290 deletions
diff --git a/gnu/usr.bin/cc/cc_int/aux-output.c b/gnu/usr.bin/cc/cc_int/aux-output.c index 17dd9db740ec..d828f4eb55f4 100644 --- a/gnu/usr.bin/cc/cc_int/aux-output.c +++ b/gnu/usr.bin/cc/cc_int/aux-output.c @@ -66,7 +66,7 @@ enum reg_class regclass_map[FIRST_PSEUDO_REGISTER] = SIREG, DIREG, INDEX_REGS, GENERAL_REGS, /* FP registers */ FP_TOP_REG, FP_SECOND_REG, FLOAT_REGS, FLOAT_REGS, - FLOAT_REGS, FLOAT_REGS, FLOAT_REGS, FLOAT_REGS, + FLOAT_REGS, FLOAT_REGS, FLOAT_REGS, FLOAT_REGS, /* arg pointer */ INDEX_REGS }; @@ -528,7 +528,7 @@ output_move_double (operands) middlehalf[0] = operands[0]; latehalf[0] = operands[0]; } - + if (optype1 == REGOP) { middlehalf[1] = gen_rtx (REG, SImode, REGNO (operands[1]) + 1); @@ -2084,7 +2084,7 @@ print_operand (file, x, code) REAL_VALUE_TO_DECIMAL (r, "%.22e", dstr); fprintf (file, "%s", dstr); } - else + else { if (code != 'P') { diff --git a/gnu/usr.bin/cc/cc_int/bc-emit.c b/gnu/usr.bin/cc/cc_int/bc-emit.c index c8d50bb7ebc2..296fdd98aec8 100644 --- a/gnu/usr.bin/cc/cc_int/bc-emit.c +++ b/gnu/usr.bin/cc/cc_int/bc-emit.c @@ -971,7 +971,7 @@ bc_emit_trampoline (callinfo) static int n; sprintf (mylab, "*LB%d", n++); - + BC_EMIT_TRAMPOLINE (trampoline, callinfo); seg_defsym (bytecode, mylab); diff --git a/gnu/usr.bin/cc/cc_int/bc-optab.c b/gnu/usr.bin/cc/cc_int/bc-optab.c index b8ac57da9dba..447e32c04059 100644 --- a/gnu/usr.bin/cc/cc_int/bc-optab.c +++ b/gnu/usr.bin/cc/cc_int/bc-optab.c @@ -634,7 +634,7 @@ bc_init_mode_to_code_map () for (mode = 0; mode < MAX_MACHINE_MODE + 1; mode++) { - signed_mode_to_code_map[mode] = + signed_mode_to_code_map[mode] = unsigned_mode_to_code_map[mode] = LAST_AND_UNUSED_TYPECODE; } @@ -699,7 +699,7 @@ bc_expand_binary_operation (optab, resulttype, arg0, arg1) { int i, besti, cost, bestcost; enum typecode resultcode, arg0code, arg1code; - + resultcode = preferred_typecode (TYPE_MODE (resulttype), TREE_UNSIGNED (resulttype)); arg0code = preferred_typecode (TYPE_MODE (TREE_TYPE (arg0)), TREE_UNSIGNED (resulttype)); arg1code = preferred_typecode (TYPE_MODE (TREE_TYPE (arg1)), TREE_UNSIGNED (resulttype)); @@ -740,7 +740,7 @@ bc_expand_unary_operation (optab, resulttype, arg0) { int i, besti, cost, bestcost; enum typecode resultcode, arg0code; - + resultcode = preferred_typecode (TYPE_MODE (resulttype), TREE_UNSIGNED (resulttype)); arg0code = preferred_typecode (TYPE_MODE (TREE_TYPE (arg0)), TREE_UNSIGNED (TREE_TYPE (arg0))); diff --git a/gnu/usr.bin/cc/cc_int/c-common.c b/gnu/usr.bin/cc/cc_int/c-common.c index f3844e2286a4..563c171b7235 100644 --- a/gnu/usr.bin/cc/cc_int/c-common.c +++ b/gnu/usr.bin/cc/cc_int/c-common.c @@ -174,7 +174,7 @@ combine_strings (strings) wide_flag = 1; } - /* Compute the number of elements, for the array type. */ + /* Compute the number of elements, for the array type. */ nchars = wide_flag ? length / wchar_bytes : length; /* Create the array type for the string constant. @@ -235,7 +235,7 @@ decl_attributes (decl, attributes) TREE_THIS_VOLATILE (decl) = 1; else if (TREE_CODE (type) == POINTER_TYPE && TREE_CODE (TREE_TYPE (type)) == FUNCTION_TYPE) - TREE_TYPE (decl) = type + TREE_TYPE (decl) = type = build_pointer_type (build_type_variant (TREE_TYPE (type), TREE_READONLY (TREE_TYPE (type)), 1)); @@ -275,7 +275,7 @@ decl_attributes (decl, attributes) { #ifdef VALID_MACHINE_ATTRIBUTE if (VALID_MACHINE_ATTRIBUTE (type, new_attr, name)) - { + { register tree atlist; for (atlist = new_attr; atlist; atlist = TREE_CHAIN (atlist)) @@ -369,7 +369,7 @@ found_attr:; } align = TREE_INT_CST_LOW (align_expr) * BITS_PER_UNIT; - + if (exact_log2 (align) == -1) error_with_decl (decl, "requested alignment of `%s' is not a power of 2"); @@ -395,14 +395,14 @@ found_attr:; int is_scan; tree argument; int arg_num; - + if (TREE_CODE (decl) != FUNCTION_DECL) { error_with_decl (decl, "argument format specified for non-function `%s'"); continue; } - + if (!strcmp (IDENTIFIER_POINTER (format_type), "printf") || !strcmp (IDENTIFIER_POINTER (format_type), "__printf__")) is_scan = 0; @@ -414,7 +414,7 @@ found_attr:; error_with_decl (decl, "unrecognized format specifier for `%s'"); continue; } - + /* Strip any conversions from the string index and first arg number and verify they are constants. */ while (TREE_CODE (format_num_expr) == NOP_EXPR @@ -548,7 +548,7 @@ static format_char_info print_char_table[] = { static format_char_info scan_char_table[] = { { "di", 1, T_I, T_S, T_L, T_LL, T_LL, "*" }, - { "ouxX", 1, T_UI, T_US, T_UL, T_ULL, T_ULL, "*" }, + { "ouxX", 1, T_UI, T_US, T_UL, T_ULL, T_ULL, "*" }, { "efgEG", 1, T_F, NULL, T_D, NULL, T_LD, "*" }, { "sc", 1, T_C, NULL, T_W, NULL, NULL, "*a" }, { "[", 1, T_C, NULL, NULL, NULL, NULL, "*a" }, @@ -812,7 +812,7 @@ check_format_info (info, params) flag_chars[i++] = *format_chars++; flag_chars[i] = 0; } - /* "If the space and + flags both appear, + /* "If the space and + flags both appear, the space flag will be ignored." */ if (index (flag_chars, ' ') != 0 && index (flag_chars, '+') != 0) @@ -1084,7 +1084,7 @@ check_format_info (info, params) { register char *this; register char *that; - + this = IDENTIFIER_POINTER (DECL_NAME (TYPE_NAME (wanted_type))); that = 0; if (TREE_CODE (cur_type) != ERROR_MARK @@ -1898,7 +1898,7 @@ truthvalue_conversion (expr) truthvalue_conversion (TREE_OPERAND (expr, 0))); else return truthvalue_conversion (TREE_OPERAND (expr, 0)); - + case COND_EXPR: /* Distribute the conversion into the arms of a COND_EXPR. */ return fold (build (COND_EXPR, integer_type_node, TREE_OPERAND (expr, 0), diff --git a/gnu/usr.bin/cc/cc_int/caller-save.c b/gnu/usr.bin/cc/cc_int/caller-save.c index 5b096066833e..bcfe3c85d6f5 100644 --- a/gnu/usr.bin/cc/cc_int/caller-save.c +++ b/gnu/usr.bin/cc/cc_int/caller-save.c @@ -41,13 +41,13 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ register because it is live we first try to save in multi-register modes. If that is not possible the save is done one register at a time. */ -static enum machine_mode +static enum machine_mode regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MAX_UNITS_PER_WORD + 1]; /* For each hard register, a place on the stack where it can be saved, if needed. */ -static rtx +static rtx regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MAX_UNITS_PER_WORD + 1]; /* We will only make a register eligible for caller-save if it can be @@ -56,9 +56,9 @@ static rtx when we emit them, the addresses might not be valid, so they might not be recognized. */ -static enum insn_code +static enum insn_code reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MAX_UNITS_PER_WORD + 1]; -static enum insn_code +static enum insn_code reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MAX_UNITS_PER_WORD + 1]; /* Set of hard regs currently live (during scan of all insns). */ @@ -88,7 +88,7 @@ static int insert_save_restore PROTO((rtx, int, int, Look at all the hard registers that are used by a call and for which regclass.c has not already excluded from being used across a call. - Ensure that we can find a mode to save the register and that there is a + Ensure that we can find a mode to save the register and that there is a simple insn to save and restore the register. This latter check avoids problems that would occur if we tried to save the MQ register of some machines directly into memory. */ @@ -230,18 +230,18 @@ init_save_areas () We assume that our caller has set up the elimination table to the worst (largest) possible offsets. - Set *PCHANGED to 1 if we had to allocate some memory for the save area. + Set *PCHANGED to 1 if we had to allocate some memory for the save area. Future work: In the fallback case we should iterate backwards across all possible - modes for the save, choosing the largest available one instead of + modes for the save, choosing the largest available one instead of falling back to the smallest mode immediately. (eg TF -> DF -> SF). We do not try to use "move multiple" instructions that exist - on some machines (such as the 68k moveml). It could be a win to try + on some machines (such as the 68k moveml). It could be a win to try and use them when possible. The hard part is doing it in a way that is - machine independent since they might be saving non-consecutive + machine independent since they might be saving non-consecutive registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */ int @@ -263,13 +263,13 @@ setup_save_areas (pchanged) if (reg_renumber[i] >= 0 && reg_n_calls_crossed[i] > 0) { int regno = reg_renumber[i]; - int endregno + int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (regno_reg_rtx[i])); int nregs = endregno - regno; for (j = 0; j < nregs; j++) { - if (call_used_regs[regno+j]) + if (call_used_regs[regno+j]) SET_HARD_REG_BIT (hard_regs_used, regno+j); } } @@ -319,10 +319,10 @@ setup_save_areas (pchanged) { /* This should not depend on WORDS_BIG_ENDIAN. The order of words in regs is the same as in memory. */ - rtx temp = gen_rtx (MEM, regno_save_mode[i+k][1], + rtx temp = gen_rtx (MEM, regno_save_mode[i+k][1], XEXP (regno_save_mem[i][j], 0)); - regno_save_mem[i+k][1] + regno_save_mem[i+k][1] = adj_offsettable_operand (temp, k * UNITS_PER_WORD); } *pchanged = 1; @@ -425,7 +425,7 @@ save_call_clobbered_regs (insn_mode) test at this point because registers that die in a CALL_INSN are not live across the call and likewise for registers that are born in the CALL_INSN. - + If registers are filled with parameters for this function, and some of these are also being set by this function, then they will not appear to die (no REG_DEAD note for them), @@ -457,7 +457,7 @@ save_call_clobbered_regs (insn_mode) /* It must not be set by this instruction. */ && ! TEST_HARD_REG_BIT (this_call_sets, regno) && ! TEST_HARD_REG_BIT (hard_regs_saved, regno)) - regno += insert_save_restore (insn, 1, regno, + regno += insert_save_restore (insn, 1, regno, insn_mode, 0); /* Put the information for this CALL_INSN on top of what @@ -555,7 +555,7 @@ clear_reg_live (reg) CLEAR_HARD_REG_BIT (hard_regs_need_restore, i); CLEAR_HARD_REG_BIT (hard_regs_saved, i); } -} +} /* If any register currently residing in the save area is referenced in X, which is part of INSN, emit code to restore the register in front of INSN. @@ -608,7 +608,7 @@ restore_referenced_regs (x, insn, insn_mode) return; } - + fmt = GET_RTX_FORMAT (code); for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) { @@ -674,7 +674,7 @@ insert_save_restore (insn, save_p, regno, insn_mode, maxrestore) int i, j, k; int ok; - /* See if we can save several registers with a single instruction. + /* See if we can save several registers with a single instruction. Work backwards to the single register case. */ for (i = MOVE_MAX / UNITS_PER_WORD; i > 0; i--) { @@ -687,7 +687,7 @@ insert_save_restore (insn, save_p, regno, insn_mode, maxrestore) || TEST_HARD_REG_BIT (hard_regs_saved, regno + j)) ok = 0; } - else + else continue; /* Must do this one save at a time */ @@ -732,10 +732,10 @@ insert_save_restore (insn, save_p, regno, insn_mode, maxrestore) /* Must do this one restore at a time */ if (! ok) continue; - + pat = gen_rtx (SET, VOIDmode, - gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]), - regno), + gen_rtx (REG, GET_MODE (regno_save_mem[regno][i]), + regno), regno_save_mem[regno][i]); code = reg_restore_code[regno][i]; diff --git a/gnu/usr.bin/cc/cc_int/calls.c b/gnu/usr.bin/cc/cc_int/calls.c index b168e85c3eb5..f567982599c8 100644 --- a/gnu/usr.bin/cc/cc_int/calls.c +++ b/gnu/usr.bin/cc/cc_int/calls.c @@ -527,7 +527,7 @@ expand_call (exp, target, ignore) /* Nonzero if this is an indirect function call. */ int current_call_is_indirect = 0; - /* Nonzero if we must avoid push-insns in the args for this call. + /* Nonzero if we must avoid push-insns in the args for this call. If stack space is allocated for register parameters, but not by the caller, then it is preallocated in the fixed part of the stack frame. So the entire argument block must then be preallocated (i.e., we @@ -622,7 +622,7 @@ expand_call (exp, target, ignore) } } - /* If we don't have specific function to call, see if we have a + /* If we don't have specific function to call, see if we have a constant or `noreturn' function from the type. */ if (fndecl == 0) { @@ -1137,7 +1137,7 @@ expand_call (exp, target, ignore) / (PARM_BOUNDARY / BITS_PER_UNIT) * (PARM_BOUNDARY / BITS_PER_UNIT)); #endif - + /* Update ARGS_SIZE, the total stack space for args so far. */ args_size.constant += args[i].size.constant; @@ -1169,7 +1169,7 @@ expand_call (exp, target, ignore) reg_parm_stack_space = FINAL_REG_PARM_STACK_SPACE (args_size.constant, args_size.var); #endif - + /* Compute the actual size of the argument block required. The variable and constant sizes must be combined, the size may have to be rounded, and there may be a minimum required size. */ @@ -1316,7 +1316,7 @@ expand_call (exp, target, ignore) if (TYPE_MODE (TREE_TYPE (args[i].tree_value)) != args[i].mode) args[i].value - = convert_modes (args[i].mode, + = convert_modes (args[i].mode, TYPE_MODE (TREE_TYPE (args[i].tree_value)), args[i].value, args[i].unsignedp); @@ -1379,7 +1379,7 @@ expand_call (exp, target, ignore) Therefore, we save any area of the stack that was already written and that we are using. Here we set up to do this by making a new stack usage map from the old one. The actual save will be done - by store_one_arg. + by store_one_arg. Another approach might be to try to reorder the argument evaluations to avoid this conflicting stack usage. */ @@ -1490,7 +1490,7 @@ expand_call (exp, target, ignore) /* If we preallocated stack space, compute the address of each argument. - We need not ensure it is a valid memory address here; it will be + We need not ensure it is a valid memory address here; it will be validized when it is used. */ if (argblock) { @@ -1529,7 +1529,7 @@ expand_call (exp, target, ignore) args[i].stack_slot = gen_rtx (MEM, args[i].mode, addr); } } - + #ifdef PUSH_ARGS_REVERSED #ifdef STACK_BOUNDARY /* If we push args individually in reverse order, perform stack alignment @@ -1610,7 +1610,7 @@ expand_call (exp, target, ignore) TYPE_MODE (TREE_TYPE (args[i].tree_value)), args[i].value, args[i].unsignedp); - /* If the value is expensive, and we are inside an appropriately + /* If the value is expensive, and we are inside an appropriately short loop, put the value into a pseudo and then put the pseudo into the hard reg. @@ -1669,7 +1669,7 @@ expand_call (exp, target, ignore) stack_area = gen_rtx (MEM, save_mode, memory_address (save_mode, - + #ifdef ARGS_GROW_DOWNWARD plus_constant (argblock, - high_to_save) @@ -1692,7 +1692,7 @@ expand_call (exp, target, ignore) } } #endif - + /* Now store (and compute if necessary) all non-register parms. These come before register parms, since they can require block-moves, @@ -1809,7 +1809,7 @@ expand_call (exp, target, ignore) /* Now do the register loads required for any wholly-register parms or any parms which are passed both on the stack and in a register. Their - expressions were already evaluated. + expressions were already evaluated. Mark all register-parms as living through the call, putting these USE insns in the CALL_INSN_FUNCTION_USAGE field. */ @@ -2072,7 +2072,7 @@ expand_call (exp, target, ignore) PARM_BOUNDARY / BITS_PER_UNIT); } #endif - + /* If we saved any argument areas, restore them. */ for (i = 0; i < num_actuals; i++) if (args[i].save_area) @@ -2096,7 +2096,7 @@ expand_call (exp, target, ignore) } #endif - /* If this was alloca, record the new stack level for nonlocal gotos. + /* If this was alloca, record the new stack level for nonlocal gotos. Check for the handler slots since we might not have a save area for non-local gotos. */ @@ -2820,7 +2820,7 @@ target_for_arg (type, size, args_addr, offset) or 0 on a machine where arguments are pushed individually. MAY_BE_ALLOCA nonzero says this could be a call to `alloca' - so must be careful about how the stack is used. + so must be careful about how the stack is used. VARIABLE_SIZE nonzero says that this was a variable-sized outgoing argument stack. This is used if ACCUMULATE_OUTGOING_ARGS to indicate @@ -2927,7 +2927,7 @@ store_one_arg (arg, argblock, may_be_alloca, variable_size, fndecl, if (arg->n_aligned_regs != 0) reg = 0; #endif - + /* If this is being partially passed in a register, but multiple locations are specified, we assume that the one partially used is the one that is listed first. */ @@ -2994,7 +2994,7 @@ store_one_arg (arg, argblock, may_be_alloca, variable_size, fndecl, /* Argument is a scalar, not entirely passed in registers. (If part is passed in registers, arg->partial says how much and emit_push_insn will take care of putting it there.) - + Push it, and if its size is less than the amount of space allocated to it, also bump stack pointer by the additional space. @@ -3058,7 +3058,7 @@ store_one_arg (arg, argblock, may_be_alloca, variable_size, fndecl, /* Unless this is a partially-in-register argument, the argument is now - in the stack. + in the stack. ??? Note that this can change arg->value from arg->stack to arg->stack_slot and it matters when they are not the same. diff --git a/gnu/usr.bin/cc/cc_int/combine.c b/gnu/usr.bin/cc/cc_int/combine.c index c388c2c3a430..268434e3fe01 100644 --- a/gnu/usr.bin/cc/cc_int/combine.c +++ b/gnu/usr.bin/cc/cc_int/combine.c @@ -57,7 +57,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ - there are extremely rare cases (see distribute_regnotes) when a REG_DEAD note is lost - a LOG_LINKS entry that refers to an insn with multiple SETs may be - removed because there is no way to know which register it was + removed because there is no way to know which register it was linking To simplify substitution, we combine only when the earlier insn(s) @@ -190,7 +190,7 @@ static HARD_REG_SET newpat_used_regs; static rtx added_links_insn; -/* This is the value of undobuf.num_undo when we started processing this +/* This is the value of undobuf.num_undo when we started processing this substitution. This will prevent gen_rtx_combine from re-used a piece from the previous expression. Doing so can produce circular rtl structures. */ @@ -498,7 +498,7 @@ combine_instructions (f, nregs) /* Compute the mapping from uids to cuids. Cuids are numbers assigned to insns, like uids, - except that cuids increase monotonically through the code. + except that cuids increase monotonically through the code. Scan all SETs and see if we can deduce anything about what bits are known to be zero for some registers and how many copies @@ -690,14 +690,14 @@ setup_incoming_promotions () /* Called via note_stores. If X is a pseudo that is used in more than one basic block, is narrower that HOST_BITS_PER_WIDE_INT, and is being set, record what bits are known zero. If we are clobbering X, - ignore this "set" because the clobbered value won't be used. + ignore this "set" because the clobbered value won't be used. If we are setting only a portion of X and we can't figure out what portion, assume all bits will be used since we don't know what will be happening. Similarly, set how many bits of X are known to be copies of the sign bit - at all locations in the function. This is the smallest number implied + at all locations in the function. This is the smallest number implied by any set of X. */ static void @@ -744,7 +744,7 @@ set_nonzero_bits_and_sign_copies (x, set) constant that would appear negative in the mode of X, sign-extend it for use in reg_nonzero_bits because some machines (maybe most) will actually do the sign-extension - and this is the conservative approach. + and this is the conservative approach. ??? For 2.5, try to tighten up the MD files in this regard instead of this kludge. */ @@ -781,7 +781,7 @@ set_nonzero_bits_and_sign_copies (x, set) Return 0 if the combination is not allowed for any reason. - If the combination is allowed, *PDEST will be set to the single + If the combination is allowed, *PDEST will be set to the single destination of INSN and *PSRC to the single source, and this function will return 1. */ @@ -800,20 +800,20 @@ can_combine_p (insn, i3, pred, succ, pdest, psrc) : next_active_insn (insn) == i3); /* Can combine only if previous insn is a SET of a REG, a SUBREG or CC0. - or a PARALLEL consisting of such a SET and CLOBBERs. + or a PARALLEL consisting of such a SET and CLOBBERs. If INSN has CLOBBER parallel parts, ignore them for our processing. By definition, these happen during the execution of the insn. When it is merged with another insn, all bets are off. If they are, in fact, needed and aren't also supplied in I3, they may be added by - recog_for_combine. Otherwise, it won't match. + recog_for_combine. Otherwise, it won't match. We can also ignore a SET whose SET_DEST is mentioned in a REG_UNUSED note. - Get the source and destination of INSN. If more than one, can't + Get the source and destination of INSN. If more than one, can't combine. */ - + if (GET_CODE (PATTERN (insn)) == SET) set = PATTERN (insn); else if (GET_CODE (PATTERN (insn)) == PARALLEL @@ -1032,7 +1032,7 @@ can_combine_p (insn, i3, pred, succ, pdest, psrc) (set (reg:DI 101) (reg:DI 100))]) Not only does this modify 100 (in which case it might still be valid - if 100 were dead in I2), it sets 101 to the ORIGINAL value of 100. + if 100 were dead in I2), it sets 101 to the ORIGINAL value of 100. We can also run into a problem if I2 sets a register that I1 uses and I1 gets directly substituted into I3 (not via I2). In that @@ -1124,7 +1124,7 @@ combinable_i3pat (i3, loc, i2dest, i1dest, i1_not_in_src, pi3dest_killed) return 0; /* If DEST is used in I3, it is being killed in this insn, - so record that for later. + so record that for later. Never add REG_DEAD notes for the FRAME_POINTER_REGNUM or the STACK_POINTER_REGNUM, since these are always considered to be live. Similarly for ARG_POINTER_REGNUM if it is fixed. */ @@ -1163,13 +1163,13 @@ combinable_i3pat (i3, loc, i2dest, i1dest, i1_not_in_src, pi3dest_killed) /* Try to combine the insns I1 and I2 into I3. Here I1 and I2 appear earlier than I3. I1 can be zero; then we combine just I2 into I3. - + It we are combining three insns and the resulting insn is not recognized, try splitting it into two insns. If that happens, I2 and I3 are retained and I1 is pseudo-deleted by turning it into a NOTE. Otherwise, I1 and I2 are pseudo-deleted. - Return 0 if the combination does not work. Then nothing is changed. + Return 0 if the combination does not work. Then nothing is changed. If we did the combination, return the insn at which combine should resume scanning. */ @@ -1308,7 +1308,7 @@ try_combine (i3, i2, i1) /* Replace the dest in I2 with our dest and make the resulting insn the new pattern for I3. Then skip to where we validate the pattern. Everything was set up above. */ - SUBST (SET_DEST (XVECEXP (p2, 0, i)), + SUBST (SET_DEST (XVECEXP (p2, 0, i)), SET_DEST (PATTERN (i3))); newpat = p2; @@ -1556,7 +1556,7 @@ try_combine (i3, i2, i1) else undobuf.other_insn = 0; } -#endif +#endif } else #endif @@ -1710,7 +1710,7 @@ try_combine (i3, i2, i1) /* If we were combining three insns and the result is a simple SET with no ASM_OPERANDS that wasn't recognized, try to split it into two - insns. There are two ways to do this. It can be split using a + insns. There are two ways to do this. It can be split using a machine-specific method (like when you have an addition of a large constant) or by combine in the function find_split_point. */ @@ -1960,7 +1960,7 @@ try_combine (i3, i2, i1) } } } - + /* Similarly, check for a case where we have a PARALLEL of two independent SETs but we started with three insns. In this case, we can do the sets as two separate insns. This case occurs when some SET allows two @@ -2048,7 +2048,7 @@ try_combine (i3, i2, i1) undobuf.other_insn, NULL_RTX, NULL_RTX, NULL_RTX); } - /* We now know that we can do this combination. Merge the insns and + /* We now know that we can do this combination. Merge the insns and update the status of registers and LOG_LINKS. */ { @@ -2179,7 +2179,7 @@ try_combine (i3, i2, i1) /* Distribute any notes added to I2 or I3 by recog_for_combine. We know these are REG_UNUSED and want them to go to the desired insn, - so we always pass it as i3. We have not counted the notes in + so we always pass it as i3. We have not counted the notes in reg_n_deaths yet, so we need to do so now. */ if (newi2pat && new_i2_notes) @@ -2187,7 +2187,7 @@ try_combine (i3, i2, i1) for (temp = new_i2_notes; temp; temp = XEXP (temp, 1)) if (GET_CODE (XEXP (temp, 0)) == REG) reg_n_deaths[REGNO (XEXP (temp, 0))]++; - + distribute_notes (new_i2_notes, i2, i2, NULL_RTX, NULL_RTX, NULL_RTX); } @@ -2196,7 +2196,7 @@ try_combine (i3, i2, i1) for (temp = new_i3_notes; temp; temp = XEXP (temp, 1)) if (GET_CODE (XEXP (temp, 0)) == REG) reg_n_deaths[REGNO (XEXP (temp, 0))]++; - + distribute_notes (new_i3_notes, i3, i3, NULL_RTX, NULL_RTX, NULL_RTX); } @@ -2259,7 +2259,7 @@ try_combine (i3, i2, i1) /* The insn that used to set this register doesn't exist, and this life of the register may not exist either. See if one of - I3's links points to an insn that sets I2DEST. If it does, + I3's links points to an insn that sets I2DEST. If it does, that is now the last known value for I2DEST. If we don't update this and I2 set the register to a value that depended on its old contents, we will get confused. If this insn is used, thing @@ -2315,7 +2315,7 @@ try_combine (i3, i2, i1) if (newi2pat) note_stores (newi2pat, set_nonzero_bits_and_sign_copies); - /* If I3 is now an unconditional jump, ensure that it has a + /* If I3 is now an unconditional jump, ensure that it has a BARRIER following it since it may have initially been a conditional jump. It may also be the last nonnote insn. */ @@ -2349,7 +2349,7 @@ undo_all () *undobuf.undo[i].where.i = undobuf.undo[i].old_contents.i; else *undobuf.undo[i].where.r = undobuf.undo[i].old_contents.r; - + } obfree (undobuf.storage); @@ -2453,7 +2453,7 @@ find_split_point (loc, insn) return split; } } - + /* If that didn't work, perhaps the first operand is complex and needs to be computed separately, so make a split point there. This will occur on machines that just support REG + CONST @@ -2518,7 +2518,7 @@ find_split_point (loc, insn) else SUBST (SET_SRC (x), gen_binary (IOR, mode, - gen_binary (AND, mode, dest, + gen_binary (AND, mode, dest, GEN_INT (~ (mask << pos) & GET_MODE_MASK (mode))), GEN_INT (src << pos))); @@ -2728,7 +2728,7 @@ find_split_point (loc, insn) the caller can tell whether the result is valid. `n_occurrences' is incremented each time FROM is replaced. - + IN_DEST is non-zero if we are processing the SET_DEST of a SET. UNIQUE_COPY is non-zero if each substitution must be unique. We do this @@ -2762,7 +2762,7 @@ subst (x, from, to, in_dest, unique_copy) } /* If X and FROM are the same register but different modes, they will - not have been seen as equal above. However, flow.c will make a + not have been seen as equal above. However, flow.c will make a LOG_LINKS entry for that case. If we do nothing, we will try to rerecognize our original insn and, when it succeeds, we will delete the feeding insn, which is incorrect. @@ -2861,7 +2861,7 @@ subst (x, from, to, in_dest, unique_copy) have gone inside a MEM, in which case we want to simplify the address. We assume here that things that are actually part of the destination have their inner - parts in the first expression. This is true for SUBREG, + parts in the first expression. This is true for SUBREG, STRICT_LOW_PART, and ZERO_EXTRACT, which are the only things aside from REG and MEM that should appear in a SET_DEST. */ @@ -2985,7 +2985,7 @@ simplify_rtx (x, op0_mode, last, in_dest) SUBST (XEXP (x, 0), gen_binary (PLUS, mode, new, temp)); } - /* If this is a simple operation applied to an IF_THEN_ELSE, try + /* If this is a simple operation applied to an IF_THEN_ELSE, try applying it to the arms of the IF_THEN_ELSE. This often simplifies things. Check for cases where both arms are testing the same condition. @@ -3016,7 +3016,7 @@ simplify_rtx (x, op0_mode, last, in_dest) rtx cop1 = const0_rtx; enum rtx_code cond_code = simplify_comparison (NE, &cond, &cop1); - /* Simplify the alternative arms; this may collapse the true and + /* Simplify the alternative arms; this may collapse the true and false arms to store-flag values. */ true = subst (true, pc_rtx, pc_rtx, 0, 0); false = subst (false, pc_rtx, pc_rtx, 0, 0); @@ -3042,7 +3042,7 @@ simplify_rtx (x, op0_mode, last, in_dest) && INTVAL (false) == - STORE_FLAG_VALUE && true == const0_rtx) x = gen_unary (NEG, mode, mode, - gen_binary (reverse_condition (cond_code), + gen_binary (reverse_condition (cond_code), mode, cond, cop1)); else return gen_rtx (IF_THEN_ELSE, mode, @@ -3108,7 +3108,7 @@ simplify_rtx (x, op0_mode, last, in_dest) rtx inner_op0 = XEXP (XEXP (x, 0), 1); rtx inner_op1 = XEXP (x, 1); rtx inner; - + /* Make sure we pass the constant operand if any as the second one if this is a commutative operation. */ if (CONSTANT_P (inner_op0) && GET_RTX_CLASS (code) == 'c') @@ -3239,7 +3239,7 @@ simplify_rtx (x, op0_mode, last, in_dest) if (temp) return temp; } - + /* If we want a subreg of a constant, at offset 0, take the low bits. On a little-endian machine, that's always valid. On a big-endian machine, it's valid @@ -3282,7 +3282,7 @@ simplify_rtx (x, op0_mode, last, in_dest) XEXP (XEXP (x, 0), 1), mode)) != 0) return gen_binary (XOR, mode, XEXP (XEXP (x, 0), 0), temp); - + /* (not (ashift 1 X)) is (rotate ~1 X). We used to do this for operands other than 1, but that is not valid. We could do a similar simplification for (not (lshiftrt C X)) where C is just the sign bit, @@ -3291,7 +3291,7 @@ simplify_rtx (x, op0_mode, last, in_dest) && XEXP (XEXP (x, 0), 0) == const1_rtx) return gen_rtx (ROTATE, mode, gen_unary (NOT, mode, mode, const1_rtx), XEXP (XEXP (x, 0), 1)); - + if (GET_CODE (XEXP (x, 0)) == SUBREG && subreg_lowpart_p (XEXP (x, 0)) && (GET_MODE_SIZE (GET_MODE (XEXP (x, 0))) @@ -3306,7 +3306,7 @@ simplify_rtx (x, op0_mode, last, in_dest) XEXP (SUBREG_REG (XEXP (x, 0)), 1)); return gen_lowpart_for_combine (mode, x); } - + #if STORE_FLAG_VALUE == -1 /* (not (comparison foo bar)) can be done by reversing the comparison code if valid. */ @@ -3357,7 +3357,7 @@ simplify_rtx (x, op0_mode, last, in_dest) return gen_rtx_combine (GET_CODE (XEXP (x, 0)) == IOR ? AND : IOR, mode, in1, in2); - } + } break; case NEG: @@ -3460,7 +3460,7 @@ simplify_rtx (x, op0_mode, last, in_dest) && subreg_lowpart_p (XEXP (x, 0)) && GET_CODE (SUBREG_REG (XEXP (x, 0))) == FLOAT_TRUNCATE) return SUBREG_REG (XEXP (x, 0)); - break; + break; #ifdef HAVE_cc0 case COMPARE: @@ -3773,13 +3773,13 @@ simplify_rtx (x, op0_mode, last, in_dest) if (new_code != code) return gen_rtx_combine (new_code, mode, op0, op1); - /* Otherwise, keep this operation, but maybe change its operands. + /* Otherwise, keep this operation, but maybe change its operands. This also converts (ne (compare FOO BAR) 0) to (ne FOO BAR). */ SUBST (XEXP (x, 0), op0); SUBST (XEXP (x, 1), op1); } break; - + case IF_THEN_ELSE: return simplify_if_then_else (x); @@ -3843,14 +3843,14 @@ simplify_rtx (x, op0_mode, last, in_dest) case ROTATERT: /* If this is a shift by a constant amount, simplify it. */ if (GET_CODE (XEXP (x, 1)) == CONST_INT) - return simplify_shift_const (x, code, mode, XEXP (x, 0), + return simplify_shift_const (x, code, mode, XEXP (x, 0), INTVAL (XEXP (x, 1))); #ifdef SHIFT_COUNT_TRUNCATED else if (SHIFT_COUNT_TRUNCATED && GET_CODE (XEXP (x, 1)) != REG) SUBST (XEXP (x, 1), force_to_mode (XEXP (x, 1), GET_MODE (x), - ((HOST_WIDE_INT) 1 + ((HOST_WIDE_INT) 1 << exact_log2 (GET_MODE_BITSIZE (GET_MODE (x)))) - 1, NULL_RTX, 0)); @@ -3880,7 +3880,7 @@ simplify_if_then_else (x) /* Simplify storing of the truth value. */ if (comparison_p && true == const_true_rtx && false == const0_rtx) return gen_binary (true_code, mode, XEXP (cond, 0), XEXP (cond, 1)); - + /* Also when the truth value has to be reversed. */ if (comparison_p && reversible_comparison_p (cond) && true == const0_rtx && false == const_true_rtx) @@ -3946,7 +3946,7 @@ simplify_if_then_else (x) the false arm is more complicated than the true arm. */ if (comparison_p && reversible_comparison_p (cond) - && (true == pc_rtx + && (true == pc_rtx || (CONSTANT_P (true) && GET_CODE (false) != CONST_INT && false != pc_rtx) || true == const0_rtx @@ -4014,7 +4014,7 @@ simplify_if_then_else (x) case LTU: return gen_binary (UMIN, mode, true, false); } - + #if STORE_FLAG_VALUE == 1 || STORE_FLAG_VALUE == -1 /* If we have (if_then_else COND (OP Z C1) Z) and OP is an identity when its @@ -4117,7 +4117,7 @@ simplify_if_then_else (x) extend_op = ZERO_EXTEND; m = GET_MODE (XEXP (t, 0)); } - + if (z) { temp = subst (gen_binary (true_code, m, cond_op0, cond_op1), @@ -4312,7 +4312,7 @@ simplify_set (x) /* If we have (set x (subreg:m1 (op:m2 ...) 0)) with OP being some operation, and X being a REG or (subreg (reg)), we may be able to convert this to - (set (subreg:m2 x) (op)). + (set (subreg:m2 x) (op)). We can always do this if M1 is narrower than M2 because that means that we only care about the low bits of the result. @@ -4321,7 +4321,7 @@ simplify_set (x) perform a narrower operation that requested since the high-order bits will be undefined. On machine where it is defined, this transformation is safe as long as M1 and M2 have the same number of words. */ - + if (GET_CODE (src) == SUBREG && subreg_lowpart_p (src) && GET_RTX_CLASS (GET_CODE (SUBREG_REG (src))) != 'o' && (((GET_MODE_SIZE (GET_MODE (src)) + (UNITS_PER_WORD - 1)) @@ -4507,7 +4507,7 @@ simplify_logical (x, last) For example, (and (ior A B) (not B)) can occur as the result of expanding a bit field assignment. When we apply the distributive law to this, we get (ior (and (A (not B))) (and (B (not B)))), - which then simplifies to (and (A (not B))). + which then simplifies to (and (A (not B))). If we have (and (ior A B) C), apply the distributive law and then the inverse distributive law to see if things simplify. */ @@ -4536,7 +4536,7 @@ simplify_logical (x, last) (gen_binary (XOR, mode, gen_binary (IOR, mode, XEXP (op0, 0), XEXP (op1, 0)), gen_binary (IOR, mode, XEXP (op0, 0), XEXP (op1, 1)))); - + else if (GET_CODE (op1) == NOT && GET_CODE (op0) == XOR) return apply_distributive_law (gen_binary (XOR, mode, @@ -4703,7 +4703,7 @@ simplify_logical (x, last) an AND operation, which is simpler, though only one operation. The function expand_compound_operation is called with an rtx expression - and will convert it to the appropriate shifts and AND operations, + and will convert it to the appropriate shifts and AND operations, simplifying at each stage. The function make_compound_operation is called to convert an expression @@ -4743,7 +4743,7 @@ expand_compound_operation (x) Reject MODEs bigger than a word, because we might not be able to reference a two-register group starting with an arbitrary register (and currently gen_lowpart might crash for a SUBREG). */ - + if (GET_MODE_SIZE (GET_MODE (XEXP (x, 0))) > UNITS_PER_WORD) return x; @@ -4797,7 +4797,7 @@ expand_compound_operation (x) We must check for the case where the left shift would have a negative count. This can happen in a case like (x >> 31) & 255 on machines that can't shift by a constant. On those machines, we would first - combine the shift with the AND to produce a variable-position + combine the shift with the AND to produce a variable-position extraction. Then the constant of 31 would be substituted in to produce a such a position. */ @@ -4820,7 +4820,7 @@ expand_compound_operation (x) else /* Any other cases we can't handle. */ return x; - + /* If we couldn't do this for some reason, return the original expression. */ @@ -4951,7 +4951,7 @@ expand_field_assignment (x) code that understands the USE is this routine. If it is not removed, it will cause the resulting insn not to match. - UNSIGNEDP is non-zero for an unsigned reference and zero for a + UNSIGNEDP is non-zero for an unsigned reference and zero for a signed reference. IN_DEST is non-zero if this is a reference in the destination of a @@ -5045,7 +5045,7 @@ make_extraction (mode, inner, pos, pos_rtx, len, { /* If INNER is a MEM, make a new MEM that encompasses just the desired field. If the original and current mode are the same, we need not - adjust the offset. Otherwise, we do if bytes big endian. + adjust the offset. Otherwise, we do if bytes big endian. If INNER is not a MEM, get a piece consisting of the just the field of interest (in this case POS must be 0). */ @@ -5086,7 +5086,7 @@ make_extraction (mode, inner, pos, pos_rtx, len, : ((HOST_WIDE_INT) 1 << len) - 1, NULL_RTX, 0); - /* If this extraction is going into the destination of a SET, + /* If this extraction is going into the destination of a SET, make a STRICT_LOW_PART unless we made a MEM. */ if (in_dest) @@ -5199,7 +5199,7 @@ make_extraction (mode, inner, pos, pos_rtx, len, /* The computations below will be correct if the machine is big endian in both bits and bytes or little endian in bits and bytes. If it is mixed, we must adjust. */ - + /* If bytes are big endian and we had a paradoxical SUBREG, we must adjust OFFSET to compensate. */ #if BYTES_BIG_ENDIAN @@ -5303,7 +5303,7 @@ extract_left_shift (x, count) if (GET_CODE (XEXP (x,1)) == CONST_INT && (INTVAL (XEXP (x, 1)) & (((HOST_WIDE_INT) 1 << count)) - 1) == 0 && (tem = extract_left_shift (XEXP (x, 0), count)) != 0) - return gen_binary (code, mode, tem, + return gen_binary (code, mode, tem, GEN_INT (INTVAL (XEXP (x, 1)) >> count)); break; @@ -5515,7 +5515,7 @@ make_compound_operation (x, in_code) If so, try to merge the shifts into a SIGN_EXTEND. We could also do this for some cases of SIGN_EXTRACT, but it doesn't seem worth the effort; the case checked for occurs on Alpha. */ - + if (GET_RTX_CLASS (GET_CODE (lhs)) != 'o' && ! (GET_CODE (lhs) == SUBREG && (GET_RTX_CLASS (GET_CODE (SUBREG_REG (lhs))) == 'o')) @@ -5525,7 +5525,7 @@ make_compound_operation (x, in_code) new = make_extraction (mode, make_compound_operation (new, next_code), 0, NULL_RTX, mode_width - INTVAL (rhs), code == LSHIFTRT, 0, in_code == COMPARE); - + break; case SUBREG: @@ -5605,7 +5605,7 @@ get_pos_from_mask (m, plen) Return a possibly simplified expression, but always convert X to MODE. If X is a CONST_INT, AND the CONST_INT with MASK. - Also, if REG is non-zero and X is a register equal in value to REG, + Also, if REG is non-zero and X is a register equal in value to REG, replace X with REG. If JUST_SELECT is nonzero, don't optimize by noticing that bits in MASK @@ -5679,7 +5679,7 @@ force_to_mode (x, mode, mask, reg, just_select) if (width > 0 && width < HOST_BITS_PER_WIDE_INT && (cval & ((HOST_WIDE_INT) 1 << (width - 1))) != 0) cval |= (HOST_WIDE_INT) -1 << width; - + return GEN_INT (cval); } @@ -5853,7 +5853,7 @@ force_to_mode (x, mode, mask, reg, just_select) if (GET_CODE (op1) == CONST_INT && (code == IOR || code == XOR) && (INTVAL (op1) & mask) != 0) op1 = GEN_INT (INTVAL (op1) & mask); - + if (op_mode != GET_MODE (x) || op0 != XEXP (x, 0) || op1 != XEXP (x, 1)) x = gen_binary (code, op_mode, op0, op1); break; @@ -5872,7 +5872,7 @@ force_to_mode (x, mode, mask, reg, just_select) && (nonzero_bits (XEXP (x, 1), GET_MODE (XEXP (x, 1))) < (unsigned HOST_WIDE_INT) GET_MODE_BITSIZE (mode)))) break; - + /* If the shift count is a constant and we can do arithmetic in the mode of the shift, refine which bits we need. Otherwise, use the conservative form of the mask. */ @@ -6011,7 +6011,7 @@ force_to_mode (x, mode, mask, reg, just_select) INTVAL (temp), reg, next_select)); } break; - + case NEG: /* If we just want the low-order bit, the NEG isn't needed since it won't change the low-order bit. */ @@ -6158,8 +6158,8 @@ if_then_else_cond (x, ptrue, pfalse) && ! side_effects_p (x)) { *ptrue = gen_binary (MULT, mode, op0, const_true_rtx); - *pfalse = gen_binary (MULT, mode, - (code == MINUS + *pfalse = gen_binary (MULT, mode, + (code == MINUS ? gen_unary (NEG, mode, mode, op1) : op1), const_true_rtx); return cond0; @@ -6232,7 +6232,7 @@ if_then_else_cond (x, ptrue, pfalse) || ((cond0 = get_last_value (x)) != 0 && CONSTANT_P (cond0))) ; - /* If X is known to be either 0 or -1, those are the true and + /* If X is known to be either 0 or -1, those are the true and false values when testing X. */ else if (num_sign_bit_copies (x, mode) == size) { @@ -6379,7 +6379,7 @@ make_field_assignment (x) else if (GET_CODE (src) == AND && GET_CODE (XEXP (src, 0)) == SUBREG && subreg_lowpart_p (XEXP (src, 0)) - && (GET_MODE_SIZE (GET_MODE (XEXP (src, 0))) + && (GET_MODE_SIZE (GET_MODE (XEXP (src, 0))) < GET_MODE_SIZE (GET_MODE (SUBREG_REG (XEXP (src, 0))))) && GET_CODE (SUBREG_REG (XEXP (src, 0))) == ROTATE && INTVAL (XEXP (SUBREG_REG (XEXP (src, 0)), 0)) == -2 @@ -6440,7 +6440,7 @@ make_field_assignment (x) /* The mode to use for the source is the mode of the assignment, or of what is inside a possible STRICT_LOW_PART. */ - mode = (GET_CODE (assign) == STRICT_LOW_PART + mode = (GET_CODE (assign) == STRICT_LOW_PART ? GET_MODE (XEXP (assign, 0)) : GET_MODE (assign)); /* Shift OTHER right POS places and make it the source, restricting it @@ -6626,7 +6626,7 @@ simplify_and_const_int (x, mode, varop, constop) if (GET_CODE (varop) == NEG && nonzero_bits (XEXP (varop, 0), mode) == 1 && (i = exact_log2 (constop)) >= 0) return simplify_shift_const (NULL_RTX, ASHIFT, mode, XEXP (varop, 0), i); - + /* If VAROP is an IOR or XOR, apply the AND to both branches of the IOR or XOR, then try to apply the distributive law. This may eliminate operations if either branch can be simplified because of the AND. @@ -6713,7 +6713,7 @@ nonzero_bits (x, mode) #ifndef WORD_REGISTER_OPERATIONS /* If MODE is wider than X, but both are a single word for both the host - and target machines, we can compute this from which bits of the + and target machines, we can compute this from which bits of the object might be nonzero in its own mode, taking into account the fact that on many CISC machines, accessing an object in a wider mode causes the high-order bits to become undefined. So they are @@ -6773,7 +6773,7 @@ nonzero_bits (x, mode) constant that would appear negative in the mode of X, sign-extend it for use in reg_nonzero_bits because some machines (maybe most) will actually do the sign-extension - and this is the conservative approach. + and this is the conservative approach. ??? For 2.5, try to tighten up the MD files in this regard instead of this kludge. */ @@ -7074,7 +7074,7 @@ num_sign_bit_copies (x, mode) if (bitwidth < GET_MODE_BITSIZE (GET_MODE (x))) return MAX (1, (num_sign_bit_copies (x, GET_MODE (x)) - (GET_MODE_BITSIZE (GET_MODE (x)) - bitwidth))); - + #ifndef WORD_REGISTER_OPERATIONS /* If this machine does not do all register operations on the entire register and MODE is wider than the mode of X, we can say nothing @@ -7155,7 +7155,7 @@ num_sign_bit_copies (x, mode) return MAX (1, bitwidth - INTVAL (XEXP (x, 1))); break; - case SIGN_EXTEND: + case SIGN_EXTEND: return (bitwidth - GET_MODE_BITSIZE (GET_MODE (XEXP (x, 0))) + num_sign_bit_copies (XEXP (x, 0), VOIDmode)); @@ -7224,7 +7224,7 @@ num_sign_bit_copies (x, mode) num0 = num_sign_bit_copies (XEXP (x, 0), mode); num1 = num_sign_bit_copies (XEXP (x, 1), mode); return MAX (1, MIN (num0, num1) - 1); - + case MULT: /* The number of bits of the product is the sum of the number of bits of both terms. However, unless one of the terms if known @@ -7355,7 +7355,7 @@ extended_count (x, mode, unsignedp) (with *POP0 being done last). Return 1 if we can do the operation and update *POP0 and *PCONST0 with - the resulting operation. *PCOMP_P is set to 1 if we would need to + the resulting operation. *PCOMP_P is set to 1 if we would need to complement the innermost operand, otherwise it is unchanged. MODE is the mode in which the operation will be done. No bits outside @@ -7549,7 +7549,7 @@ simplify_shift_const (x, code, result_mode, varop, count) Since these shifts are being produced by the compiler by combining multiple operations, each of which are defined, we know what the result is supposed to be. */ - + if (count > GET_MODE_BITSIZE (shift_mode) - 1) { if (code == ASHIFTRT) @@ -7658,7 +7658,7 @@ simplify_shift_const (x, code, result_mode, varop, count) new = XEXP (varop, 0); #else new = copy_rtx (XEXP (varop, 0)); - SUBST (XEXP (new, 0), + SUBST (XEXP (new, 0), plus_constant (XEXP (new, 0), count / BITS_PER_UNIT)); #endif @@ -7713,7 +7713,7 @@ simplify_shift_const (x, code, result_mode, varop, count) break; case ASHIFTRT: - /* If we are extracting just the sign bit of an arithmetic right + /* If we are extracting just the sign bit of an arithmetic right shift, that shift is not needed. */ if (code == LSHIFTRT && count == GET_MODE_BITSIZE (result_mode) - 1) { @@ -7751,7 +7751,7 @@ simplify_shift_const (x, code, result_mode, varop, count) - GET_MODE_BITSIZE (GET_MODE (varop))) == count) { /* C3 has the low-order C1 bits zero. */ - + mask = (GET_MODE_MASK (mode) & ~ (((HOST_WIDE_INT) 1 << first_count) - 1)); @@ -7763,11 +7763,11 @@ simplify_shift_const (x, code, result_mode, varop, count) code = ASHIFTRT; continue; } - + /* If this was (ashiftrt (ashift foo C1) C2) and FOO has more than C1 high-order bits equal to the sign bit, we can convert this to either an ASHIFT or a ASHIFTRT depending on the - two counts. + two counts. We cannot do this if VAROP's mode is not SHIFT_MODE. */ @@ -7818,7 +7818,7 @@ simplify_shift_const (x, code, result_mode, varop, count) break; /* To compute the mask to apply after the shift, shift the - nonzero bits of the inner shift the same way the + nonzero bits of the inner shift the same way the outer shift will. */ mask_rtx = GEN_INT (nonzero_bits (varop, GET_MODE (varop))); @@ -7826,7 +7826,7 @@ simplify_shift_const (x, code, result_mode, varop, count) mask_rtx = simplify_binary_operation (code, result_mode, mask_rtx, GEN_INT (count)); - + /* Give up if we can't compute an outer operation to use. */ if (mask_rtx == 0 || GET_CODE (mask_rtx) != CONST_INT @@ -7843,7 +7843,7 @@ simplify_shift_const (x, code, result_mode, varop, count) else count -= first_count; - /* If COUNT is positive, the new shift is usually CODE, + /* If COUNT is positive, the new shift is usually CODE, except for the two exceptions below, in which case it is FIRST_CODE. If the count is negative, FIRST_CODE should always be used */ @@ -8139,7 +8139,7 @@ simplify_shift_const (x, code, result_mode, varop, count) if (orig_code == LSHIFTRT && result_mode != shift_mode) x = simplify_and_const_int (NULL_RTX, shift_mode, x, GET_MODE_MASK (result_mode) >> orig_count); - + /* Do the remainder of the processing in RESULT_MODE. */ x = gen_lowpart_for_combine (result_mode, x); @@ -8166,7 +8166,7 @@ simplify_shift_const (x, code, result_mode, varop, count) } return x; -} +} /* Like recog, but we receive the address of a pointer to a new pattern. We try to match the rtx that the pointer points to. @@ -8455,11 +8455,11 @@ gen_binary (code, mode, op0, op1) || (CONSTANT_P (op0) && GET_CODE (op1) != CONST_INT))) tem = op0, op0 = op1, op1 = tem; - if (GET_RTX_CLASS (code) == '<') + if (GET_RTX_CLASS (code) == '<') { enum machine_mode op_mode = GET_MODE (op0); - /* Strip the COMPARE from (REL_OP (compare X Y) 0) to get + /* Strip the COMPARE from (REL_OP (compare X Y) 0) to get just (REL_OP X Y). */ if (GET_CODE (op0) == COMPARE && op1 == const0_rtx) { @@ -8614,7 +8614,7 @@ simplify_comparison (code, pop0, pop1) HOST_WIDE_INT c0 = INTVAL (XEXP (op0, 1)); HOST_WIDE_INT c1 = INTVAL (XEXP (op1, 1)); int changed = 0; - + if (GET_CODE (inner_op0) == SUBREG && GET_CODE (inner_op1) == SUBREG && (GET_MODE_SIZE (GET_MODE (inner_op0)) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (inner_op0)))) @@ -8665,7 +8665,7 @@ simplify_comparison (code, pop0, pop1) else break; } - + /* If the first operand is a constant, swap the operands and adjust the comparison code appropriately. */ if (CONSTANT_P (op0)) @@ -8734,7 +8734,7 @@ simplify_comparison (code, pop0, pop1) } /* Do some canonicalizations based on the comparison code. We prefer - comparisons against zero and then prefer equality comparisons. + comparisons against zero and then prefer equality comparisons. If we can reduce the size of a constant, we will do that too. */ switch (code) @@ -8891,7 +8891,7 @@ simplify_comparison (code, pop0, pop1) case ZERO_EXTRACT: /* If we are extracting a single bit from a variable position in a constant that has only a single bit set and are comparing it - with zero, we can convert this into an equality comparison + with zero, we can convert this into an equality comparison between the position and the location of the single bit. We can't do this if bit endian and we don't have an extzv since we then can't know what mode to use for the endianness adjustment. */ @@ -9023,11 +9023,11 @@ simplify_comparison (code, pop0, pop1) continue; } break; - + case SIGN_EXTEND: /* Can simplify (compare (zero/sign_extend FOO) CONST) - to (compare FOO CONST) if CONST fits in FOO's mode and we + to (compare FOO CONST) if CONST fits in FOO's mode and we are either testing inequality or have an unsigned comparison with ZERO_EXTEND or a signed comparison with SIGN_EXTEND. */ if (! unsigned_comparison_p @@ -9555,7 +9555,7 @@ update_table_tick (x) return; } - + for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) /* Note that we can't have an "E" in values stored; see get_last_value_validate. */ @@ -9588,7 +9588,7 @@ record_value_for_reg (reg, insn, value) /* Set things up so get_last_value is allowed to see anything set up to our insn. */ subst_low_cuid = INSN_CUID (insn); - tem = get_last_value (reg); + tem = get_last_value (reg); if (tem) value = replace_rtx (copy_rtx (value), reg, tem); @@ -9900,7 +9900,7 @@ use_crosses_set_p (x, from_cuid) register int regno = REGNO (x); int endreg = regno + (regno < FIRST_PSEUDO_REGISTER ? HARD_REGNO_NREGS (regno, GET_MODE (x)) : 1); - + #ifdef PUSH_ROUNDING /* Don't allow uses of the stack pointer to be moved, because we don't know whether the move crosses a push insn. */ @@ -9943,7 +9943,7 @@ static int reg_dead_flag; /* Function called via note_stores from reg_dead_at_p. - If DEST is within [reg_dead_rengno, reg_dead_endregno), set + If DEST is within [reg_dead_rengno, reg_dead_endregno), set reg_dead_flag to 1 if X is a CLOBBER and to -1 it is a SET. */ static void @@ -9957,7 +9957,7 @@ reg_dead_at_p_1 (dest, x) return; regno = REGNO (dest); - endregno = regno + (regno < FIRST_PSEUDO_REGISTER + endregno = regno + (regno < FIRST_PSEUDO_REGISTER ? HARD_REGNO_NREGS (regno, GET_MODE (dest)) : 1); if (reg_dead_endregno > regno && reg_dead_regno < endregno) @@ -10153,7 +10153,7 @@ remove_death (regno, insn) /* For each register (hardware or pseudo) used within expression X, if its death is in an instruction with cuid between FROM_CUID (inclusive) and TO_INSN (exclusive), put a REG_DEAD note for that register in the - list headed by PNOTES. + list headed by PNOTES. This is done when X is being merged by combination into TO_INSN. These notes will then be distributed as needed. */ @@ -10322,7 +10322,7 @@ reg_bitfield_target_p (x, body) return 1; return 0; -} +} /* Given a chain of REG_NOTES originally from FROM_INSN, try to place them as appropriate. I3 and I2 are the insns resulting from the combination @@ -10496,11 +10496,11 @@ distribute_notes (notes, from_insn, i3, i2, elim_i2, elim_i1) if (XEXP (note, 0) == elim_i2 || XEXP (note, 0) == elim_i1) break; - /* If the register is used in both I2 and I3 and it dies in I3, + /* If the register is used in both I2 and I3 and it dies in I3, we might have added another reference to it. If reg_n_refs - was 2, bump it to 3. This has to be correct since the + was 2, bump it to 3. This has to be correct since the register must have been set somewhere. The reason this is - done is because local-alloc.c treats 2 references as a + done is because local-alloc.c treats 2 references as a special case. */ if (place == i3 && i2 != 0 && GET_CODE (XEXP (note, 0)) == REG @@ -10528,7 +10528,7 @@ distribute_notes (notes, from_insn, i3, i2, elim_i2, elim_i1) && rtx_equal_p (XEXP (note, 0), SET_DEST (set))) { /* Move the notes and links of TEM elsewhere. - This might delete other dead insns recursively. + This might delete other dead insns recursively. First set the pattern to something that won't use any register. */ @@ -10564,13 +10564,13 @@ distribute_notes (notes, from_insn, i3, i2, elim_i2, elim_i1) } /* If the register is set or already dead at PLACE, we needn't do - anything with this note if it is still a REG_DEAD note. + anything with this note if it is still a REG_DEAD note. Note that we cannot use just `dead_or_set_p' here since we can convert an assignment to a register into a bit-field assignment. - Therefore, we must also omit the note if the register is the + Therefore, we must also omit the note if the register is the target of a bitfield assignment. */ - + if (place && REG_NOTE_KIND (note) == REG_DEAD) { int regno = REGNO (XEXP (note, 0)); @@ -10727,7 +10727,7 @@ distribute_links (links) /* If the insn that this link points to is a NOTE or isn't a single set, ignore it. In the latter case, it isn't clear what we - can do other than ignore the link, since we can't tell which + can do other than ignore the link, since we can't tell which register it was for. Such links wouldn't be used by combine anyway. @@ -10791,7 +10791,7 @@ distribute_links (links) /* Set added_links_insn to the earliest insn we added a link to. */ - if (added_links_insn == 0 + if (added_links_insn == 0 || INSN_CUID (added_links_insn) > INSN_CUID (place)) added_links_insn = place; } diff --git a/gnu/usr.bin/cc/cc_int/convert.c b/gnu/usr.bin/cc/cc_int/convert.c index 2cb5990e7326..900f9c559b94 100644 --- a/gnu/usr.bin/cc/cc_int/convert.c +++ b/gnu/usr.bin/cc/cc_int/convert.c @@ -37,7 +37,7 @@ convert_to_pointer (type, expr) { register tree intype = TREE_TYPE (expr); register enum tree_code form = TREE_CODE (intype); - + if (integer_zerop (expr)) { if (type == TREE_TYPE (null_pointer_node)) @@ -381,7 +381,7 @@ convert_to_integer (type, expr) to push the narrowing down through the conditional. */ return fold (build (COND_EXPR, type, TREE_OPERAND (expr, 0), - convert (type, TREE_OPERAND (expr, 1)), + convert (type, TREE_OPERAND (expr, 1)), convert (type, TREE_OPERAND (expr, 2)))); } } @@ -415,7 +415,7 @@ convert_to_complex (type, expr) { register enum tree_code form = TREE_CODE (TREE_TYPE (expr)); tree subtype = TREE_TYPE (type); - + if (form == REAL_TYPE || form == INTEGER_TYPE || form == ENUMERAL_TYPE) { expr = convert (subtype, expr); @@ -453,7 +453,7 @@ convert_to_complex (type, expr) error ("pointer value used where a complex was expected"); else error ("aggregate value used where a complex was expected"); - + return build (COMPLEX_EXPR, type, convert (subtype, integer_zero_node), convert (subtype, integer_zero_node)); diff --git a/gnu/usr.bin/cc/cc_int/cse.c b/gnu/usr.bin/cc/cc_int/cse.c index 75c2fb9fe2fc..89643e0a60d0 100644 --- a/gnu/usr.bin/cc/cc_int/cse.c +++ b/gnu/usr.bin/cc/cc_int/cse.c @@ -59,7 +59,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ is to keep it in a hash table. Registers and "quantity numbers": - + At the start of each basic block, all of the (hardware and pseudo) registers used in the function are given distinct quantity numbers to indicate their contents. During scan, when the code @@ -91,7 +91,7 @@ Registers and "quantity numbers": any mode, two REG expressions might be equivalent in the hash table but not have the same quantity number if the quantity number of one of the registers is not the same mode as those expressions. - + Constants and quantity numbers When a quantity has a known constant value, that value is stored @@ -186,7 +186,7 @@ Related expressions: is also entered. These are made to point at each other so that it is possible to find out if there exists any register equivalent to an expression related to a given expression. */ - + /* One plus largest register number used in this function. */ static int max_reg; @@ -201,7 +201,7 @@ static int max_qty; static int next_qty; -/* Indexed by quantity number, gives the first (or last) (pseudo) register +/* Indexed by quantity number, gives the first (or last) (pseudo) register in the chain of registers that currently contain this quantity. */ static int *qty_first_reg; @@ -296,7 +296,7 @@ static int *reg_tick; static int *reg_in_table; -/* A HARD_REG_SET containing all the hard registers for which there is +/* A HARD_REG_SET containing all the hard registers for which there is currently a REG expression in the hash table. Note the difference from the above variables, which indicate if the REG is mentioned in some expression in the table. */ @@ -500,7 +500,7 @@ static int n_elements_made; static int max_elements_made; -/* Surviving equivalence class when two equivalence classes are merged +/* Surviving equivalence class when two equivalence classes are merged by recording the effects of a jump in the last insn. Zero if the last insn was not a conditional jump. */ @@ -735,7 +735,7 @@ rtx_cost (x, outer_code) return 2; #ifdef RTX_COSTS RTX_COSTS (x, code, outer_code); -#endif +#endif CONST_COSTS (x, code, outer_code); } @@ -1096,7 +1096,7 @@ remove_from_table (elt, hash) elt->first_same_value = 0; /* Remove the table element from its equivalence class. */ - + { register struct table_elt *prev = elt->prev_same_value; register struct table_elt *next = elt->next_same_value; @@ -1231,7 +1231,7 @@ lookup_as_function (x, code) && exp_equiv_p (p->exp, p->exp, 1, 0)) return p->exp; } - + return 0; } @@ -1459,10 +1459,10 @@ merge_equiv_classes (class1, class2) hash_arg_in_memory = 0; hash_arg_in_struct = 0; hash = HASH (exp, mode); - + if (GET_CODE (exp) == REG) delete_reg_equiv (REGNO (exp)); - + remove_from_table (elt, hash); if (insert_regs (exp, class1, 0)) @@ -2374,7 +2374,7 @@ refers_to_mem_p (x, base, start, end) &mybase, &mystart, &myend); - /* refers_to_mem_p is never called with varying addresses. + /* refers_to_mem_p is never called with varying addresses. If the base addresses are not equal, there is no chance of the memory addresses conflicting. */ if (! rtx_equal_p (mybase, base)) @@ -2587,7 +2587,7 @@ find_best_addr (insn, loc) if (GET_CODE (addr) != REG && validate_change (insn, loc, fold_rtx (addr, insn), 0)) addr = *loc; - + /* If this address is not in the hash table, we can't look for equivalences of the whole address. Also, ignore if volatile. */ @@ -2633,7 +2633,7 @@ find_best_addr (insn, loc) { int best_addr_cost = ADDRESS_COST (*loc); int best_rtx_cost = (elt->cost + 1) >> 1; - struct table_elt *best_elt = elt; + struct table_elt *best_elt = elt; found_better = 0; for (p = elt->first_same_value; p; p = p->next_same_value) @@ -2701,7 +2701,7 @@ find_best_addr (insn, loc) { int best_addr_cost = ADDRESS_COST (*loc); int best_rtx_cost = (COST (*loc) + 1) >> 1; - struct table_elt *best_elt = elt; + struct table_elt *best_elt = elt; rtx best_rtx = *loc; int count; @@ -3589,7 +3589,7 @@ simplify_binary_operation (code, mode, op0, op1) } /* If one of the operands is a PLUS or a MINUS, see if we can - simplify this by the associative law. + simplify this by the associative law. Don't use the associative law for floating point. The inaccuracy makes it nonassociative, and subtle programs can break if operations are associated. */ @@ -3617,7 +3617,7 @@ simplify_binary_operation (code, mode, op0, op1) /* Do nothing here. */ #endif break; - + case MINUS: /* None of these optimizations can be done for IEEE floating point. */ @@ -3704,7 +3704,7 @@ simplify_binary_operation (code, mode, op0, op1) return cse_gen_binary (PLUS, mode, op0, XEXP (op1, 0)); /* If one of the operands is a PLUS or a MINUS, see if we can - simplify this by the associative law. + simplify this by the associative law. Don't use the associative law for floating point. The inaccuracy makes it nonassociative, and subtle programs can break if operations are associated. */ @@ -3853,10 +3853,10 @@ simplify_binary_operation (code, mode, op0, op1) { #if defined (REAL_ARITHMETIC) REAL_ARITHMETIC (d, rtx_to_tree_code (DIV), dconst1, d); - return gen_rtx (MULT, mode, op0, + return gen_rtx (MULT, mode, op0, CONST_DOUBLE_FROM_REAL_VALUE (d, mode)); #else - return gen_rtx (MULT, mode, op0, + return gen_rtx (MULT, mode, op0, CONST_DOUBLE_FROM_REAL_VALUE (1./d, mode)); #endif } @@ -3898,14 +3898,14 @@ simplify_binary_operation (code, mode, op0, op1) break; case SMIN: - if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT + if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT && INTVAL (op1) == (HOST_WIDE_INT) 1 << (width -1) && ! side_effects_p (op0)) return op1; else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) return op0; break; - + case SMAX: if (width <= HOST_BITS_PER_WIDE_INT && GET_CODE (op1) == CONST_INT && (INTVAL (op1) @@ -3922,7 +3922,7 @@ simplify_binary_operation (code, mode, op0, op1) else if (rtx_equal_p (op0, op1) && ! side_effects_p (op0)) return op0; break; - + case UMAX: if (op1 == constm1_rtx && ! side_effects_p (op0)) return op1; @@ -3933,7 +3933,7 @@ simplify_binary_operation (code, mode, op0, op1) default: abort (); } - + return 0; } @@ -4134,7 +4134,7 @@ simplify_plus_minus (code, mode, op0, op1) int i, j; bzero ((char *) ops, sizeof ops); - + /* Set up the two operands and then expand them until nothing has been changed. If we run out of room in our array, give up; this should almost never happen. */ @@ -4287,7 +4287,7 @@ simplify_plus_minus (code, mode, op0, op1) return negate ? gen_rtx (NEG, mode, result) : result; } -/* Make a binary operation by properly ordering the operands and +/* Make a binary operation by properly ordering the operands and seeing if the expression folds. */ static rtx @@ -4394,7 +4394,7 @@ simplify_relational_operation (code, mode, op0, op1) { REAL_VALUE_TYPE d0, d1; jmp_buf handler; - + if (setjmp (handler)) return 0; @@ -4428,7 +4428,7 @@ simplify_relational_operation (code, mode, op0, op1) l0u = l0s = INTVAL (op0); h0u = 0, h0s = l0s < 0 ? -1 : 0; } - + if (GET_CODE (op1) == CONST_DOUBLE) { l1u = l1s = CONST_DOUBLE_LOW (op1); @@ -4637,7 +4637,7 @@ simplify_ternary_operation (code, mode, op0_mode, op0, op1, op2) static rtx fold_rtx (x, insn) rtx x; - rtx insn; + rtx insn; { register enum rtx_code code; register enum machine_mode mode; @@ -4773,7 +4773,7 @@ fold_rtx (x, insn) extra bits will be. But we can find an equivalence for this SUBREG by folding that operation is the narrow mode. This allows us to fold arithmetic in narrow modes when the machine only supports - word-sized arithmetic. + word-sized arithmetic. Also look for a case where we have a SUBREG whose operand is the same as our result. If both modes are smaller than a word, we @@ -4846,7 +4846,7 @@ fold_rtx (x, insn) if (op1) op1 = equiv_constant (op1); - /* If we are looking for the low SImode part of + /* If we are looking for the low SImode part of (ashift:DI c (const_int 32)), it doesn't work to compute that in SImode, because a 32-bit shift in SImode is unpredictable. We know the value is 0. */ @@ -4856,7 +4856,7 @@ fold_rtx (x, insn) && INTVAL (op1) >= GET_MODE_BITSIZE (mode)) { if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp))) - + /* If the count fits in the inner mode's width, but exceeds the outer mode's width, the value will get truncated to 0 @@ -4973,7 +4973,7 @@ fold_rtx (x, insn) { rtx label = XEXP (base, 0); rtx table_insn = NEXT_INSN (label); - + if (table_insn && GET_CODE (table_insn) == JUMP_INSN && GET_CODE (PATTERN (table_insn)) == ADDR_VEC) { @@ -5001,7 +5001,7 @@ fold_rtx (x, insn) if (GET_MODE (table) != Pmode) new = gen_rtx (TRUNCATE, GET_MODE (table), new); - /* Indicate this is a constant. This isn't a + /* Indicate this is a constant. This isn't a valid form of CONST, but it will only be used to fold the next insns and then discarded, so it should be safe. */ @@ -5199,7 +5199,7 @@ fold_rtx (x, insn) new = gen_rtx (CONST, mode, new); } break; - + case '<': /* See what items are actually being compared and set FOLDED_ARG[01] to those values and CODE to the actual comparison code. If any are @@ -5604,7 +5604,7 @@ equiv_constant (x) /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the least-significant part of X. - MODE specifies how big a part of X to return. + MODE specifies how big a part of X to return. If the requested operation cannot be done, 0 is returned. @@ -5651,7 +5651,7 @@ gen_lowpart_if_possible (mode, x) branch. It will be zero if not. In certain cases, this can cause us to add an equivalence. For example, - if we are following the taken case of + if we are following the taken case of if (i == 2) we can add the fact that `i' and '2' are now equivalent. @@ -5747,7 +5747,7 @@ record_jump_cond (code, mode, op0, op1, reversed_nonequality) reversed_nonequality); } - /* Similarly, if this is an NE comparison, and either is a SUBREG + /* Similarly, if this is an NE comparison, and either is a SUBREG making a smaller mode, we know the whole thing is also NE. */ /* Note that GET_MODE (op0) may not equal MODE; @@ -5798,7 +5798,7 @@ record_jump_cond (code, mode, op0, op1, reversed_nonequality) op1_hash = HASH (op1, mode); op1_in_memory = hash_arg_in_memory; op1_in_struct = hash_arg_in_struct; - + if (do_not_record) return; @@ -5922,7 +5922,7 @@ record_jump_cond (code, mode, op0, op1, reversed_nonequality) First simplify sources and addresses of all assignments in the instruction, using previously-computed equivalents values. Then install the new sources and destinations in the table - of available values. + of available values. If IN_LIBCALL_BLOCK is nonzero, don't record any equivalence made in the insn. */ @@ -5945,9 +5945,9 @@ struct set rtx inner_dest; /* Place where the pointer to the INNER_DEST was found. */ rtx *inner_dest_loc; - /* Nonzero if the SET_SRC is in memory. */ + /* Nonzero if the SET_SRC is in memory. */ char src_in_memory; - /* Nonzero if the SET_SRC is in a structure. */ + /* Nonzero if the SET_SRC is in a structure. */ char src_in_struct; /* Nonzero if the SET_SRC contains something whose value cannot be predicted and understood. */ @@ -6067,7 +6067,7 @@ cse_insn (insn, in_libcall_block) invalidate (XEXP (clobbered, 0), GET_MODE (clobbered)); } } - + for (i = 0; i < lim; i++) { register rtx y = XVECEXP (x, 0, i); @@ -6191,7 +6191,7 @@ cse_insn (insn, in_libcall_block) group and see if they all work. Note that this will cause some canonicalizations that would have worked individually not to be applied because some other canonicalization didn't work, but this should not - occur often. + occur often. The result of apply_change_group can be ignored; see canon_reg. */ @@ -6359,7 +6359,7 @@ cse_insn (insn, in_libcall_block) if (src_const == 0 && (CONSTANT_P (src_folded) - /* Consider (minus (label_ref L1) (label_ref L2)) as + /* Consider (minus (label_ref L1) (label_ref L2)) as "constant" here so we will record it. This allows us to fold switch statements when an ADDR_DIFF_VEC is used. */ || (GET_CODE (src_folded) == MINUS @@ -6404,7 +6404,7 @@ cse_insn (insn, in_libcall_block) { if (elt->first_same_value != src_related_elt->first_same_value) - /* This can occur when we previously saw a CONST + /* This can occur when we previously saw a CONST involving a SYMBOL_REF and then see the SYMBOL_REF twice. Merge the involved classes. */ merge_equiv_classes (elt, src_related_elt); @@ -6496,7 +6496,7 @@ cse_insn (insn, in_libcall_block) if it has, we can use a subreg of that. Many CISC machines also have such operations, but this is only likely to be beneficial these machines. */ - + if (flag_expensive_optimizations && src_related == 0 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD) && GET_MODE_CLASS (mode) == MODE_INT @@ -6504,39 +6504,39 @@ cse_insn (insn, in_libcall_block) && LOAD_EXTEND_OP (mode) != NIL) { enum machine_mode tmode; - + /* Set what we are trying to extend and the operation it might have been extended with. */ PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode)); XEXP (memory_extend_rtx, 0) = src; - + for (tmode = GET_MODE_WIDER_MODE (mode); GET_MODE_SIZE (tmode) <= UNITS_PER_WORD; tmode = GET_MODE_WIDER_MODE (tmode)) { struct table_elt *larger_elt; - + PUT_MODE (memory_extend_rtx, tmode); - larger_elt = lookup (memory_extend_rtx, + larger_elt = lookup (memory_extend_rtx, HASH (memory_extend_rtx, tmode), tmode); if (larger_elt == 0) continue; - + for (larger_elt = larger_elt->first_same_value; larger_elt; larger_elt = larger_elt->next_same_value) if (GET_CODE (larger_elt->exp) == REG) { - src_related = gen_lowpart_if_possible (mode, + src_related = gen_lowpart_if_possible (mode, larger_elt->exp); break; } - + if (src_related) break; } } #endif /* LOAD_EXTEND_OP */ - + if (src == src_folded) src_folded = 0; @@ -6624,7 +6624,7 @@ cse_insn (insn, in_libcall_block) cheaper even though it looks more expensive. */ if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF) src_folded = src_const, src_folded_cost = -1; - + /* Terminate loop when replacement made. This must terminate since the current contents will be tested and will always be valid. */ while (1) @@ -6634,8 +6634,8 @@ cse_insn (insn, in_libcall_block) /* Skip invalid entries. */ while (elt && GET_CODE (elt->exp) != REG && ! exp_equiv_p (elt->exp, elt->exp, 1, 0)) - elt = elt->next_same_value; - + elt = elt->next_same_value; + if (elt) src_elt_cost = elt->cost; /* Find cheapest and skip it for the next time. For items @@ -6696,7 +6696,7 @@ cse_insn (insn, in_libcall_block) cse_jumps_altered = 1; break; } - + /* Look for a substitution that makes a valid insn. */ else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0)) { @@ -6710,7 +6710,7 @@ cse_insn (insn, in_libcall_block) break; } - /* If we previously found constant pool entries for + /* If we previously found constant pool entries for constants and this is a constant, try making a pool entry. Put it in src_folded unless we already have done this since that is where it likely came from. */ @@ -6787,7 +6787,7 @@ cse_insn (insn, in_libcall_block) && GET_CODE (src_const) != REG) { tem = find_reg_note (insn, REG_EQUAL, NULL_RTX); - + /* Record the actual constant value in a REG_EQUAL note, making a new one if one does not already exist. */ if (tem) @@ -7098,7 +7098,7 @@ cse_insn (insn, in_libcall_block) invalidate_from_clobbers (&writes_memory, x); - /* Some registers are invalidated by subroutine calls. Memory is + /* Some registers are invalidated by subroutine calls. Memory is invalidated by non-constant calls. */ if (GET_CODE (insn) == CALL_INSN) @@ -7238,7 +7238,7 @@ cse_insn (insn, in_libcall_block) However, BAR may have equivalences for which gen_lowpart_if_possible will produce a simpler value than gen_lowpart_if_possible applied to BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all - BAR's equivalences. If we don't get a simplified form, make + BAR's equivalences. If we don't get a simplified form, make the SUBREG. It will not be used in an equivalence, but will cause two similar assignments to be detected. @@ -7289,7 +7289,7 @@ cse_insn (insn, in_libcall_block) src_elt->in_struct = elt->in_struct; } else if (classp && classp != src_elt->first_same_value) - /* Show that two things that we've seen before are + /* Show that two things that we've seen before are actually the same. */ merge_equiv_classes (src_elt, classp); @@ -7300,7 +7300,7 @@ cse_insn (insn, in_libcall_block) /* Special handling for (set REG0 REG1) where REG0 is the "cheapest", cheaper than REG1. - After cse, REG1 will probably not be used in the sequel, + After cse, REG1 will probably not be used in the sequel, so (if easily done) change this insn to (set REG1 REG0) and replace REG1 with REG0 in the previous insn that computed their value. Then REG1 will become a dead store and won't cloud the situation @@ -7924,7 +7924,7 @@ cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks) nsets += XVECLEN (PATTERN (p), 0); else if (GET_CODE (p) != NOTE) nsets += 1; - + /* Ignore insns made by CSE; they cannot affect the boundaries of the basic block. */ @@ -7939,7 +7939,7 @@ cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks) { if (data->path[path_entry].status != NOT_TAKEN) p = JUMP_LABEL (p); - + /* Point to next entry in path, if any. */ path_entry++; } @@ -8024,7 +8024,7 @@ cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks) for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp)) if (GET_CODE (tmp) == CODE_LABEL) break; - + if (tmp == q) { data->path[path_entry].branch = p; @@ -8192,7 +8192,7 @@ cse_main (f, nregs, after_loop, file) cse_basic_block_start = val.low_cuid; cse_basic_block_end = val.high_cuid; max_qty = val.nsets * 2; - + if (file) fprintf (file, ";; Processing block from %d to %d, %d sets.\n", INSN_UID (insn), val.last ? INSN_UID (val.last) : 0, @@ -8313,7 +8313,7 @@ cse_basic_block (from, to, next_branch, around_loop) continue; } } - + code = GET_CODE (insn); if (GET_MODE (insn) == QImode) PUT_MODE (insn, VOIDmode); @@ -8356,7 +8356,7 @@ cse_basic_block (from, to, next_branch, around_loop) /* Maybe TO was deleted because the jump is unconditional. If so, there is nothing left in this basic block. */ /* ??? Perhaps it would be smarter to set TO - to whatever follows this insn, + to whatever follows this insn, and pretend the basic block had always ended here. */ if (INSN_DELETED_P (to)) break; @@ -8436,9 +8436,9 @@ cse_basic_block (from, to, next_branch, around_loop) /* Count the number of times registers are used (not set) in X. COUNTS is an array in which we accumulate the count, INCR is how much - we count each register usage. + we count each register usage. - Don't count a usage of DEST, which is the SET_DEST of a SET which + Don't count a usage of DEST, which is the SET_DEST of a SET which contains X in its SET_SRC. This is because such a SET does not modify the liveness of DEST. */ diff --git a/gnu/usr.bin/cc/cc_int/dbxout.c b/gnu/usr.bin/cc/cc_int/dbxout.c index f09d52c4233a..86f614ccd57b 100644 --- a/gnu/usr.bin/cc/cc_int/dbxout.c +++ b/gnu/usr.bin/cc/cc_int/dbxout.c @@ -440,7 +440,7 @@ dbxout_init (asm_file, input_file_name, syms) /* Used to put `Ltext:' before the reference, but that loses on sun 4. */ fprintf (asmfile, "%s ", ASM_STABS_OP); output_quoted_string (asmfile, input_file_name); - fprintf (asmfile, ",%d,0,0,%s\n", + fprintf (asmfile, ",%d,0,0,%s\n", N_SO, <ext_label_name[1]); text_section (); ASM_OUTPUT_INTERNAL_LABEL (asmfile, "Ltext", 0); @@ -526,7 +526,7 @@ dbxout_source_file (file, filename) } } -/* Output a line number symbol entry into output stream FILE, +/* Output a line number symbol entry into output stream FILE, for source file FILENAME and line number LINENO. */ void @@ -889,12 +889,12 @@ dbxout_range_type (type) fprintf (asmfile, "%d", TYPE_SYMTAB_ADDRESS (integer_type_node)); } if (TREE_CODE (TYPE_MIN_VALUE (type)) == INTEGER_CST) - fprintf (asmfile, ";%d", + fprintf (asmfile, ";%d", TREE_INT_CST_LOW (TYPE_MIN_VALUE (type))); else fprintf (asmfile, ";0"); if (TREE_CODE (TYPE_MAX_VALUE (type)) == INTEGER_CST) - fprintf (asmfile, ";%d;", + fprintf (asmfile, ";%d;", TREE_INT_CST_LOW (TYPE_MAX_VALUE (type))); else fprintf (asmfile, ";-1;"); @@ -1615,7 +1615,7 @@ dbxout_symbol (decl, local) && !TREE_ASM_WRITTEN (TYPE_NAME (type)) /* Distinguish the implicit typedefs of C++ from explicit ones that might be found in C. */ - && (!strcmp (lang_identify (), "cplusplus") + && (!strcmp (lang_identify (), "cplusplus") /* The following line maybe unnecessary; in 2.6, try removing it. */ || DECL_SOURCE_LINE (decl) == 0)) @@ -1665,7 +1665,7 @@ dbxout_symbol (decl, local) } /* Don't output a tag if this is an incomplete type (TYPE_SIZE is - zero). This prevents the sun4 Sun OS 4.x dbx from crashing. */ + zero). This prevents the sun4 Sun OS 4.x dbx from crashing. */ if (tag_needed && TYPE_NAME (type) != 0 && TYPE_SIZE (type) != 0 && !TREE_ASM_WRITTEN (TYPE_NAME (type))) @@ -1787,7 +1787,7 @@ dbxout_symbol_location (decl, type, suffix, home) /* Don't mention a variable at all if it was completely optimized into nothingness. - + If the decl was from an inline function, then it's rtl is not identically the rtl that was used in this particular compilation. */ diff --git a/gnu/usr.bin/cc/cc_int/dwarfout.c b/gnu/usr.bin/cc/cc_int/dwarfout.c index ccf436b5d18d..c16f204bd15e 100644 --- a/gnu/usr.bin/cc/cc_int/dwarfout.c +++ b/gnu/usr.bin/cc/cc_int/dwarfout.c @@ -4006,7 +4006,7 @@ output_type (type, containing_scope) end_sibling_chain (); break; - case ARRAY_TYPE: + case ARRAY_TYPE: if (TYPE_STRING_FLAG (type) && TREE_CODE(TREE_TYPE(type)) == CHAR_TYPE) { output_type (TREE_TYPE (type), containing_scope); @@ -4843,7 +4843,7 @@ dwarfout_file_scope_decl (decl, set_finalizing) ASM_OUTPUT_PUSH_SECTION (asm_out_file, ARANGES_SECTION); ASM_OUTPUT_DWARF_ADDR (asm_out_file, IDENTIFIER_POINTER (DECL_ASSEMBLER_NAME (decl))); - ASM_OUTPUT_DWARF_DATA4 (asm_out_file, + ASM_OUTPUT_DWARF_DATA4 (asm_out_file, (unsigned) int_size_in_bytes (TREE_TYPE (decl))); ASM_OUTPUT_POP_SECTION (asm_out_file); } @@ -5363,7 +5363,7 @@ dwarfout_init (asm_out_file, main_input_filename) /* Output a starting label and an initial (compilation directory) entry for the .debug_sfnames section. The starting label will be referenced by the initial entry in the .debug_srcinfo section. */ - + fputc ('\n', asm_out_file); ASM_OUTPUT_PUSH_SECTION (asm_out_file, SFNAMES_SECTION); ASM_OUTPUT_LABEL (asm_out_file, SFNAMES_BEGIN_LABEL); @@ -5377,20 +5377,20 @@ dwarfout_init (asm_out_file, main_input_filename) pfatal_with_name ("getpwd"); len = strlen (pwd); dirname = (char *) xmalloc (len + 2); - + strcpy (dirname, pwd); strcpy (dirname + len, "/"); ASM_OUTPUT_DWARF_STRING (asm_out_file, dirname); free (dirname); } ASM_OUTPUT_POP_SECTION (asm_out_file); - + if (debug_info_level >= DINFO_LEVEL_VERBOSE) { /* Output a starting label for the .debug_macinfo section. This label will be referenced by the AT_mac_info attribute in the TAG_compile_unit DIE. */ - + fputc ('\n', asm_out_file); ASM_OUTPUT_PUSH_SECTION (asm_out_file, MACINFO_SECTION); ASM_OUTPUT_LABEL (asm_out_file, MACINFO_BEGIN_LABEL); @@ -5398,16 +5398,16 @@ dwarfout_init (asm_out_file, main_input_filename) } /* Generate the initial entry for the .line section. */ - + fputc ('\n', asm_out_file); ASM_OUTPUT_PUSH_SECTION (asm_out_file, LINE_SECTION); ASM_OUTPUT_LABEL (asm_out_file, LINE_BEGIN_LABEL); ASM_OUTPUT_DWARF_DELTA4 (asm_out_file, LINE_END_LABEL, LINE_BEGIN_LABEL); ASM_OUTPUT_DWARF_ADDR (asm_out_file, TEXT_BEGIN_LABEL); ASM_OUTPUT_POP_SECTION (asm_out_file); - + /* Generate the initial entry for the .debug_srcinfo section. */ - + fputc ('\n', asm_out_file); ASM_OUTPUT_PUSH_SECTION (asm_out_file, SRCINFO_SECTION); ASM_OUTPUT_LABEL (asm_out_file, SRCINFO_BEGIN_LABEL); @@ -5421,16 +5421,16 @@ dwarfout_init (asm_out_file, main_input_filename) ASM_OUTPUT_DWARF_DATA4 (asm_out_file, -1); #endif ASM_OUTPUT_POP_SECTION (asm_out_file); - + /* Generate the initial entry for the .debug_pubnames section. */ - + fputc ('\n', asm_out_file); ASM_OUTPUT_PUSH_SECTION (asm_out_file, PUBNAMES_SECTION); ASM_OUTPUT_DWARF_ADDR (asm_out_file, DEBUG_BEGIN_LABEL); ASM_OUTPUT_POP_SECTION (asm_out_file); - + /* Generate the initial entry for the .debug_aranges section. */ - + fputc ('\n', asm_out_file); ASM_OUTPUT_PUSH_SECTION (asm_out_file, ARANGES_SECTION); ASM_OUTPUT_DWARF_ADDR (asm_out_file, DEBUG_BEGIN_LABEL); @@ -5548,7 +5548,7 @@ dwarfout_finish () if (debug_info_level >= DINFO_LEVEL_NORMAL) { /* Output a terminating entry for the .line section. */ - + fputc ('\n', asm_out_file); ASM_OUTPUT_PUSH_SECTION (asm_out_file, LINE_SECTION); ASM_OUTPUT_LABEL (asm_out_file, LINE_LAST_ENTRY_LABEL); @@ -5557,9 +5557,9 @@ dwarfout_finish () ASM_OUTPUT_DWARF_DELTA4 (asm_out_file, TEXT_END_LABEL, TEXT_BEGIN_LABEL); ASM_OUTPUT_LABEL (asm_out_file, LINE_END_LABEL); ASM_OUTPUT_POP_SECTION (asm_out_file); - + /* Output a terminating entry for the .debug_srcinfo section. */ - + fputc ('\n', asm_out_file); ASM_OUTPUT_PUSH_SECTION (asm_out_file, SRCINFO_SECTION); ASM_OUTPUT_DWARF_DELTA4 (asm_out_file, @@ -5570,7 +5570,7 @@ dwarfout_finish () if (debug_info_level >= DINFO_LEVEL_VERBOSE) { /* Output terminating entries for the .debug_macinfo section. */ - + dwarfout_resume_previous_source_file (0); fputc ('\n', asm_out_file); @@ -5579,15 +5579,15 @@ dwarfout_finish () ASM_OUTPUT_DWARF_STRING (asm_out_file, ""); ASM_OUTPUT_POP_SECTION (asm_out_file); } - + /* Generate the terminating entry for the .debug_pubnames section. */ - + fputc ('\n', asm_out_file); ASM_OUTPUT_PUSH_SECTION (asm_out_file, PUBNAMES_SECTION); ASM_OUTPUT_DWARF_DATA4 (asm_out_file, 0); ASM_OUTPUT_DWARF_STRING (asm_out_file, ""); ASM_OUTPUT_POP_SECTION (asm_out_file); - + /* Generate the terminating entries for the .debug_aranges section. Note that we want to do this only *after* we have output the end @@ -5601,7 +5601,7 @@ dwarfout_finish () entries at this late point in the assembly output, we skirt the issue simply by avoiding forward-references. */ - + fputc ('\n', asm_out_file); ASM_OUTPUT_PUSH_SECTION (asm_out_file, ARANGES_SECTION); diff --git a/gnu/usr.bin/cc/cc_int/emit-rtl.c b/gnu/usr.bin/cc/cc_int/emit-rtl.c index 6671e4ce4a85..9de163c2dea6 100644 --- a/gnu/usr.bin/cc/cc_int/emit-rtl.c +++ b/gnu/usr.bin/cc/cc_int/emit-rtl.c @@ -140,7 +140,7 @@ REAL_VALUE_TYPE dconstm1; When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little tricky: until register elimination has taken place hard_frame_pointer_rtx - should be used if it is being set, and frame_pointer_rtx otherwise. After + should be used if it is being set, and frame_pointer_rtx otherwise. After register elimination hard_frame_pointer_rtx should always be used. On machines where the two registers are same (most) then these are the same. @@ -173,7 +173,7 @@ static rtx const_int_rtx[MAX_SAVED_CONST_INT * 2 + 1]; /* The ends of the doubly-linked chain of rtl for the current function. Both are reset to null at the start of rtl generation for the function. - + start_sequence saves both of these on `sequence_stack' along with `sequence_rtl_expr' and then starts a new, nested sequence of insns. */ @@ -552,7 +552,7 @@ get_first_label_num () /* Return a value representing some low-order bits of X, where the number of low-order bits is given by MODE. Note that no conversion is done - between floating-point and fixed-point values, rather, the bit + between floating-point and fixed-point values, rather, the bit representation is returned. This function handles the cases in common between gen_lowpart, below, @@ -611,7 +611,7 @@ gen_lowpart_common (mode, x) else if (GET_CODE (x) == REG) { /* If the register is not valid for MODE, return 0. If we don't - do this, there is no way to fix up the resulting REG later. + do this, there is no way to fix up the resulting REG later. But we do do this if the current REG is not valid for its mode. This latter is a kludge, but is required due to the way that parameters are passed on some machines, most @@ -676,7 +676,7 @@ gen_lowpart_common (mode, x) /* If X is an integral constant but we want it in floating-point, it must be the case that we have a union of an integer and a floating-point value. If the machine-parameters allow it, simulate that union here - and return the result. The two-word and single-word cases are + and return the result. The two-word and single-word cases are different. */ else if (((HOST_FLOAT_FORMAT == TARGET_FLOAT_FORMAT @@ -875,7 +875,7 @@ gen_lowpart (mode, x) abort (); } -/* Like `gen_lowpart', but refer to the most significant part. +/* Like `gen_lowpart', but refer to the most significant part. This is used to access the imaginary part of a complex number. */ rtx @@ -1162,10 +1162,10 @@ operand_subword (op, i, validate_address, mode) return GEN_INT (u.i); } #endif /* no REAL_ARITHMETIC */ - + /* The only remaining cases that we can handle are integers. Convert to proper endianness now since these cases need it. - At this point, i == 0 means the low-order word. + At this point, i == 0 means the low-order word. We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT in general. However, if OP is (const_int 0), we can just return @@ -1202,7 +1202,7 @@ operand_subword (op, i, validate_address, mode) the required subword, put OP into a register and try again. If that fails, abort. We always validate the address in this case. It is not valid to call this function after reload; it is mostly meant for RTL - generation. + generation. MODE is the mode of OP, in case it is CONST_INT. */ @@ -1289,7 +1289,7 @@ change_address (memref, mode, addr) } else addr = memory_address (mode, addr); - + new = gen_rtx (MEM, mode, addr); MEM_VOLATILE_P (new) = MEM_VOLATILE_P (memref); RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (memref); @@ -2914,7 +2914,7 @@ start_sequence () last_insn = 0; } -/* Similarly, but indicate that this sequence will be placed in +/* Similarly, but indicate that this sequence will be placed in T, an RTL_EXPR. */ void @@ -3095,7 +3095,7 @@ restore_reg_data (first) /* Don't duplicate the uids already in use. */ cur_insn_uid = max_uid + 1; - /* If any regs are missing, make them up. + /* If any regs are missing, make them up. ??? word_mode is not necessarily the right mode. Most likely these REGs are never used. At some point this should be checked. */ @@ -3221,11 +3221,11 @@ init_emit () regno_pointer_flag_length = LAST_VIRTUAL_REGISTER + 101; - regno_pointer_flag + regno_pointer_flag = (char *) oballoc (regno_pointer_flag_length); bzero (regno_pointer_flag, regno_pointer_flag_length); - regno_reg_rtx + regno_reg_rtx = (rtx *) oballoc (regno_pointer_flag_length * sizeof (rtx)); bzero ((char *) regno_reg_rtx, regno_pointer_flag_length * sizeof (rtx)); @@ -3351,7 +3351,7 @@ init_emit_once (line_numbers) hard_frame_pointer_rtx = frame_pointer_rtx; else hard_frame_pointer_rtx = gen_rtx (REG, Pmode, HARD_FRAME_POINTER_REGNUM); - + if (FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM) arg_pointer_rtx = frame_pointer_rtx; else if (HARD_FRAME_POINTER_REGNUM == ARG_POINTER_REGNUM) diff --git a/gnu/usr.bin/cc/cc_int/explow.c b/gnu/usr.bin/cc/cc_int/explow.c index b72e468e050a..f32c5ade1bae 100644 --- a/gnu/usr.bin/cc/cc_int/explow.c +++ b/gnu/usr.bin/cc/cc_int/explow.c @@ -101,7 +101,7 @@ plus_constant_wide (x, c) Look for constant term in the sum and combine with C. For an integer constant term, we make a combined integer. For a constant term that is not an explicit integer, - we cannot really combine, but group them together anyway. + we cannot really combine, but group them together anyway. Use a recursive call in case the remaining operand is something that we handle specially, such as a SYMBOL_REF. */ @@ -521,12 +521,12 @@ copy_to_reg (x) rtx x; { register rtx temp = gen_reg_rtx (GET_MODE (x)); - + /* If not an operand, must be an address with PLUS and MULT so - do the computation. */ + do the computation. */ if (! general_operand (x, VOIDmode)) x = force_operand (x, temp); - + if (x != temp) emit_move_insn (temp, x); @@ -552,9 +552,9 @@ copy_to_mode_reg (mode, x) rtx x; { register rtx temp = gen_reg_rtx (mode); - + /* If not an operand, must be an address with PLUS and MULT so - do the computation. */ + do the computation. */ if (! general_operand (x, VOIDmode)) x = force_operand (x, temp); @@ -851,9 +851,9 @@ emit_stack_save (save_level, psave, after) } /* Restore the stack pointer for the purpose in SAVE_LEVEL. SA is the save - area made by emit_stack_save. If it is zero, we have nothing to do. + area made by emit_stack_save. If it is zero, we have nothing to do. - Put any emitted insns after insn AFTER, if nonzero, otherwise at + Put any emitted insns after insn AFTER, if nonzero, otherwise at current position. */ void @@ -938,7 +938,7 @@ allocate_dynamic_stack_space (size, target, known_align) /* We will need to ensure that the address we return is aligned to BIGGEST_ALIGNMENT. If STACK_DYNAMIC_OFFSET is defined, we don't - always know its final value at this point in the compilation (it + always know its final value at this point in the compilation (it might depend on the size of the outgoing parameter lists, for example), so we must align the value to be returned in that case. (Note that STACK_DYNAMIC_OFFSET will have a default non-zero value if @@ -1074,7 +1074,7 @@ allocate_dynamic_stack_space (size, target, known_align) NULL_RTX, 1); } #endif - + /* Some systems require a particular insn to refer to the stack to make the pages exist. */ #ifdef HAVE_probe diff --git a/gnu/usr.bin/cc/cc_int/expmed.c b/gnu/usr.bin/cc/cc_int/expmed.c index eca928a486e2..1b20377197b7 100644 --- a/gnu/usr.bin/cc/cc_int/expmed.c +++ b/gnu/usr.bin/cc/cc_int/expmed.c @@ -43,7 +43,7 @@ static rtx extract_split_bit_field PROTO((rtx, int, int, int, int)); #define CEIL(x,y) (((x) + (y) - 1) / (y)) /* Non-zero means divides or modulus operations are relatively cheap for - powers of two, so don't use branches; emit the operation instead. + powers of two, so don't use branches; emit the operation instead. Usually, this will mean that the MD file will emit non-branch sequences. */ @@ -421,7 +421,7 @@ store_bit_field (str_rtx, bitsize, bitnum, fieldmode, value, align, total_size) /* Compute offset as multiple of this unit, counting in bytes. */ offset = (bitnum / unit) * GET_MODE_SIZE (bestmode); bitpos = bitnum % unit; - op0 = change_address (op0, bestmode, + op0 = change_address (op0, bestmode, plus_constant (XEXP (op0, 0), offset)); /* Fetch that unit, store the bitfield in it, then store the unit. */ @@ -849,7 +849,7 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp, offset += SUBREG_WORD (op0); op0 = SUBREG_REG (op0); } - + #if BYTES_BIG_ENDIAN /* If OP0 is a register, BITPOS must count within a word. But as we have it, it counts within whatever size OP0 now has. @@ -896,7 +896,7 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp, } /* Handle fields bigger than a word. */ - + if (bitsize > BITS_PER_WORD) { /* Here we transfer the words of the field @@ -943,7 +943,7 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp, build_int_2 (GET_MODE_BITSIZE (mode) - bitsize, 0), NULL_RTX, 0); } - + /* From here on we know the desired field is smaller than a word so we can assume it is an integer. So we can safely extract it as one size of integer, if necessary, and then truncate or extend @@ -1238,7 +1238,7 @@ extract_bit_field (str_rtx, bitsize, bitnum, unsignedp, target = extract_fixed_bit_field (tmode, op0, offset, bitsize, bitpos, target, 0, align); } - } + } else extv_loses: #endif @@ -1422,7 +1422,7 @@ extract_fixed_bit_field (tmode, op0, offset, bitsize, bitpos, } return expand_shift (RSHIFT_EXPR, mode, op0, - build_int_2 (GET_MODE_BITSIZE (mode) - bitsize, 0), + build_int_2 (GET_MODE_BITSIZE (mode) - bitsize, 0), target, 0); } @@ -1446,7 +1446,7 @@ mask_rtx (mode, bitpos, bitsize, complement) if (bitpos + bitsize < HOST_BITS_PER_WIDE_INT) masklow &= ((unsigned HOST_WIDE_INT) -1 >> (HOST_BITS_PER_WIDE_INT - bitpos - bitsize)); - + if (bitpos <= HOST_BITS_PER_WIDE_INT) maskhigh = -1; else @@ -1728,7 +1728,7 @@ expand_shift (code, mode, shifted, amount, target, unsignedp) && INTVAL (op1) > 0 && INTVAL (op1) < GET_MODE_BITSIZE (mode)) temp = expand_binop (mode, left ? rotr_optab : rotl_optab, - shifted, + shifted, GEN_INT (GET_MODE_BITSIZE (mode) - INTVAL (op1)), target, unsignedp, methods); @@ -1759,7 +1759,7 @@ expand_shift (code, mode, shifted, amount, target, unsignedp) } /* We used to try extzv here for logical right shifts, but that was - only useful for one machine, the VAX, and caused poor code + only useful for one machine, the VAX, and caused poor code generation there for lshrdi3, so the code was deleted and a define_expand for lshrsi3 was added to vax.md. */ } @@ -2155,7 +2155,7 @@ expand_mult (mode, op0, op1, target, unsignedp) = (opno == alg.ops - 1 && target != 0 && variant != add_variant ? target : 0); rtx accum_target = preserve ? 0 : accum; - + switch (alg.op[opno]) { case alg_shift: @@ -2876,7 +2876,7 @@ expand_divmod (rem_flag, code, mode, op0, op1, target, unsignedp) rtx t1; t1 = copy_to_mode_reg (compute_mode, op0); - emit_cmp_insn (t1, const0_rtx, GE, + emit_cmp_insn (t1, const0_rtx, GE, NULL_RTX, compute_mode, 0, 0); emit_jump_insn (gen_bge (label)); expand_inc (t1, GEN_INT (abs_d - 1)); @@ -3580,39 +3580,39 @@ make_tree (type, x) } return t; - + case PLUS: return fold (build (PLUS_EXPR, type, make_tree (type, XEXP (x, 0)), make_tree (type, XEXP (x, 1)))); - + case MINUS: return fold (build (MINUS_EXPR, type, make_tree (type, XEXP (x, 0)), make_tree (type, XEXP (x, 1)))); - + case NEG: return fold (build1 (NEGATE_EXPR, type, make_tree (type, XEXP (x, 0)))); case MULT: return fold (build (MULT_EXPR, type, make_tree (type, XEXP (x, 0)), make_tree (type, XEXP (x, 1)))); - + case ASHIFT: return fold (build (LSHIFT_EXPR, type, make_tree (type, XEXP (x, 0)), make_tree (type, XEXP (x, 1)))); - + case LSHIFTRT: return fold (convert (type, build (RSHIFT_EXPR, unsigned_type (type), make_tree (unsigned_type (type), XEXP (x, 0)), make_tree (type, XEXP (x, 1))))); - + case ASHIFTRT: return fold (convert (type, build (RSHIFT_EXPR, signed_type (type), make_tree (signed_type (type), XEXP (x, 0)), make_tree (type, XEXP (x, 1))))); - + case DIV: if (TREE_CODE (type) != REAL_TYPE) t = signed_type (type); @@ -3702,7 +3702,7 @@ expand_and (op0, op1, target) Return 0 if that cannot be done. MODE is the mode to use for OP0 and OP1 should they be CONST_INTs. If - it is VOIDmode, they cannot both be CONST_INT. + it is VOIDmode, they cannot both be CONST_INT. UNSIGNEDP is for the case where we have to widen the operands to perform the operation. It says to use zero-extension. @@ -3744,7 +3744,7 @@ emit_store_flag (target, code, op0, op1, mode, unsignedp, normalizep) code = swap_condition (code); } - /* For some comparisons with 1 and -1, we can convert this to + /* For some comparisons with 1 and -1, we can convert this to comparisons with zero. This will often produce more opportunities for store-flag insns. */ @@ -3785,7 +3785,7 @@ emit_store_flag (target, code, op0, op1, mode, unsignedp, normalizep) && GET_MODE_CLASS (mode) == MODE_INT && (normalizep || STORE_FLAG_VALUE == 1 || (GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT - && (STORE_FLAG_VALUE + && (STORE_FLAG_VALUE == (HOST_WIDE_INT) 1 << (GET_MODE_BITSIZE (mode) - 1))))) { subtarget = target; @@ -3840,7 +3840,7 @@ emit_store_flag (target, code, op0, op1, mode, unsignedp, normalizep) : const_true_rtx); /* If the code of COMPARISON doesn't match CODE, something is - wrong; we can no longer be sure that we have the operation. + wrong; we can no longer be sure that we have the operation. We could handle this case, but it should not happen. */ if (GET_CODE (comparison) != code) @@ -3912,7 +3912,7 @@ emit_store_flag (target, code, op0, op1, mode, unsignedp, normalizep) else abort (); - /* If we were converting to a smaller mode, do the + /* If we were converting to a smaller mode, do the conversion now. */ if (target_mode != compare_mode) { @@ -3954,7 +3954,7 @@ emit_store_flag (target, code, op0, op1, mode, unsignedp, normalizep) return tem; } - /* Some other cases we can do are EQ, NE, LE, and GT comparisons with + /* Some other cases we can do are EQ, NE, LE, and GT comparisons with the constant zero. Reject all other comparisons at this point. Only do LE and GT if branches are expensive since they are expensive on 2-operand machines. */ @@ -4016,14 +4016,14 @@ emit_store_flag (target, code, op0, op1, mode, unsignedp, normalizep) tem = expand_binop (mode, sub_optab, tem, op0, subtarget, 0, OPTAB_WIDEN); } - + if (code == EQ || code == NE) { /* For EQ or NE, one way to do the comparison is to apply an operation that converts the operand into a positive number if it is non-zero or zero if it was originally zero. Then, for EQ, we subtract 1 and for NE we negate. This puts the result in the sign bit. Then we - normalize with a shift, if needed. + normalize with a shift, if needed. Two operations that can do the above actions are ABS and FFS, so try them. If that doesn't work, and MODE is smaller than a full word, diff --git a/gnu/usr.bin/cc/cc_int/expr.c b/gnu/usr.bin/cc/cc_int/expr.c index 780955307e96..70678c53eca0 100644 --- a/gnu/usr.bin/cc/cc_int/expr.c +++ b/gnu/usr.bin/cc/cc_int/expr.c @@ -242,7 +242,7 @@ bc_init_mode_to_opcode_maps () mode_to_const_map[mode] = mode_to_load_map[mode] = mode_to_store_map[mode] = neverneverland; - + #define DEF_MODEMAP(SYM, CODE, UCODE, CONST, LOAD, STORE) \ mode_to_const_map[(int) SYM] = CONST; \ mode_to_load_map[(int) SYM] = LOAD; \ @@ -318,7 +318,7 @@ init_expr_once () end_sequence (); } - + /* This is run at the start of compiling a function. */ void @@ -1125,7 +1125,7 @@ convert_move (to, from, unsignedp) } } - /* Support special truncate insns for certain modes. */ + /* Support special truncate insns for certain modes. */ if (from_mode == DImode && to_mode == SImode) { @@ -1321,7 +1321,7 @@ convert_modes (mode, oldmode, x, unsignedp) if (GET_MODE (x) != VOIDmode) oldmode = GET_MODE (x); - + if (mode == oldmode) return x; @@ -1965,7 +1965,7 @@ emit_move_insn_1 (x, y) { rtx last_insn = 0; rtx insns; - + #ifdef PUSH_ROUNDING /* If X is a push on the stack, do the push now and replace @@ -1976,7 +1976,7 @@ emit_move_insn_1 (x, y) x = change_address (x, VOIDmode, stack_pointer_rtx); } #endif - + for (i = 0; i < (GET_MODE_SIZE (mode) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD; i++) @@ -2132,7 +2132,7 @@ emit_push_insn (x, mode, type, size, align, partial, reg, extra, int used = partial * UNITS_PER_WORD; int offset = used % (PARM_BOUNDARY / BITS_PER_UNIT); int skip; - + if (size == 0) abort (); @@ -2903,7 +2903,7 @@ store_expr (exp, target, want_value) && ! (GET_CODE (target) == REG && REGNO (target) < FIRST_PSEUDO_REGISTER)) return copy_to_reg (target); - + else return target; } @@ -3326,7 +3326,7 @@ get_inner_reference (exp, pbitsize, pbitpos, poffset, pmode, *pbitsize = GET_MODE_BITSIZE (mode); *punsignedp = TREE_UNSIGNED (TREE_TYPE (exp)); } - + if (size_tree) { if (TREE_CODE (size_tree) != INTEGER_CST) @@ -3518,7 +3518,7 @@ force_operand (value, target) force_operand (XEXP (XEXP (value, 0), 1), 0), target, 0, OPTAB_LIB_WIDEN); } - + tmp = force_operand (XEXP (value, 0), subtarget); return expand_binop (GET_MODE (value), binoptab, tmp, force_operand (op2, NULL_RTX), @@ -4039,8 +4039,8 @@ expand_expr (exp, target, tmode, modifier) case REAL_CST: /* If optimized, generate immediate CONST_DOUBLE - which will be turned into memory by reload if necessary. - + which will be turned into memory by reload if necessary. + We used to force a register so that loop.c could see it. But this does not allow gen_* patterns to perform optimizations with the constants. It also produces two insns in cases like "x = 1.0;". @@ -4470,7 +4470,7 @@ expand_expr (exp, target, tmode, modifier) tmode, modifier); } } - + else if (optimize >= 1 && TREE_READONLY (array) && ! TREE_SIDE_EFFECTS (array) && TREE_CODE (array) == VAR_DECL && DECL_INITIAL (array) @@ -5016,7 +5016,7 @@ expand_expr (exp, target, tmode, modifier) op0 = eliminate_constant_term (op0, &constant_term); /* CONSTANT_TERM and XEXP (op1, 1) are known to be constant, so - their sum should be a constant. Form it into OP1, since the + their sum should be a constant. Form it into OP1, since the result we want will then be OP0 + OP1. */ temp = simplify_binary_operation (PLUS, mode, constant_term, @@ -5485,7 +5485,7 @@ expand_expr (exp, target, tmode, modifier) /* If we are not to produce a result, we have no target. Otherwise, if a target was specified use it; it will not be used as an - intermediate target unless it is safe. If no target, use a + intermediate target unless it is safe. If no target, use a temporary. */ if (ignore) @@ -5578,7 +5578,7 @@ expand_expr (exp, target, tmode, modifier) TREE_OPERAND (exp, 0) = invert_truthvalue (TREE_OPERAND (exp, 0)); } - + NO_DEFER_POP; op0 = gen_label_rtx (); @@ -5628,7 +5628,7 @@ expand_expr (exp, target, tmode, modifier) #if 0 /* This is now done in jump.c and is better done there because it produces shorter register lifetimes. */ - + /* Check for both possibilities either constants or variables in registers (but not the same as the target!). If so, can save branches by assigning one, branching, and assigning the @@ -5871,7 +5871,7 @@ expand_expr (exp, target, tmode, modifier) if (need_exception_region) (*interim_eh_hook) (NULL_TREE); - + return temp; } @@ -6035,7 +6035,7 @@ expand_expr (exp, target, tmode, modifier) if (GET_CODE (op0) != MEM) abort (); - + if (modifier == EXPAND_SUM || modifier == EXPAND_INITIALIZER) return XEXP (op0, 0); @@ -6095,7 +6095,7 @@ expand_expr (exp, target, tmode, modifier) case REALPART_EXPR: op0 = expand_expr (TREE_OPERAND (exp, 0), 0, VOIDmode, 0); return gen_realpart (mode, op0); - + case IMAGPART_EXPR: op0 = expand_expr (TREE_OPERAND (exp, 0), 0, VOIDmode, 0); return gen_imagpart (mode, op0); @@ -6105,12 +6105,12 @@ expand_expr (exp, target, tmode, modifier) enum machine_mode partmode = TYPE_MODE (TREE_TYPE (TREE_TYPE (exp))); rtx imag_t; rtx insns; - + op0 = expand_expr (TREE_OPERAND (exp, 0), 0, VOIDmode, 0); if (! target) target = gen_reg_rtx (mode); - + start_sequence (); /* Store the realpart and the negated imagpart to target. */ @@ -6126,7 +6126,7 @@ expand_expr (exp, target, tmode, modifier) insns = get_insns (); end_sequence (); - /* Conjugate should appear as a single unit + /* Conjugate should appear as a single unit If TARGET is a CONCAT, we got insns like RD = RS, ID = - IS, each with a separate pseudo as destination. It's not correct for flow to treat them as a unit. */ @@ -6178,30 +6178,30 @@ bc_expand_expr (exp) struct increment_operator *incroptab; struct bc_label *lab, *lab1; enum bytecode_opcode opcode; - - + + code = TREE_CODE (exp); - + switch (code) { case PARM_DECL: - + if (DECL_RTL (exp) == 0) { error_with_decl (exp, "prior parameter's size depends on `%s'"); return; } - + bc_load_parmaddr (DECL_RTL (exp)); bc_load_memory (TREE_TYPE (exp), exp); - + return; - + case VAR_DECL: - + if (DECL_RTL (exp) == 0) abort (); - + #if 0 if (BYTECODE_LABEL (DECL_RTL (exp))) bc_load_externaddr (DECL_RTL (exp)); @@ -6213,12 +6213,12 @@ bc_expand_expr (exp) BYTECODE_BC_LABEL (DECL_RTL (exp))->offset); else bc_load_localaddr (DECL_RTL (exp)); - + bc_load_memory (TREE_TYPE (exp), exp); return; - + case INTEGER_CST: - + #ifdef DEBUG_PRINT_CODE fprintf (stderr, " [%x]\n", TREE_INT_CST_LOW (exp)); #endif @@ -6227,9 +6227,9 @@ bc_expand_expr (exp) : TYPE_MODE (TREE_TYPE (exp)))], (HOST_WIDE_INT) TREE_INT_CST_LOW (exp)); return; - + case REAL_CST: - + #if 0 #ifdef DEBUG_PRINT_CODE fprintf (stderr, " [%g]\n", (double) TREE_INT_CST_LOW (exp)); @@ -6242,9 +6242,9 @@ bc_expand_expr (exp) #endif return; - + case CALL_EXPR: - + /* We build a call description vector describing the type of the return value and of the arguments; this call vector, together with a pointer to a location for the return value @@ -6256,18 +6256,18 @@ bc_expand_expr (exp) tree calldesc = 0, arg; int nargs = 0, i; rtx retval; - + /* Push the evaluated args on the evaluation stack in reverse order. Also make an entry for each arg in the calldesc vector while we're at it. */ - + TREE_OPERAND (exp, 1) = nreverse (TREE_OPERAND (exp, 1)); - + for (arg = TREE_OPERAND (exp, 1); arg; arg = TREE_CHAIN (arg)) { ++nargs; bc_expand_expr (TREE_VALUE (arg)); - + calldesc = tree_cons ((tree) 0, size_in_bytes (TREE_TYPE (TREE_VALUE (arg))), calldesc); @@ -6275,50 +6275,50 @@ bc_expand_expr (exp) bc_runtime_type_code (TREE_TYPE (TREE_VALUE (arg))), calldesc); } - + TREE_OPERAND (exp, 1) = nreverse (TREE_OPERAND (exp, 1)); - + /* Allocate a location for the return value and push its address on the evaluation stack. Also make an entry at the front of the calldesc for the return value type. */ - + type = TREE_TYPE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp, 0)))); retval = bc_allocate_local (int_size_in_bytes (type), TYPE_ALIGN (type)); bc_load_localaddr (retval); - + calldesc = tree_cons ((tree) 0, size_in_bytes (type), calldesc); calldesc = tree_cons ((tree) 0, bc_runtime_type_code (type), calldesc); - + /* Prepend the argument count. */ calldesc = tree_cons ((tree) 0, build_int_2 (nargs, 0), calldesc); - + /* Push the address of the call description vector on the stack. */ calldesc = build_nt (CONSTRUCTOR, (tree) 0, calldesc); TREE_TYPE (calldesc) = build_array_type (integer_type_node, build_index_type (build_int_2 (nargs * 2, 0))); r = output_constant_def (calldesc); bc_load_externaddr (r); - + /* Push the address of the function to be called. */ bc_expand_expr (TREE_OPERAND (exp, 0)); - + /* Call the function, popping its address and the calldesc vector address off the evaluation stack in the process. */ bc_emit_instruction (call); - + /* Pop the arguments off the stack. */ bc_adjust_stack (nargs); - + /* Load the return value onto the stack. */ bc_load_localaddr (retval); bc_load_memory (type, TREE_OPERAND (exp, 0)); } return; - + case SAVE_EXPR: - + if (!SAVE_EXPR_RTL (exp)) { /* First time around: copy to local variable */ @@ -6326,7 +6326,7 @@ bc_expand_expr (exp) TYPE_ALIGN (TREE_TYPE(exp))); bc_expand_expr (TREE_OPERAND (exp, 0)); bc_emit_instruction (duplicate); - + bc_load_localaddr (SAVE_EXPR_RTL (exp)); bc_store_memory (TREE_TYPE (exp), TREE_OPERAND (exp, 0)); } @@ -6337,68 +6337,68 @@ bc_expand_expr (exp) bc_load_memory (TREE_TYPE (exp), TREE_OPERAND (exp, 0)); } return; - + #if 0 /* FIXME: the XXXX_STMT codes have been removed in GCC2, but how are they handled instead? */ case LET_STMT: - + TREE_USED (exp) = 1; bc_expand_expr (STMT_BODY (exp)); return; #endif - + case NOP_EXPR: case CONVERT_EXPR: - + bc_expand_expr (TREE_OPERAND (exp, 0)); bc_expand_conversion (TREE_TYPE (TREE_OPERAND (exp, 0)), TREE_TYPE (exp)); return; - + case MODIFY_EXPR: - + expand_assignment (TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1), 0, 0); return; - + case ADDR_EXPR: - + bc_expand_address (TREE_OPERAND (exp, 0)); return; - + case INDIRECT_REF: - + bc_expand_expr (TREE_OPERAND (exp, 0)); bc_load_memory (TREE_TYPE (exp), TREE_OPERAND (exp, 0)); return; - + case ARRAY_REF: - + bc_expand_expr (bc_canonicalize_array_ref (exp)); return; - + case COMPONENT_REF: - + bc_expand_component_address (exp); - + /* If we have a bitfield, generate a proper load */ bc_load_memory (TREE_TYPE (TREE_OPERAND (exp, 1)), TREE_OPERAND (exp, 1)); return; - + case COMPOUND_EXPR: - + bc_expand_expr (TREE_OPERAND (exp, 0)); bc_emit_instruction (drop); bc_expand_expr (TREE_OPERAND (exp, 1)); return; - + case COND_EXPR: - + bc_expand_expr (TREE_OPERAND (exp, 0)); bc_expand_truth_conversion (TREE_TYPE (TREE_OPERAND (exp, 0))); lab = bc_get_bytecode_label (); bc_emit_bytecode (xjumpifnot); bc_emit_bytecode_labelref (lab); - + #ifdef DEBUG_PRINT_CODE fputc ('\n', stderr); #endif @@ -6406,63 +6406,63 @@ bc_expand_expr (exp) lab1 = bc_get_bytecode_label (); bc_emit_bytecode (jump); bc_emit_bytecode_labelref (lab1); - + #ifdef DEBUG_PRINT_CODE fputc ('\n', stderr); #endif - + bc_emit_bytecode_labeldef (lab); bc_expand_expr (TREE_OPERAND (exp, 2)); bc_emit_bytecode_labeldef (lab1); return; - + case TRUTH_ANDIF_EXPR: - + opcode = xjumpifnot; goto andorif; - + case TRUTH_ORIF_EXPR: - + opcode = xjumpif; goto andorif; - + case PLUS_EXPR: - + binoptab = optab_plus_expr; goto binop; - + case MINUS_EXPR: - + binoptab = optab_minus_expr; goto binop; - + case MULT_EXPR: - + binoptab = optab_mult_expr; goto binop; - + case TRUNC_DIV_EXPR: case FLOOR_DIV_EXPR: case CEIL_DIV_EXPR: case ROUND_DIV_EXPR: case EXACT_DIV_EXPR: - + binoptab = optab_trunc_div_expr; goto binop; - + case TRUNC_MOD_EXPR: case FLOOR_MOD_EXPR: case CEIL_MOD_EXPR: case ROUND_MOD_EXPR: - + binoptab = optab_trunc_mod_expr; goto binop; - + case FIX_ROUND_EXPR: case FIX_FLOOR_EXPR: case FIX_CEIL_EXPR: abort (); /* Not used for C. */ - + case FIX_TRUNC_EXPR: case FLOAT_EXPR: case MAX_EXPR: @@ -6471,135 +6471,135 @@ bc_expand_expr (exp) case LROTATE_EXPR: case RROTATE_EXPR: abort (); /* FIXME */ - + case RDIV_EXPR: - + binoptab = optab_rdiv_expr; goto binop; - + case BIT_AND_EXPR: - + binoptab = optab_bit_and_expr; goto binop; - + case BIT_IOR_EXPR: - + binoptab = optab_bit_ior_expr; goto binop; - + case BIT_XOR_EXPR: - + binoptab = optab_bit_xor_expr; goto binop; - + case LSHIFT_EXPR: - + binoptab = optab_lshift_expr; goto binop; - + case RSHIFT_EXPR: - + binoptab = optab_rshift_expr; goto binop; - + case TRUTH_AND_EXPR: - + binoptab = optab_truth_and_expr; goto binop; - + case TRUTH_OR_EXPR: - + binoptab = optab_truth_or_expr; goto binop; - + case LT_EXPR: - + binoptab = optab_lt_expr; goto binop; - + case LE_EXPR: - + binoptab = optab_le_expr; goto binop; - + case GE_EXPR: - + binoptab = optab_ge_expr; goto binop; - + case GT_EXPR: - + binoptab = optab_gt_expr; goto binop; - + case EQ_EXPR: - + binoptab = optab_eq_expr; goto binop; - + case NE_EXPR: - + binoptab = optab_ne_expr; goto binop; - + case NEGATE_EXPR: - + unoptab = optab_negate_expr; goto unop; - + case BIT_NOT_EXPR: - + unoptab = optab_bit_not_expr; goto unop; - + case TRUTH_NOT_EXPR: - + unoptab = optab_truth_not_expr; goto unop; - + case PREDECREMENT_EXPR: - + incroptab = optab_predecrement_expr; goto increment; - + case PREINCREMENT_EXPR: - + incroptab = optab_preincrement_expr; goto increment; - + case POSTDECREMENT_EXPR: - + incroptab = optab_postdecrement_expr; goto increment; - + case POSTINCREMENT_EXPR: - + incroptab = optab_postincrement_expr; goto increment; - + case CONSTRUCTOR: - + bc_expand_constructor (exp); return; - + case ERROR_MARK: case RTL_EXPR: - + return; - + case BIND_EXPR: { tree vars = TREE_OPERAND (exp, 0); int vars_need_expansion = 0; - + /* Need to open a binding contour here because if there are any cleanups they most be contained here. */ expand_start_bindings (0); - + /* Mark the corresponding BLOCK for output. */ if (TREE_OPERAND (exp, 2) != 0) TREE_USED (TREE_OPERAND (exp, 2)) = 1; - + /* If VARS have not yet been expanded, expand them now. */ while (vars) { @@ -6611,65 +6611,65 @@ bc_expand_expr (exp) expand_decl_init (vars); vars = TREE_CHAIN (vars); } - + bc_expand_expr (TREE_OPERAND (exp, 1)); - + expand_end_bindings (TREE_OPERAND (exp, 0), 0, 0); - + return; } } - + abort (); - + binop: - + bc_expand_binary_operation (binoptab, TREE_TYPE (exp), TREE_OPERAND (exp, 0), TREE_OPERAND (exp, 1)); return; - - + + unop: - + bc_expand_unary_operation (unoptab, TREE_TYPE (exp), TREE_OPERAND (exp, 0)); return; - - + + andorif: - + bc_expand_expr (TREE_OPERAND (exp, 0)); bc_expand_truth_conversion (TREE_TYPE (TREE_OPERAND (exp, 0))); lab = bc_get_bytecode_label (); - + bc_emit_instruction (duplicate); bc_emit_bytecode (opcode); bc_emit_bytecode_labelref (lab); - + #ifdef DEBUG_PRINT_CODE fputc ('\n', stderr); #endif - + bc_emit_instruction (drop); - + bc_expand_expr (TREE_OPERAND (exp, 1)); bc_expand_truth_conversion (TREE_TYPE (TREE_OPERAND (exp, 1))); bc_emit_bytecode_labeldef (lab); return; - - + + increment: - + type = TREE_TYPE (TREE_OPERAND (exp, 0)); - + /* Push the quantum. */ bc_expand_expr (TREE_OPERAND (exp, 1)); - + /* Convert it to the lvalue's type. */ bc_expand_conversion (TREE_TYPE (TREE_OPERAND (exp, 1)), type); - + /* Push the address of the lvalue */ bc_expand_expr (build1 (ADDR_EXPR, TYPE_POINTER_TO (type), TREE_OPERAND (exp, 0))); - + /* Perform actual increment */ bc_expand_increment (incroptab, type); return; @@ -6984,7 +6984,7 @@ expand_builtin (exp, target, subtarget, mode, ignore) insns = get_insns (); end_sequence (); emit_insns (insns); - + return target; /* __builtin_apply_args returns block of memory allocated on @@ -7284,7 +7284,7 @@ expand_builtin (exp, target, subtarget, mode, ignore) } else { - int count = TREE_INT_CST_LOW (TREE_VALUE (arglist)); + int count = TREE_INT_CST_LOW (TREE_VALUE (arglist)); rtx tem = frame_pointer_rtx; int i; @@ -7641,7 +7641,7 @@ expand_builtin (exp, target, subtarget, mode, ignore) } else return convert_to_mode (mode, result, 0); - } + } #else case BUILT_IN_STRCMP: case BUILT_IN_MEMCMP: @@ -7681,11 +7681,11 @@ static enum machine_mode apply_result_mode[FIRST_PSEUDO_REGISTER]; used for calling a function. */ static int apply_args_reg_offset[FIRST_PSEUDO_REGISTER]; -/* Return the offset of register REGNO into the block returned by +/* Return the offset of register REGNO into the block returned by __builtin_apply_args. This is not declared static, since it is needed in objc-act.c. */ -int +int apply_args_register_offset (regno) int regno; { @@ -7836,7 +7836,7 @@ result_vector (savep, result) enum machine_mode mode; rtx reg, mem; rtx *savevec = (rtx *) alloca (FIRST_PSEUDO_REGISTER * sizeof (rtx)); - + size = nelts = 0; for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++) if ((mode = apply_result_mode[regno]) != VOIDmode) @@ -8427,7 +8427,7 @@ defer_cleanups_to (old_cleanups) (*interim_eh_hook) (TREE_VALUE (cleanups_this_call)); last = cleanups_this_call; cleanups_this_call = TREE_CHAIN (cleanups_this_call); - } + } if (last) { @@ -8795,7 +8795,7 @@ do_jump (exp, if_false_label, if_true_label) do_jump (TREE_OPERAND (exp, 0), if_true_label, if_false_label); else if (((GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0)))) == MODE_INT) - && + && !can_compare_p (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))))) || GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0)))) == MODE_COMPLEX_FLOAT || GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0)))) == MODE_COMPLEX_INT) @@ -8809,7 +8809,7 @@ do_jump (exp, if_false_label, if_true_label) do_jump (TREE_OPERAND (exp, 0), if_false_label, if_true_label); else if (((GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0)))) == MODE_INT) - && + && !can_compare_p (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0))))) || GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0)))) == MODE_COMPLEX_FLOAT || GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (TREE_OPERAND (exp, 0)))) == MODE_COMPLEX_INT) @@ -9274,7 +9274,7 @@ compare_from_rtx (op0, op1, code, unsignedp, mode, size, align) unsignedp = 1; } #endif - + emit_cmp_insn (op0, op1, code, size, mode, unsignedp, align); return gen_rtx (code, VOIDmode, cc0_rtx, const0_rtx); @@ -9478,7 +9478,7 @@ do_store_flag (exp, target, mode, only_cheap) else return 0; } - + preexpand_calls (exp); if (subtarget == 0 || GET_CODE (subtarget) != REG || GET_MODE (subtarget) != operand_mode @@ -9621,12 +9621,12 @@ bc_load_memory (type, decl) tree type, decl; { enum bytecode_opcode opcode; - - + + /* Bit fields are special. We only know about signed and unsigned ints, and enums. The latter are treated as signed integers. */ - + if (DECL_BIT_FIELD (decl)) if (TREE_CODE (type) == ENUMERAL_TYPE || TREE_CODE (type) == INTEGER_TYPE) @@ -9643,9 +9643,9 @@ bc_load_memory (type, decl) if (opcode == neverneverland) abort (); - + bc_emit_bytecode (opcode); - + #ifdef DEBUG_PRINT_CODE fputc ('\n', stderr); #endif @@ -9661,8 +9661,8 @@ bc_store_memory (type, decl) tree type, decl; { enum bytecode_opcode opcode; - - + + if (DECL_BIT_FIELD (decl)) { if (TREE_CODE (type) == ENUMERAL_TYPE @@ -9681,7 +9681,7 @@ bc_store_memory (type, decl) are already on the stack; so we just put the size on level 1. For some other languages, the size may be variable, this is why we don't encode it as a storeBLK literal, but rather treat it as a full-fledged expression. */ - + bc_expand_expr (TYPE_SIZE (type)); opcode = storeBLK; } @@ -9692,7 +9692,7 @@ bc_store_memory (type, decl) abort (); bc_emit_bytecode (opcode); - + #ifdef DEBUG_PRINT_CODE fputc ('\n', stderr); #endif @@ -9956,7 +9956,7 @@ bc_expand_address (exp) /* If packed, also return offset and size */ if (DECL_BIT_FIELD (TREE_OPERAND (exp, 0))) - + bc_push_offset_and_size (TREE_INT_CST_LOW (DECL_FIELD_BITPOS (TREE_OPERAND (exp, 0))), TREE_INT_CST_LOW (DECL_SIZE (TREE_OPERAND (exp, 0)))); @@ -10011,13 +10011,13 @@ bc_expand_address (exp) if (DECL_BIT_FIELD (exp)) bc_push_offset_and_size (TREE_INT_CST_LOW (DECL_FIELD_BITPOS (exp)), TREE_INT_CST_LOW (DECL_SIZE (exp))); - + break; case STRING_CST: { rtx r; - + bc_emit_bytecode (constP); r = output_constant_def (exp); bc_emit_code_labelref (BYTECODE_LABEL (r), BYTECODE_BC_LABEL (r)->offset); @@ -10103,11 +10103,11 @@ bc_expand_constructor (constr) HOST_WIDE_INT ptroffs; rtx constr_rtx; - + /* Literal constructors are handled as constants, whereas non-literals are evaluated and stored element by element into the data segment. */ - + /* Allocate space in proper segment and push pointer to space on stack. */ @@ -10128,7 +10128,7 @@ bc_expand_constructor (constr) bc_output_data_constructor (constr); } - + /* Add reference to pointer table and recall pointer to stack; this code is common for both types of constructors: literals and non-literals. */ @@ -10143,15 +10143,15 @@ bc_expand_constructor (constr) /* At this point, we have the pointer to the structure on top of the stack. Generate sequences of store_memory calls for the constructor. */ - + /* constructor type is structure */ if (TREE_CODE (TREE_TYPE (constr)) == RECORD_TYPE) { register tree elt; - + /* If the constructor has fewer fields than the structure, clear the whole structure first. */ - + if (list_length (CONSTRUCTOR_ELTS (constr)) != list_length (TYPE_FIELDS (TREE_TYPE (constr)))) { @@ -10159,10 +10159,10 @@ bc_expand_constructor (constr) bc_emit_instruction (constSI, (HOST_WIDE_INT) int_size_in_bytes (TREE_TYPE (constr))); bc_emit_instruction (clearBLK); } - + /* Store each element of the constructor into the corresponding field of TARGET. */ - + for (elt = CONSTRUCTOR_ELTS (constr); elt; elt = TREE_CHAIN (elt)) { register tree field = TREE_PURPOSE (elt); @@ -10170,13 +10170,13 @@ bc_expand_constructor (constr) int bitsize; int bitpos; int unsignedp; - + bitsize = TREE_INT_CST_LOW (DECL_SIZE (field)) /* * DECL_SIZE_UNIT (field) */; mode = DECL_MODE (field); unsignedp = TREE_UNSIGNED (field); bitpos = TREE_INT_CST_LOW (DECL_FIELD_BITPOS (field)); - + bc_store_field (elt, bitsize, bitpos, mode, TREE_VALUE (elt), TREE_TYPE (TREE_VALUE (elt)), /* The alignment of TARGET is at least what its type requires. */ @@ -10186,7 +10186,7 @@ bc_expand_constructor (constr) } } else - + /* Constructor type is array */ if (TREE_CODE (TREE_TYPE (constr)) == ARRAY_TYPE) { @@ -10196,21 +10196,21 @@ bc_expand_constructor (constr) int minelt = TREE_INT_CST_LOW (TYPE_MIN_VALUE (domain)); int maxelt = TREE_INT_CST_LOW (TYPE_MAX_VALUE (domain)); tree elttype = TREE_TYPE (TREE_TYPE (constr)); - + /* If the constructor has fewer fields than the structure, clear the whole structure first. */ - + if (list_length (CONSTRUCTOR_ELTS (constr)) < maxelt - minelt + 1) { bc_emit_instruction (duplicate); bc_emit_instruction (constSI, (HOST_WIDE_INT) int_size_in_bytes (TREE_TYPE (constr))); bc_emit_instruction (clearBLK); } - - + + /* Store each element of the constructor into the corresponding element of TARGET, determined by counting the elements. */ - + for (elt = CONSTRUCTOR_ELTS (constr), i = 0; elt; elt = TREE_CHAIN (elt), i++) @@ -10219,14 +10219,14 @@ bc_expand_constructor (constr) int bitsize; int bitpos; int unsignedp; - + mode = TYPE_MODE (elttype); bitsize = GET_MODE_BITSIZE (mode); unsignedp = TREE_UNSIGNED (elttype); - + bitpos = (i * TREE_INT_CST_LOW (TYPE_SIZE (elttype)) /* * TYPE_SIZE_UNIT (elttype) */ ); - + bc_store_field (elt, bitsize, bitpos, mode, TREE_VALUE (elt), TREE_TYPE (TREE_VALUE (elt)), /* The alignment of TARGET is @@ -10235,7 +10235,7 @@ bc_expand_constructor (constr) TYPE_ALIGN (TREE_TYPE (constr)) / BITS_PER_UNIT, int_size_in_bytes (TREE_TYPE (constr))); } - + } } @@ -10311,7 +10311,7 @@ bc_load_bit_field (offset, size, unsignedp) /* Load: sign-extend if signed, else zero-extend */ bc_emit_instruction (unsignedp ? zxloadBI : sxloadBI); -} +} /* Adjust interpreter stack by NLEVELS. Positive means drop NLEVELS @@ -10327,16 +10327,16 @@ bc_adjust_stack (nlevels) { case 0: break; - + case 2: bc_emit_instruction (drop); - + case 1: bc_emit_instruction (drop); break; - + default: - + bc_emit_instruction (adjstackSI, (HOST_WIDE_INT) nlevels); stack_depth -= nlevels; } diff --git a/gnu/usr.bin/cc/cc_int/final.c b/gnu/usr.bin/cc/cc_int/final.c index 157510adc643..0bfc8927125b 100644 --- a/gnu/usr.bin/cc/cc_int/final.c +++ b/gnu/usr.bin/cc/cc_int/final.c @@ -110,7 +110,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';') #endif -/* Nonzero means this function is a leaf function, with no function calls. +/* Nonzero means this function is a leaf function, with no function calls. This variable exists to be examined in FUNCTION_PROLOGUE and FUNCTION_EPILOGUE. Always zero, unless set by some action. */ int leaf_function; @@ -520,7 +520,7 @@ app_disable () } } -/* Return the number of slots filled in the current +/* Return the number of slots filled in the current delayed branch sequence (we don't count the insn needing the delay slot). Zero if not in a delayed branch sequence. */ @@ -663,7 +663,7 @@ shorten_branches (first) insn_addresses[uid] = insn_current_address; insn_lengths[uid] = 0; varying_length[uid] = 0; - + if (GET_CODE (insn) == NOTE || GET_CODE (insn) == BARRIER || GET_CODE (insn) == CODE_LABEL) continue; @@ -711,7 +711,7 @@ shorten_branches (first) * insn_default_length (inner_insn)); else inner_length = insn_default_length (inner_insn); - + insn_lengths[inner_uid] = inner_length; if (const_delay_slots) { @@ -762,7 +762,7 @@ shorten_branches (first) if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE) { int i; - + body = PATTERN (insn); new_length = 0; for (i = 0; i < XVECLEN (body, 0); i++) @@ -872,7 +872,7 @@ final_start_function (first, file, optimize) regs_ever_live[i] = 1; } #endif - + /* Initial line number is supposed to be output before the function's prologue and label so that the function's address will not appear to be @@ -892,7 +892,7 @@ final_start_function (first, file, optimize) last_linenum = NOTE_LINE_NUMBER (first); xcoffout_output_first_source_line (file, last_linenum); } -#endif +#endif else output_source_line (file, first); } @@ -1468,7 +1468,7 @@ final_scan_insn (insn, file, optimize, prescan, nopeepholes) #ifdef ASM_OUTPUT_ALIGN_CODE /* Don't litter the assembler output with needless alignments. A BARRIER will be placed at the end of every function if HAVE_epilogue - is true. */ + is true. */ if (NEXT_INSN (insn)) ASM_OUTPUT_ALIGN_CODE (file); #endif @@ -1982,11 +1982,11 @@ final_scan_insn (insn, file, optimize, prescan, nopeepholes) /* If we didn't split the insn, go away. */ if (new == insn && PATTERN (new) == body) abort (); - + new_block = 0; return new; } - + if (prescan > 0) break; @@ -2431,7 +2431,7 @@ output_asm_insn (template, operands) } else output_operand (operands[c], letter); - + while ((c = *p) >= '0' && c <= '9') p++; } /* % followed by a digit outputs an operand the default way. */ @@ -2466,7 +2466,7 @@ output_asm_insn (template, operands) if (debug_insn) { register int num = INSN_CODE (debug_insn); - fprintf (asm_out_file, " %s %d %s", + fprintf (asm_out_file, " %s %d %s", ASM_COMMENT_START, INSN_UID (debug_insn), insn_name[num]); if (insn_n_alternatives[num] > 1) fprintf (asm_out_file, "/%d", which_alternative + 1); diff --git a/gnu/usr.bin/cc/cc_int/flow.c b/gnu/usr.bin/cc/cc_int/flow.c index 2127a0705dca..09067debac9e 100644 --- a/gnu/usr.bin/cc/cc_int/flow.c +++ b/gnu/usr.bin/cc/cc_int/flow.c @@ -57,7 +57,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ register. The bit is 1 if the register is live at the beginning of the basic block. - Two types of elements can be added to an insn's REG_NOTES. + Two types of elements can be added to an insn's REG_NOTES. A REG_DEAD note is added to an insn's REG_NOTES for any register that meets both of two conditions: The value in the register is not needed in subsequent insns and the insn does not replace the value in @@ -291,7 +291,7 @@ static void mark_label_ref PROTO((rtx, rtx, int)); static void life_analysis PROTO((rtx, int)); void allocate_for_life_analysis PROTO((void)); static void init_regset_vector PROTO((regset *, regset, int, int)); -static void propagate_block PROTO((regset, rtx, rtx, int, +static void propagate_block PROTO((regset, rtx, rtx, int, regset, int)); static int insn_dead_p PROTO((rtx, regset, int)); static int libcall_dead_p PROTO((rtx, regset, rtx, rtx)); @@ -549,7 +549,7 @@ find_basic_blocks (f, nonlocal_label_list) && SET_DEST (pat) == pc_rtx && uses_reg_or_mem (SET_SRC (pat))) computed_jump = 1; - + if (computed_jump) { for (x = label_value_list; x; x = XEXP (x, 1)) @@ -894,14 +894,14 @@ life_analysis (f, nregs) if (GET_CODE (tem) == USE || GET_CODE (tem) == CLOBBER) continue; - + if (GET_CODE (tem) != SET || GET_CODE (SET_DEST (tem)) != REG || GET_CODE (SET_SRC (tem)) != REG || REGNO (SET_DEST (tem)) != REGNO (SET_SRC (tem))) break; } - + if (i == XVECLEN (PATTERN (insn), 0) /* Insns carrying these notes are useful later on. */ && ! find_reg_note (insn, REG_EQUAL, NULL_RTX)) @@ -971,7 +971,7 @@ life_analysis (f, nregs) [HARD_FRAME_POINTER_REGNUM / REGSET_ELT_BITS] |= (REGSET_ELT_TYPE) 1 << (HARD_FRAME_POINTER_REGNUM % REGSET_ELT_BITS); -#endif +#endif } /* Mark all global registers as being live at the end of the function @@ -1363,7 +1363,7 @@ propagate_block (old, first, last, final, significant, bnum) && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG) loop_depth--; - /* If we have LOOP_DEPTH == 0, there has been a bookkeeping error. + /* If we have LOOP_DEPTH == 0, there has been a bookkeeping error. Abort now rather than setting register status incorrectly. */ if (loop_depth == 0) abort (); @@ -1394,7 +1394,7 @@ propagate_block (old, first, last, final, significant, bnum) = (insn_dead_p (PATTERN (insn), old, 0) /* Don't delete something that refers to volatile storage! */ && ! INSN_VOLATILE (insn)); - int libcall_is_dead + int libcall_is_dead = (insn_is_dead && note != 0 && libcall_dead_p (PATTERN (insn), old, note, insn)); @@ -1490,7 +1490,7 @@ propagate_block (old, first, last, final, significant, bnum) mark_set_regs (old, dead, PATTERN (insn), final ? insn : NULL_RTX, significant); - /* If an insn doesn't use CC0, it becomes dead since we + /* If an insn doesn't use CC0, it becomes dead since we assume that every insn clobbers it. So show it dead here; mark_used_regs will set it live if it is referenced. */ cc0_live = 0; @@ -1637,7 +1637,7 @@ insn_dead_p (x, needed, call_ok) if (GET_CODE (r) == CC0) return ! cc0_live; #endif - + if (GET_CODE (r) == MEM && last_mem_set && ! MEM_VOLATILE_P (r) && rtx_equal_p (r, last_mem_set)) return 1; @@ -1880,9 +1880,9 @@ mark_set_1 (needed, dead, x, insn, significant) || (GET_CODE (reg) == REG && last_mem_set != 0 && reg_overlap_mentioned_p (reg, last_mem_set))) last_mem_set = 0; - + if (GET_CODE (reg) == MEM && ! side_effects_p (reg) - /* There are no REG_INC notes for SP, so we can't assume we'll see + /* There are no REG_INC notes for SP, so we can't assume we'll see everything that invalidates it. To be safe, don't eliminate any stores though SP; none of them should be redundant anyway. */ && ! reg_mentioned_p (stack_pointer_rtx, reg)) @@ -1975,7 +1975,7 @@ mark_set_1 (needed, dead, x, insn, significant) reg_n_sets[regno]++; reg_n_refs[regno] += loop_depth; - + /* The insns where a reg is live are normally counted elsewhere, but we want the count to include the insn where the reg is set, and the normal counting mechanism @@ -2167,7 +2167,7 @@ find_auto_inc (needed, x, insn) /* INCR will become a NOTE and INSN won't contain a use of ADDR. If a use of ADDR was just placed in - the insn before INSN, make that the next use. + the insn before INSN, make that the next use. Otherwise, invalidate it. */ if (GET_CODE (PREV_INSN (insn)) == INSN && GET_CODE (PATTERN (PREV_INSN (insn))) == SET @@ -2478,7 +2478,7 @@ mark_used_regs (needed, live, x, final, insn) mark_used_regs (needed, live, SET_SRC (x), final, insn); return; } - + /* Storing in STRICT_LOW_PART is like storing in a reg in that this SET might be dead, so ignore it in TESTREG. but in some other ways it is like using the reg. @@ -2550,7 +2550,7 @@ mark_used_regs (needed, live, x, final, insn) { register char *fmt = GET_RTX_FORMAT (code); register int i; - + for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) { if (fmt[i] == 'e') diff --git a/gnu/usr.bin/cc/cc_int/fold-const.c b/gnu/usr.bin/cc/cc_int/fold-const.c index e729cdf61981..10093f5b2185 100644 --- a/gnu/usr.bin/cc/cc_int/fold-const.c +++ b/gnu/usr.bin/cc/cc_int/fold-const.c @@ -36,7 +36,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ size_int takes an integer value, and creates a tree constant with type from `sizetype'. */ - + #include <stdio.h> #include <setjmp.h> #include "config.h" @@ -334,7 +334,7 @@ lshift_double (l1, h1, count, prec, lv, hv, arith) rshift_double (l1, h1, - count, prec, lv, hv, arith); return; } - + if (count >= prec) count = (unsigned HOST_WIDE_INT) count & prec; @@ -496,7 +496,7 @@ div_and_round_double (code, uns, abort (); /* calculate quotient sign and convert operands to unsigned. */ - if (!uns) + if (!uns) { if (hnum < 0) { @@ -505,7 +505,7 @@ div_and_round_double (code, uns, if (neg_double (lnum, hnum, &lnum, &hnum) && (lden & hden) == -1) overflow = 1; } - if (hden < 0) + if (hden < 0) { quo_neg = ~ quo_neg; neg_double (lden, hden, &lden, &hden); @@ -534,7 +534,7 @@ div_and_round_double (code, uns, bzero ((char *) num, sizeof num); /* to zero 9th element */ bzero ((char *) den, sizeof den); - encode (num, lnum, hnum); + encode (num, lnum, hnum); encode (den, lden, hden); /* Special code for when the divisor < BASE. */ @@ -677,7 +677,7 @@ div_and_round_double (code, uns, } else return overflow; break; - + case ROUND_DIV_EXPR: case ROUND_MOD_EXPR: /* round to closest integer */ { @@ -760,7 +760,7 @@ target_isinf (x) unsigned mantissa1 : 20; unsigned exponent : 11; unsigned sign : 1; - } big_endian; + } big_endian; } u; u.d = dconstm1; @@ -800,7 +800,7 @@ target_isnan (x) unsigned mantissa1 : 20; unsigned exponent : 11; unsigned sign : 1; - } big_endian; + } big_endian; } u; u.d = dconstm1; @@ -840,7 +840,7 @@ target_negative (x) unsigned mantissa1 : 20; unsigned exponent : 11; unsigned sign : 1; - } big_endian; + } big_endian; } u; u.d = dconstm1; @@ -1104,7 +1104,7 @@ const_binop (code, arg1, arg2, notrunc) int1l += int2l-1; return size_int (int1l / int2l); } - case ROUND_DIV_EXPR: + case ROUND_DIV_EXPR: if (int2h == 0 && int2l == 1) { t = build_int_2 (int1l, int1h); @@ -1123,7 +1123,7 @@ const_binop (code, arg1, arg2, notrunc) t = build_int_2 (low, hi); break; - case TRUNC_MOD_EXPR: case ROUND_MOD_EXPR: + case TRUNC_MOD_EXPR: case ROUND_MOD_EXPR: case FLOOR_MOD_EXPR: case CEIL_MOD_EXPR: overflow = div_and_round_double (code, uns, int1l, int1h, int2l, int2h, @@ -1748,11 +1748,11 @@ operand_equal_p (arg0, arg1, only_const) } /* Similar to operand_equal_p, but see if ARG0 might have been made by - shorten_compare from ARG1 when ARG1 was being compared with OTHER. + shorten_compare from ARG1 when ARG1 was being compared with OTHER. When in doubt, return 0. */ -static int +static int operand_equal_for_comparison_p (arg0, arg1, other) tree arg0, arg1; tree other; @@ -1861,7 +1861,7 @@ twoval_comparison_p (arg, cval1, cval2, save_p) && twoval_comparison_p (TREE_OPERAND (arg, 2), cval1, cval2, save_p)); return 0; - + case '<': /* First see if we can handle the first operand, then the second. For the second operand, we know *CVAL1 can't be zero. It must be that @@ -2247,13 +2247,13 @@ optimize_bit_field_compare (code, compare_type, lhs, rhs) if (! const_p) { - rnmode = get_best_mode (rbitsize, rbitpos, + rnmode = get_best_mode (rbitsize, rbitpos, TYPE_ALIGN (TREE_TYPE (rinner)), word_mode, rvolatilep); if (rnmode == VOIDmode) return 0; } - + /* Compute the bit position and size for the new reference and our offset within it. If the new reference is the same size as the original, we won't optimize anything, so return zero. */ @@ -2304,7 +2304,7 @@ optimize_bit_field_compare (code, compare_type, lhs, rhs) error case below. If we didn't, we might generate wrong code. For unsigned fields, the constant shifted right by the field length should - be all zero. For signed fields, the high-order bits should agree with + be all zero. For signed fields, the high-order bits should agree with the sign bit. */ if (lunsignedp) @@ -2397,7 +2397,7 @@ decode_field_reference (exp, pbitsize, pbitpos, pmode, punsignedp, tree unsigned_type; int precision; - /* All the optimizations using this function assume integer fields. + /* All the optimizations using this function assume integer fields. There are problems with FP fields since the type_for_size call below can fail for, e.g., XFmode. */ if (! INTEGRAL_TYPE_P (TREE_TYPE (exp))) @@ -2422,7 +2422,7 @@ decode_field_reference (exp, pbitsize, pbitpos, pmode, punsignedp, punsignedp, pvolatilep); if (inner == exp || *pbitsize < 0 || offset != 0) return 0; - + /* Compute the mask to access the bitfield. */ unsigned_type = type_for_size (*pbitsize, 1); precision = TYPE_PRECISION (unsigned_type); @@ -2458,7 +2458,7 @@ all_ones_mask_p (mask, size) TREE_TYPE (tmask) = signed_type (type); force_fit_type (tmask, 0); return - operand_equal_p (mask, + operand_equal_p (mask, const_binop (RSHIFT_EXPR, const_binop (LSHIFT_EXPR, tmask, size_int (precision - size), 0), @@ -2469,7 +2469,7 @@ all_ones_mask_p (mask, size) /* Subroutine for fold_truthop: determine if an operand is simple enough to be evaluated unconditionally. */ -static int +static int simple_operand_p (exp) tree exp; { @@ -2650,7 +2650,7 @@ fold_truthop (code, truth_type, lhs, rhs) { /* If this is the "or" of two comparisons, we can do something if we the comparisons are NE_EXPR. If this is the "and", we can do something - if the comparisons are EQ_EXPR. I.e., + if the comparisons are EQ_EXPR. I.e., (a->b == 2 && a->c == 4) can become (a->new == NEW). WANTED_CODE is this operation code. For single bit fields, we can @@ -2703,7 +2703,7 @@ fold_truthop (code, truth_type, lhs, rhs) lr_arg = TREE_OPERAND (lhs, 1); rl_arg = TREE_OPERAND (rhs, 0); rr_arg = TREE_OPERAND (rhs, 1); - + if (TREE_CODE (lr_arg) == INTEGER_CST && TREE_CODE (rr_arg) == INTEGER_CST && operand_equal_p (ll_arg, rl_arg, 0)) @@ -3005,7 +3005,7 @@ strip_compound_expr (t, s) but we can constant-fold them if they have constant operands. */ tree -fold (expr) +fold (expr) tree expr; { register tree t = expr; @@ -3033,7 +3033,7 @@ fold (expr) return DECL_INITIAL (t); return t; } - + kind = TREE_CODE_CLASS (code); if (code == NOP_EXPR || code == FLOAT_EXPR || code == CONVERT_EXPR) { @@ -3085,7 +3085,7 @@ fold (expr) /* Strip any conversions that don't change the mode. */ STRIP_NOPS (op); } - + if (TREE_CODE (op) == COMPLEX_CST) subop = TREE_REALPART (op); else @@ -3136,7 +3136,7 @@ fold (expr) one of the operands is a comparison and the other is a comparison, a BIT_AND_EXPR with the constant 1, or a truth value. In that case, the code below would make the expression more complex. Change it to a - TRUTH_{AND,OR}_EXPR. Likewise, convert a similar NE_EXPR to + TRUTH_{AND,OR}_EXPR. Likewise, convert a similar NE_EXPR to TRUTH_XOR_EXPR and an EQ_EXPR to the inversion of a TRUTH_XOR_EXPR. */ if ((code == BIT_AND_EXPR || code == BIT_IOR_EXPR @@ -3192,7 +3192,7 @@ fold (expr) TREE_OPERAND (TREE_OPERAND (t, 2), 0))); return t; } - else if (TREE_CODE_CLASS (TREE_CODE (arg0)) == '<') + else if (TREE_CODE_CLASS (TREE_CODE (arg0)) == '<') return fold (build (COND_EXPR, type, arg0, fold (build1 (code, type, integer_one_node)), fold (build1 (code, type, integer_zero_node)))); @@ -3311,7 +3311,7 @@ fold (expr) && TREE_CODE (arg1) == COMPOUND_EXPR) return build (COMPOUND_EXPR, type, TREE_OPERAND (arg1, 0), fold (build (code, type, arg0, TREE_OPERAND (arg1, 1)))); - + switch (code) { case INTEGER_CST: @@ -3330,7 +3330,7 @@ fold (expr) case FIX_TRUNC_EXPR: /* Other kinds of FIX are not handled properly by fold_convert. */ - /* In addition to the cases of two conversions in a row + /* In addition to the cases of two conversions in a row handled below, if we are converting something to its own type via an object of identical or wider precision, neither conversion is needed. */ @@ -3351,7 +3351,7 @@ fold (expr) and the outermost type is wider than the intermediate, or - the initial type is a pointer type and the precisions of the intermediate and final types differ, or - - the final type is a pointer type and the precisions of the + - the final type is a pointer type and the precisions of the initial and intermediate types differ. */ if ((TREE_CODE (TREE_OPERAND (t, 0)) == NOP_EXPR || TREE_CODE (TREE_OPERAND (t, 0)) == CONVERT_EXPR) @@ -3610,7 +3610,7 @@ fold (expr) /* If it is + and VAR==ARG1, return just CONST. */ if (code == PLUS_EXPR && operand_equal_p (var, arg1, 0)) return convert (TREE_TYPE (t), con); - + /* If ARG0 is a constant, don't change things around; instead keep all the constant computations together. */ @@ -3629,7 +3629,7 @@ fold (expr) /* If it is - and VAR==ARG1, return just CONST. */ if (code == MINUS_EXPR && operand_equal_p (var, arg1, 0)) return convert (TREE_TYPE (t), con); - + /* If ARG0 is a constant, don't change things around; instead keep all the constant computations together. */ @@ -3741,7 +3741,7 @@ fold (expr) return non_lvalue (convert (type, arg0)); } - /* Fold &x - &x. This can happen from &x.foo - &x. + /* Fold &x - &x. This can happen from &x.foo - &x. This is unsafe for certain floats even in non-IEEE formats. In IEEE, it is unsafe because it does wrong for NaNs. Also note that operand_equal_p is always false if an operand @@ -3994,7 +3994,7 @@ fold (expr) C3/C1 at the end of the operation. */ if (tree_int_cst_lt (c1, c3)) outer_div = const_binop (code, c3, c1, 0), c3 = c1; - + /* The result is A * (C1/C3) + (C2/C3). */ t = fold (build (PLUS_EXPR, type, fold (build (MULT_EXPR, type, @@ -4364,7 +4364,7 @@ fold (expr) && TREE_UNSIGNED (TREE_TYPE (arg0)) && TREE_CODE (arg1) == LSHIFT_EXPR && integer_onep (TREE_OPERAND (arg1, 0))) - return build (code == LT_EXPR ? EQ_EXPR : NE_EXPR, type, + return build (code == LT_EXPR ? EQ_EXPR : NE_EXPR, type, build (RSHIFT_EXPR, TREE_TYPE (arg0), arg0, TREE_OPERAND (arg1, 1)), convert (TREE_TYPE (arg0), integer_zero_node)); @@ -4829,7 +4829,7 @@ fold (expr) if (integer_onep (TREE_OPERAND (t, 1)) && integer_zerop (TREE_OPERAND (t, 2)) /* If we try to convert TREE_OPERAND (t, 0) to our type, the - call to fold will try to move the conversion inside + call to fold will try to move the conversion inside a COND, which will recurse. In that case, the COND_EXPR is probably the best choice, so leave it alone. */ && type == TREE_TYPE (arg0)) diff --git a/gnu/usr.bin/cc/cc_int/function.c b/gnu/usr.bin/cc/cc_int/function.c index 844af836f635..2718f6df53b5 100644 --- a/gnu/usr.bin/cc/cc_int/function.c +++ b/gnu/usr.bin/cc/cc_int/function.c @@ -407,7 +407,7 @@ struct fixup_replacement rtx new; struct fixup_replacement *next; }; - + /* Forward declarations. */ static struct temp_slot *find_temp_slot_from_address PROTO((rtx)); @@ -637,7 +637,7 @@ get_frame_size () /* Allocate a stack slot of SIZE bytes and return a MEM rtx for it with machine mode MODE. - + ALIGN controls the amount of alignment for the address of the slot: 0 means according to MODE, -1 means use BIGGEST_ALIGNMENT and round size to multiple of that, @@ -852,7 +852,7 @@ assign_stack_temp (mode, size, keep) p = best_p; } - + /* If we still didn't find one, make a new temporary. */ if (p == 0) { @@ -940,7 +940,7 @@ combine_temp_slots () prev_p = p; } - /* Free all the RTL made by plus_constant. */ + /* Free all the RTL made by plus_constant. */ rtx_free (free_pointer); } @@ -969,7 +969,7 @@ find_temp_slot_from_address (x) return 0; } - + /* Indicate that NEW is an alternate way of refering to the temp slot that previous was known by OLD. */ @@ -1185,7 +1185,7 @@ put_var_into_stack (decl) if (output_bytecode) return; - + context = decl_function_context (decl); /* Get the current rtl used for this object and it's original mode. */ @@ -1478,7 +1478,7 @@ fixup_var_refs_insns (var, promoted_mode, unsignedp, insn, toplevel) PATTERN (insn) = replace_rtx (PATTERN (insn), call_dest, temp); } - + if (GET_CODE (insn) == CALL_INSN && GET_CODE (PATTERN (insn)) == SET) call_dest = SET_DEST (PATTERN (insn)); @@ -1497,7 +1497,7 @@ fixup_var_refs_insns (var, promoted_mode, unsignedp, insn, toplevel) a list of struct fixup_replacements. If fixup_var_refs_1 needs to allocate pseudos or replacement MEMs (for SUBREGs), it will record them in this list. - + If it allocated a pseudo for any replacement, we copy into it here. */ @@ -1564,7 +1564,7 @@ fixup_var_refs_insns (var, promoted_mode, unsignedp, insn, toplevel) } /* VAR is a MEM that used to be a pseudo register with mode PROMOTED_MODE. - See if the rtx expression at *LOC in INSN needs to be changed. + See if the rtx expression at *LOC in INSN needs to be changed. REPLACEMENTS is a pointer to a list head that starts out zero, but may contain a list of original rtx's and replacements. If we find that we need @@ -1594,7 +1594,7 @@ fixup_var_refs_1 (var, promoted_mode, loc, insn, replacements) case MEM: if (var == x) { - /* If we already have a replacement, use it. Otherwise, + /* If we already have a replacement, use it. Otherwise, try to fix up this address in case it is invalid. */ replacement = find_fixup_replacement (replacements, var); @@ -1608,7 +1608,7 @@ fixup_var_refs_1 (var, promoted_mode, loc, insn, replacements) /* Unless we are forcing memory to register or we changed the mode, we can leave things the way they are if the insn is valid. */ - + INSN_CODE (insn) = -1; if (! flag_force_mem && GET_MODE (x) == promoted_mode && recog_memoized (insn) >= 0) @@ -1729,7 +1729,7 @@ fixup_var_refs_1 (var, promoted_mode, loc, insn, replacements) return; } break; - + case SUBREG: if (SUBREG_REG (x) == var) { @@ -1746,7 +1746,7 @@ fixup_var_refs_1 (var, promoted_mode, loc, insn, replacements) } /* If this SUBREG makes VAR wider, it has become a paradoxical - SUBREG with VAR in memory, but these aren't allowed at this + SUBREG with VAR in memory, but these aren't allowed at this stage of the compilation. So load VAR into a pseudo and take a SUBREG of that pseudo. */ if (GET_MODE_SIZE (GET_MODE (x)) > GET_MODE_SIZE (GET_MODE (var))) @@ -1768,7 +1768,7 @@ fixup_var_refs_1 (var, promoted_mode, loc, insn, replacements) *loc = replacement->new; return; } - + replacement->new = *loc = fixup_memory_subreg (x, insn, 0); INSN_CODE (insn) = -1; @@ -1802,7 +1802,7 @@ fixup_var_refs_1 (var, promoted_mode, loc, insn, replacements) insn); break; } - + { rtx dest = SET_DEST (x); rtx src = SET_SRC (x); @@ -1883,10 +1883,10 @@ fixup_var_refs_1 (var, promoted_mode, loc, insn, replacements) INSN_CODE (insn) = -1; XEXP (outerdest, 0) = newmem; XEXP (outerdest, 2) = GEN_INT (pos); - + if (recog_memoized (insn) >= 0) return; - + /* Otherwise, restore old position. XEXP (x, 0) will be restored later. */ XEXP (outerdest, 2) = old_pos; @@ -1950,7 +1950,7 @@ fixup_var_refs_1 (var, promoted_mode, loc, insn, replacements) copy SET_SRC (x) to SET_DEST (x) in some way. So we generate the move and see whether it requires more than one insn. If it does, we emit those insns and - delete INSN. Otherwise, we an just replace the pattern + delete INSN. Otherwise, we an just replace the pattern of INSN; we have already verified above that INSN has no other function that to do X. */ @@ -2098,7 +2098,7 @@ fixup_memory_subreg (x, insn, uncritical) If X itself is a (SUBREG (MEM ...) ...), return the replacement expression. Otherwise return X, with its contents possibly altered. - If any insns must be emitted to compute NEWADDR, put them before INSN. + If any insns must be emitted to compute NEWADDR, put them before INSN. UNCRITICAL is as in fixup_memory_subreg. */ @@ -2381,7 +2381,7 @@ static int out_arg_offset; /* The bottom of the stack points to the actual arguments. If REG_PARM_STACK_SPACE is defined, this includes the space for the register parameters. However, if OUTGOING_REG_PARM_STACK space is not defined, - stack space for register parameters is not pushed by the caller, but + stack space for register parameters is not pushed by the caller, but rather part of the fixed stack areas and hence not included in `current_function_outgoing_args_size'. Nevertheless, we must allow for it when allocating stack dynamic objects. */ @@ -2469,7 +2469,7 @@ instantiate_decls (fndecl, valid_only) for (decl = DECL_ARGUMENTS (fndecl); decl; decl = TREE_CHAIN (decl)) { instantiate_decl (DECL_RTL (decl), int_size_in_bytes (TREE_TYPE (decl)), - valid_only); + valid_only); instantiate_decl (DECL_INCOMING_RTL (decl), int_size_in_bytes (TREE_TYPE (decl)), valid_only); } @@ -2578,7 +2578,7 @@ instantiate_decl (x, size, valid_only) is not valid. Return 1 if we either had nothing to do or if we were able to do the - needed replacement. Return 0 otherwise; we only return zero if + needed replacement. Return 0 otherwise; we only return zero if EXTRA_INSNS is zero. We first try some simple transformations to avoid the creation of extra @@ -2790,12 +2790,12 @@ instantiate_virtual_regs_1 (loc, object, extra_insns) /* Most cases of MEM that convert to valid addresses have already been handled by our scan of regno_reg_rtx. The only special handling we need here is to make a copy of the rtx to ensure it isn't being - shared if we have to change it to a pseudo. + shared if we have to change it to a pseudo. If the rtx is a simple reference to an address via a virtual register, it can potentially be shared. In such cases, first try to make it a valid address, which can also be shared. Otherwise, copy it and - proceed normally. + proceed normally. First check for common cases that need no processing. These are usually due to instantiation already being done on a previous instance @@ -3104,7 +3104,7 @@ assign_parms (fndecl, second_time) tree fnargs = DECL_ARGUMENTS (fndecl); /* This is used for the arg pointer when referring to stack args. */ rtx internal_arg_pointer; - /* This is a dummy PARM_DECL that we used for the function result if + /* This is a dummy PARM_DECL that we used for the function result if the function returns a structure. */ tree function_result_decl = 0; int nparmregs = list_length (fnargs) + LAST_VIRTUAL_REGISTER + 1; @@ -3165,7 +3165,7 @@ assign_parms (fndecl, second_time) TREE_CHAIN (function_result_decl) = fnargs; fnargs = function_result_decl; } - + parm_reg_stack_loc = (rtx *) oballoc (nparmregs * sizeof (rtx)); bzero ((char *) parm_reg_stack_loc, nparmregs * sizeof (rtx)); @@ -3645,7 +3645,7 @@ assign_parms (fndecl, second_time) #endif /* FUNCTION_ARG_CALLEE_COPIES */ /* In any case, record the parm's desired stack location - in case we later discover it must live in the stack. + in case we later discover it must live in the stack. If it is a COMPLEX value, store the stack location for both halves. */ @@ -3782,7 +3782,7 @@ assign_parms (fndecl, second_time) DECL_RTL (parm) = stack_parm; } - + /* If this "parameter" was the place where we are receiving the function's incoming structure pointer, set up the result. */ if (parm == function_result_decl) @@ -3827,13 +3827,13 @@ assign_parms (fndecl, second_time) current_function_args_size = ((current_function_args_size + STACK_BYTES - 1) / STACK_BYTES) * STACK_BYTES; -#endif +#endif #ifdef ARGS_GROW_DOWNWARD current_function_arg_offset_rtx = (stack_args_size.var == 0 ? GEN_INT (-stack_args_size.constant) - : expand_expr (size_binop (MINUS_EXPR, stack_args_size.var, - size_int (-stack_args_size.constant)), + : expand_expr (size_binop (MINUS_EXPR, stack_args_size.var, + size_int (-stack_args_size.constant)), NULL_RTX, VOIDmode, 0)); #else current_function_arg_offset_rtx = ARGS_SIZE_RTX (stack_args_size); @@ -3922,7 +3922,7 @@ promoted_input_arg (regno, pmode, punsignedp) initial offset is not affected by this rounding, while the size always is and the starting offset may be. */ -/* offset_ptr will be negative for ARGS_GROW_DOWNWARD case; +/* offset_ptr will be negative for ARGS_GROW_DOWNWARD case; initial_offset_ptr is positive because locate_and_pad_parm's callers pass in the total size of args so far as initial_offset_ptr. arg_size_ptr is always positive.*/ @@ -4003,7 +4003,7 @@ locate_and_pad_parm (passed_mode, type, in_regs, fndecl, else { arg_size_ptr->constant = (- initial_offset_ptr->constant - - offset_ptr->constant); + offset_ptr->constant); } #else /* !ARGS_GROW_DOWNWARD */ pad_to_arg_alignment (initial_offset_ptr, boundary); @@ -4036,14 +4036,14 @@ pad_to_arg_alignment (offset_ptr, boundary) int boundary; { int boundary_in_bytes = boundary / BITS_PER_UNIT; - + if (boundary > BITS_PER_UNIT) { if (offset_ptr->var) { offset_ptr->var = #ifdef ARGS_GROW_DOWNWARD - round_down + round_down #else round_up #endif @@ -4216,7 +4216,7 @@ lookup_static_chain (decl) if (context == 0) return 0; - + /* We treat inline_function_decl as an alias for the current function because that is the inline function whose vars, types, etc. are being merged into the current function. @@ -4505,7 +4505,7 @@ reorder_blocks (block_vector, top_block, insns) block = copy_node (block); BLOCK_SUBBLOCKS (block) = 0; TREE_ASM_WRITTEN (block) = 1; - BLOCK_SUPERCONTEXT (block) = current_block; + BLOCK_SUPERCONTEXT (block) = current_block; BLOCK_CHAIN (block) = BLOCK_SUBBLOCKS (current_block); BLOCK_SUBBLOCKS (current_block) = block; current_block = block; @@ -4549,7 +4549,7 @@ all_blocks (block, vector) tree *vector; { int n_blocks = 1; - tree subblocks; + tree subblocks; TREE_ASM_WRITTEN (block) = 0; /* Record this block. */ @@ -5111,7 +5111,7 @@ expand_function_start (subr, parms_have_cleanups) } /* Generate RTL for the end of the current function. - FILENAME and LINE are the current position in the source file. + FILENAME and LINE are the current position in the source file. It is up to language-specific callers to do cleanups for parameters-- or else, supply 1 for END_BINDINGS and we will call expand_end_bindings. */ diff --git a/gnu/usr.bin/cc/cc_int/global.c b/gnu/usr.bin/cc/cc_int/global.c index ff86feca1f19..650fb5f265ea 100644 --- a/gnu/usr.bin/cc/cc_int/global.c +++ b/gnu/usr.bin/cc/cc_int/global.c @@ -43,7 +43,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ 1. count the pseudo-registers still needing allocation and assign allocation-numbers (allocnos) to them. - Set up tables reg_allocno and allocno_reg to map + Set up tables reg_allocno and allocno_reg to map reg numbers to allocnos and vice versa. max_allocno gets the number of allocnos in use. @@ -457,7 +457,7 @@ global_alloc (file) for (j = regno; j < lim; j++) local_reg_n_refs[j] = 0; } - + /* Allocate the space for the conflict and preference tables and initialize them. */ @@ -468,17 +468,17 @@ global_alloc (file) hard_reg_preferences = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET)); bzero ((char *) hard_reg_preferences, max_allocno * sizeof (HARD_REG_SET)); - + hard_reg_copy_preferences = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET)); bzero ((char *) hard_reg_copy_preferences, max_allocno * sizeof (HARD_REG_SET)); - + hard_reg_full_preferences = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET)); bzero ((char *) hard_reg_full_preferences, max_allocno * sizeof (HARD_REG_SET)); - + regs_someone_prefers = (HARD_REG_SET *) alloca (max_allocno * sizeof (HARD_REG_SET)); bzero ((char *) regs_someone_prefers, max_allocno * sizeof (HARD_REG_SET)); @@ -543,7 +543,7 @@ global_alloc (file) } qsort (allocno_order, max_allocno, sizeof (int), allocno_compare); - + prune_preferences (); if (file) @@ -824,17 +824,17 @@ expand_preferences () /* Prune the preferences for global registers to exclude registers that cannot be used. - + Compute `regs_someone_prefers', which is a bitmask of the hard registers that are preferred by conflicting registers of lower priority. If possible, we will avoid using these registers. */ - + static void prune_preferences () { int i, j; int allocno; - + /* Scan least most important to most important. For each allocno, remove from preferences registers that cannot be used, either because of conflicts or register type. Then compute all registers @@ -875,7 +875,7 @@ prune_preferences () if (allocno_size[allocno_order[j]] <= allocno_size[allocno]) AND_COMPL_HARD_REG_SET (temp, hard_reg_full_preferences[allocno]); - + IOR_HARD_REG_SET (regs_someone_prefers[allocno], temp); } } @@ -950,7 +950,7 @@ find_reg (allocno, losers, alt_regs_p, accept_call_clobbered, retrying) COPY_HARD_REG_SET (used, used1); IOR_COMPL_HARD_REG_SET (used, regs_used_so_far); IOR_HARD_REG_SET (used, regs_someone_prefers[allocno]); - + best_reg = -1; for (i = FIRST_PSEUDO_REGISTER, pass = 0; pass <= 1 && i >= FIRST_PSEUDO_REGISTER; @@ -992,7 +992,7 @@ find_reg (allocno, losers, alt_regs_p, accept_call_clobbered, retrying) Remove from the preferred registers and conflicting registers. Note that additional conflicts may have been added after `prune_preferences' was - called. + called. First do this for those register with copy preferences, then all preferred registers. */ @@ -1069,7 +1069,7 @@ find_reg (allocno, losers, alt_regs_p, accept_call_clobbered, retrying) } no_prefs: - /* If we haven't succeeded yet, try with caller-saves. + /* If we haven't succeeded yet, try with caller-saves. We need not check to see if the current function has nonlocal labels because we don't put any pseudos that are live over calls in registers in that case. */ @@ -1126,7 +1126,7 @@ find_reg (allocno, losers, alt_regs_p, accept_call_clobbered, retrying) /* We explicitly evaluate the divide results into temporary variables so as to avoid excess precision problems that occur on a i386-unknown-sysv4.2 (unixware) host. */ - + double tmp1 = ((double) local_reg_n_refs[regno] / local_reg_live_length[regno]); double tmp2 = ((double) allocno_n_refs[allocno] @@ -1310,7 +1310,7 @@ record_conflicts (allocno_vec, len) SETTER is 0 if this register was modified by an auto-increment (i.e., a REG_INC note was found for it). - CLOBBERs are processed here by calling mark_reg_clobber. */ + CLOBBERs are processed here by calling mark_reg_clobber. */ static void mark_reg_store (orig_reg, setter) @@ -1526,7 +1526,7 @@ mark_reg_live_nc (regno, mode) that SRC is a register. If SRC or the first operand of SRC is a register, try to set a preference. If one of the two is a hard register and the other is a pseudo-register, mark the preference. - + Note that we are not as aggressive as local-alloc in trying to tie a pseudo-register to a hard register. */ @@ -1695,7 +1695,7 @@ dump_global_regs (file) FILE *file; { register int i, j; - + fprintf (file, ";; Register dispositions:\n"); for (i = FIRST_PSEUDO_REGISTER, j = 0; i < max_regno; i++) if (reg_renumber[i] >= 0) diff --git a/gnu/usr.bin/cc/cc_int/insn-output.c b/gnu/usr.bin/cc/cc_int/insn-output.c index 71867125c013..65b0ec52c03a 100644 --- a/gnu/usr.bin/cc/cc_int/insn-output.c +++ b/gnu/usr.bin/cc/cc_int/insn-output.c @@ -454,7 +454,7 @@ output_55 (operands, insn) if (REG_P (operands[0]) && operands[1] == const0_rtx) return AS2 (xor%L0,%k0,%k0); - if (REG_P (operands[0]) && operands[1] == const1_rtx + if (REG_P (operands[0]) && operands[1] == const1_rtx && (link = find_reg_note (insn, REG_WAS_0, 0)) /* Make sure the insn that stored the 0 is still present. */ && ! INSN_DELETED_P (XEXP (link, 0)) @@ -2958,7 +2958,7 @@ output_239 (operands, insn) rtx *operands; rtx insn; { - return "seta %0"; + return "seta %0"; } static char * @@ -2980,7 +2980,7 @@ output_243 (operands, insn) rtx *operands; rtx insn; { - return "setb %0"; + return "setb %0"; } static char * @@ -3002,7 +3002,7 @@ output_247 (operands, insn) rtx *operands; rtx insn; { - return "setae %0"; + return "setae %0"; } static char * @@ -3024,7 +3024,7 @@ output_251 (operands, insn) rtx *operands; rtx insn; { - return "setbe %0"; + return "setbe %0"; } static char * diff --git a/gnu/usr.bin/cc/cc_int/insn-recog.c b/gnu/usr.bin/cc/cc_int/insn-recog.c index c3406b77de31..c1179c4a6d39 100644 --- a/gnu/usr.bin/cc/cc_int/insn-recog.c +++ b/gnu/usr.bin/cc/cc_int/insn-recog.c @@ -3034,7 +3034,7 @@ recog_4 (x0, insn, pnum_clobbers) if (register_operand (x2, SFmode)) { ro[1] = x2; - if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 + if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math) ) return 194; } @@ -3046,7 +3046,7 @@ recog_4 (x0, insn, pnum_clobbers) if (register_operand (x2, SFmode)) { ro[1] = x2; - if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 + if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math) ) return 197; } @@ -3245,7 +3245,7 @@ recog_4 (x0, insn, pnum_clobbers) if (general_operand (x3, SFmode)) { ro[1] = x3; - if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 + if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math) ) return 189; } @@ -3264,7 +3264,7 @@ recog_4 (x0, insn, pnum_clobbers) if (register_operand (x2, DFmode)) { ro[1] = x2; - if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 + if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math) ) return 193; } @@ -3276,7 +3276,7 @@ recog_4 (x0, insn, pnum_clobbers) if (register_operand (x3, SFmode)) { ro[1] = x3; - if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 + if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math) ) return 195; } @@ -3295,7 +3295,7 @@ recog_4 (x0, insn, pnum_clobbers) if (register_operand (x2, DFmode)) { ro[1] = x2; - if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 + if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math) ) return 196; } @@ -3307,7 +3307,7 @@ recog_4 (x0, insn, pnum_clobbers) if (register_operand (x3, SFmode)) { ro[1] = x3; - if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 + if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math) ) return 198; } @@ -3471,7 +3471,7 @@ recog_4 (x0, insn, pnum_clobbers) if (general_operand (x2, XFmode)) { ro[1] = x2; - if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 + if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math) ) return 190; } @@ -3483,7 +3483,7 @@ recog_4 (x0, insn, pnum_clobbers) if (general_operand (x3, DFmode)) { ro[1] = x3; - if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 + if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math) ) return 191; } @@ -3491,7 +3491,7 @@ recog_4 (x0, insn, pnum_clobbers) if (general_operand (x3, SFmode)) { ro[1] = x3; - if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 + if (! TARGET_NO_FANCY_MATH_387 && TARGET_80387 && (TARGET_IEEE_FP || flag_fast_math) ) return 192; } diff --git a/gnu/usr.bin/cc/cc_int/integrate.c b/gnu/usr.bin/cc/cc_int/integrate.c index 2355508f6e5b..7e9c2d5ae5a0 100644 --- a/gnu/usr.bin/cc/cc_int/integrate.c +++ b/gnu/usr.bin/cc/cc_int/integrate.c @@ -219,7 +219,7 @@ static int in_nonparm_insns; /* Subroutine for `save_for_inline{copying,nocopy}'. Performs initialization needed to save FNDECL's insns and info for future inline expansion. */ - + static rtx initialize_for_inline (fndecl, min_labelno, max_labelno, max_reg, copy) tree fndecl; @@ -327,7 +327,7 @@ initialize_for_inline (fndecl, min_labelno, max_labelno, max_reg, copy) /* Subroutine for `save_for_inline{copying,nocopy}'. Finishes up the things that must be done to make FNDECL expandable as an inline function. HEAD contains the chain of insns to which FNDECL will expand. */ - + static void finish_inline (fndecl, head) tree fndecl; @@ -386,7 +386,7 @@ save_for_inline_copying (fndecl) int max_uid; rtx first_nonparm_insn; - /* Make and emit a return-label if we have not already done so. + /* Make and emit a return-label if we have not already done so. Do this before recording the bounds on label numbers. */ if (return_label == 0) @@ -796,7 +796,7 @@ save_constants (px) again: x = *px; - /* If this is a CONST_DOUBLE, don't try to fix things up in + /* If this is a CONST_DOUBLE, don't try to fix things up in CONST_DOUBLE_MEM, because this is an infinite recursion. */ if (GET_CODE (x) == CONST_DOUBLE) return; @@ -808,7 +808,7 @@ save_constants (px) RTX_INTEGRATED_P (new) = 1; /* If the MEM was in a different mode than the constant (perhaps we - were only looking at the low-order part), surround it with a + were only looking at the low-order part), surround it with a SUBREG so we can save both modes. */ if (GET_MODE (x) != const_mode) @@ -981,7 +981,7 @@ copy_for_inline (orig) it is possible for unshare_all_rtl to copy the address, into memory that won't be saved. Although the MEM can safely be shared, and won't be copied there, the address itself cannot be shared, and may - need to be copied. + need to be copied. There are also two exceptions with constants: The first is if the constant is a LABEL_REF or the sum of the LABEL_REF @@ -1310,7 +1310,7 @@ expand_inline_function (fndecl, parms, target, ignore, type, structure_value_add || (GET_CODE (arg_vals[i]) == SUBREG))) arg_vals[i] = copy_to_mode_reg (GET_MODE (loc), arg_vals[i]); } - + /* Allocate the structures we use to remap things. */ map = (struct inline_remap *) alloca (sizeof (struct inline_remap)); @@ -1554,7 +1554,7 @@ expand_inline_function (fndecl, parms, target, ignore, type, structure_value_add { if (! structure_value_addr || ! aggregate_value_p (DECL_RESULT (fndecl))) abort (); - + /* Pass the function the address in which to return a structure value. Note that a constructor can cause someone to call us with STRUCTURE_VALUE_ADDR, but the initialization takes place @@ -1950,7 +1950,7 @@ integrate_decl_tree (let, level, map) if (level > 0) pushlevel (0); - + for (t = BLOCK_VARS (let); t; t = TREE_CHAIN (t)) { tree d; @@ -2088,7 +2088,7 @@ copy_rtx_and_substitute (orig, map) start_sequence (); loc = assign_stack_temp (BLKmode, size, 1); loc = XEXP (loc, 0); - /* When arguments grow downward, the virtual incoming + /* When arguments grow downward, the virtual incoming args pointer points to the top of the argument block, so the remapped location better do the same. */ #ifdef ARGS_GROW_DOWNWARD @@ -2198,7 +2198,7 @@ copy_rtx_and_substitute (orig, map) { rtx constant = get_pool_constant (orig); if (GET_CODE (constant) == LABEL_REF) - return XEXP (force_const_mem (Pmode, + return XEXP (force_const_mem (Pmode, copy_rtx_and_substitute (constant, map)), 0); @@ -2535,7 +2535,7 @@ subst_constants (loc, insn, map) /* We can't call subst_constants on &SUBREG_REG (x) because any constant or SUBREG wouldn't be valid inside our SUBEG. Instead, see what is inside, try to form the new SUBREG and see if that is - valid. We handle two cases: extracting a full word in an + valid. We handle two cases: extracting a full word in an integral mode and extracting the low part. */ subst_constants (&inner, NULL_RTX, map); @@ -2638,7 +2638,7 @@ subst_constants (loc, insn, map) } format_ptr = GET_RTX_FORMAT (code); - + /* If the first operand is an expression, save its mode for later. */ if (*format_ptr == 'e') op0_mode = GET_MODE (XEXP (x, 0)); diff --git a/gnu/usr.bin/cc/cc_int/jump.c b/gnu/usr.bin/cc/cc_int/jump.c index 28d25e52d12b..23c51bf30438 100644 --- a/gnu/usr.bin/cc/cc_int/jump.c +++ b/gnu/usr.bin/cc/cc_int/jump.c @@ -512,7 +512,7 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan) || dreg != sreg) break; } - + if (i < 0) delete_insn (insn); } @@ -548,7 +548,7 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan) && regno_first_uid[REGNO (SET_DEST (set))] == INSN_UID (insn) /* We use regno_last_note_uid so as not to delete the setting of a reg that's used in notes. A subsequent optimization - might arrange to use that reg for real. */ + might arrange to use that reg for real. */ && regno_last_note_uid[REGNO (SET_DEST (set))] == INSN_UID (insn) && ! side_effects_p (SET_SRC (set)) && ! find_reg_note (insn, REG_RETVAL, 0)) @@ -712,7 +712,7 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan) the insn if the only note is a REG_EQUAL or REG_EQUIV whose value is the same as "b". - INSN is the branch over the `else' part. + INSN is the branch over the `else' part. We set: @@ -876,7 +876,7 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan) if (validate_change (temp, &SET_DEST (temp1), new, 0)) { next = emit_insn_after (gen_move_insn (temp2, new), insn); - emit_insn_after_with_line_notes (PATTERN (temp), + emit_insn_after_with_line_notes (PATTERN (temp), PREV_INSN (insn), temp); delete_insn (temp); reallabelprev = prev_active_insn (JUMP_LABEL (insn)); @@ -931,7 +931,7 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan) } } - /* Finally, handle the case where two insns are used to + /* Finally, handle the case where two insns are used to compute EXP but a temporary register is used. Here we must ensure that the temporary register is not used anywhere else. */ @@ -1027,7 +1027,7 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan) && (GET_CODE (temp2 = SET_SRC (PATTERN (temp))) == REG || GET_CODE (temp2) == SUBREG || GET_CODE (temp2) == CONST_INT) - /* Allow either form, but prefer the former if both apply. + /* Allow either form, but prefer the former if both apply. There is no point in using the old value of TEMP1 if it is a register, since cse will alias them. It can lose if the old value were a hard register since CSE @@ -1123,7 +1123,7 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan) target = emit_store_flag (gen_reg_rtx (GET_MODE (var)), code, XEXP (temp4, 0), XEXP (temp4, 1), VOIDmode, - (code == LTU || code == LEU + (code == LTU || code == LEU || code == GEU || code == GTU), normalizep); if (target) @@ -1133,7 +1133,7 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan) /* Put the store-flag insns in front of the first insn used to compute the condition to ensure that we - use the same values of them as the current + use the same values of them as the current comparison. However, the remainder of the insns we generate will be placed directly in front of the jump insn, in case any of the pseudos we use @@ -1193,7 +1193,7 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan) && ! preserve_subexpressions_p () ? target : NULL_RTX)); } - + emit_move_insn (var, target); seq = get_insns (); end_sequence (); @@ -1221,7 +1221,7 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan) /* If branches are expensive, convert if (foo) bar++; to bar += (foo != 0); - and similarly for "bar--;" + and similarly for "bar--;" INSN is the conditional branch around the arithmetic. We set: @@ -1435,7 +1435,7 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan) of the first jump. In some cases, the second jump must be rewritten also. - For example, + For example, < == converts to > == < != converts to == > etc. @@ -1807,7 +1807,7 @@ jump_optimize (f, cross_jump, noop_moves, after_regscan) = rangenext; PREV_INSN (rangenext) = PREV_INSN (range2after); - PREV_INSN (range2after) + PREV_INSN (range2after) = PREV_INSN (range1beg); NEXT_INSN (range2after) = range1beg; NEXT_INSN (PREV_INSN (range1beg)) @@ -2170,7 +2170,7 @@ duplicate_loop_exit_test (loop_start) if (reg_map) replace_regs (REG_NOTES (copy), reg_map, max_reg, 1); } - + /* If this is a simple jump, add it to the jump chain. */ if (INSN_UID (copy) < max_jump_chain && JUMP_LABEL (copy) @@ -2315,7 +2315,7 @@ find_cross_jump (e1, e2, minimum, f1, f2) p1 = PATTERN (i1); p2 = PATTERN (i2); - + /* If this is a CALL_INSN, compare register usage information. If we don't check this on stack register machines, the two CALL_INSNs might be merged leaving reg-stack.c with mismatching @@ -2598,7 +2598,7 @@ can_reverse_comparison_p (comparison, insn) arg0 = XEXP (comparison, 0); /* Make sure ARG0 is one of the actual objects being compared. If we - can't do this, we can't be sure the comparison can be reversed. + can't do this, we can't be sure the comparison can be reversed. Handle cc0 and a MODE_CC register. */ if ((GET_CODE (arg0) == REG && GET_MODE_CLASS (GET_MODE (arg0)) == MODE_CC) @@ -2631,7 +2631,7 @@ can_reverse_comparison_p (comparison, insn) for the negated comparison. WATCH OUT! reverse_condition is not safe to use on a jump that might be acting on the results of an IEEE floating point comparison, - because of the special treatment of non-signaling nans in comparisons. + because of the special treatment of non-signaling nans in comparisons. Use can_reverse_comparison_p to be sure. */ enum rtx_code @@ -3495,7 +3495,7 @@ invert_jump (jump, nlabel) return 0; } -/* Invert the jump condition of rtx X contained in jump insn, INSN. +/* Invert the jump condition of rtx X contained in jump insn, INSN. Return 1 if we can do so, 0 if we cannot find a way to do so that matches a pattern. */ @@ -3527,7 +3527,7 @@ invert_exp (x, insn) GET_MODE (comp), XEXP (comp, 0), XEXP (comp, 1)), 0)) return 1; - + tem = XEXP (x, 1); validate_change (insn, &XEXP (x, 1), XEXP (x, 2), 1); validate_change (insn, &XEXP (x, 2), tem, 1); @@ -3785,7 +3785,7 @@ rtx_renumbered_equal_p (x, y) register int i; register RTX_CODE code = GET_CODE (x); register char *fmt; - + if (x == y) return 1; @@ -3845,7 +3845,7 @@ rtx_renumbered_equal_p (x, y) return reg_x >= 0 && reg_x == reg_y && word_x == word_y; } - /* Now we have disposed of all the cases + /* Now we have disposed of all the cases in which different rtx codes can match. */ if (code != GET_CODE (y)) return 0; @@ -3989,7 +3989,7 @@ true_regnum (x) In general, if the first test fails, the program can branch directly to `foo' and skip the second try which is doomed to fail. We run this after loop optimization and before flow analysis. */ - + /* When comparing the insn patterns, we track the fact that different pseudo-register numbers may have been used in each computation. The following array stores an equivalence -- same_regs[I] == J means @@ -4011,7 +4011,7 @@ static char *modified_regs; static int modified_mem; -/* Called via note_stores on each insn between the target of the first +/* Called via note_stores on each insn between the target of the first branch and the second branch. It marks any changed registers. */ static void @@ -4039,7 +4039,7 @@ mark_modified_reg (dest, x) } /* F is the first insn in the chain of insns. */ - + void thread_jumps (f, max_reg, flag_before_loop) rtx f; @@ -4055,7 +4055,7 @@ thread_jumps (f, max_reg, flag_before_loop) will either always succeed or always fail depending on the relative senses of the two branches. So adjust the first branch accordingly in this case. */ - + rtx label, b1, b2, t1, t2; enum rtx_code code1, code2; rtx b1op0, b1op1, b2op0, b2op1; @@ -4069,7 +4069,7 @@ thread_jumps (f, max_reg, flag_before_loop) all_reset = (int *) alloca (max_reg * sizeof (int)); for (i = 0; i < max_reg; i++) all_reset[i] = -1; - + while (changed) { changed = 0; @@ -4166,7 +4166,7 @@ thread_jumps (f, max_reg, flag_before_loop) { t1 = prev_nonnote_insn (b1); t2 = prev_nonnote_insn (b2); - + while (t1 != 0 && t2 != 0) { if (t2 == label) @@ -4203,7 +4203,7 @@ thread_jumps (f, max_reg, flag_before_loop) } break; } - + /* If either of these is not a normal insn (it might be a JUMP_INSN, CALL_INSN, or CODE_LABEL) we fail. (NOTEs have already been skipped above.) Similarly, fail @@ -4213,7 +4213,7 @@ thread_jumps (f, max_reg, flag_before_loop) || ! rtx_equal_for_thread_p (PATTERN (t1), PATTERN (t2), t2)) break; - + t1 = prev_nonnote_insn (t1); t2 = prev_nonnote_insn (t2); } @@ -4225,7 +4225,7 @@ thread_jumps (f, max_reg, flag_before_loop) /* This is like RTX_EQUAL_P except that it knows about our handling of possibly equivalent registers and knows to consider volatile and modified objects as not equal. - + YINSN is the insn containing Y. */ int @@ -4282,7 +4282,7 @@ rtx_equal_for_thread_p (x, y, yinsn) num_same_regs++; /* If this is the first time we are seeing a register on the `Y' - side, see if it is the last use. If not, we can't thread the + side, see if it is the last use. If not, we can't thread the jump, so mark it as not equivalent. */ if (regno_last_uid[REGNO (y)] != INSN_UID (yinsn)) return 0; diff --git a/gnu/usr.bin/cc/cc_int/local-alloc.c b/gnu/usr.bin/cc/cc_int/local-alloc.c index fc5cdb4bdb41..932f3b63f0fa 100644 --- a/gnu/usr.bin/cc/cc_int/local-alloc.c +++ b/gnu/usr.bin/cc/cc_int/local-alloc.c @@ -47,7 +47,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ Tying is represented with "quantity numbers". A non-tied register is given a new quantity number. Tied registers have the same quantity number. - + We have provision to exempt registers, even when they are contained within the block, that can be tied to others that are not contained in it. This is so that global_alloc could process them both and tie them then. @@ -335,7 +335,7 @@ alloc_qty_for_scratch (scratch, n, insn, insn_code_num, insn_number) { case '=': case '+': case '?': case '#': case '&': case '!': - case '*': case '%': + case '*': case '%': case '0': case '1': case '2': case '3': case '4': case 'm': case '<': case '>': case 'V': case 'o': case 'E': case 'F': case 'G': case 'H': @@ -370,7 +370,7 @@ alloc_qty_for_scratch (scratch, n, insn, insn_code_num, insn_number) class = GENERAL_REGS; #endif - + qty = next_qty++; @@ -689,7 +689,7 @@ memref_used_between_p (memref, start, end) Search forward to see if SRC dies before either it or DEST is modified, but don't scan past the end of a basic block. If so, we can replace SRC - with DEST and let SRC die in INSN. + with DEST and let SRC die in INSN. This will reduce the number of registers live in that range and may enable DEST to be tied to SRC, thus often saving one register in addition to a @@ -933,7 +933,7 @@ optimize_reg_copy_2 (insn, dest, src) break; } } - + /* Find registers that are equivalent to a single value throughout the compilation (either because they can be referenced in memory or are set once from a single constant). Lower their priority for a register. @@ -1044,7 +1044,7 @@ update_equiv_regs () a register used only in one basic block from a MEM. If so, and the MEM remains unchanged for the life of the register, add a REG_EQUIV note. */ - + note = find_reg_note (insn, REG_EQUIV, NULL_RTX); if (note == 0 && reg_basic_block[regno] >= 0 @@ -1252,7 +1252,7 @@ block_alloc (b) continue; /* Likewise if each alternative has some operand that - must match operand zero. In that case, skip any + must match operand zero. In that case, skip any operand that doesn't list operand 0 since we know that the operand always conflicts with operand 0. We ignore commutatity in this case to keep things simple. */ @@ -1289,7 +1289,7 @@ block_alloc (b) || (r1 == recog_operand[i] && must_match_0 >= 0) #endif ); - + if (GET_CODE (r1) == REG || GET_CODE (r1) == SUBREG) win = combine_regs (r1, r0, may_save_copy, insn_number, insn, 0); @@ -1397,7 +1397,7 @@ block_alloc (b) alloc_qty_for_scratch (recog_operand[i], i, insn, insn_code_number, insn_number); - /* If this is an insn that has a REG_RETVAL note pointing at a + /* If this is an insn that has a REG_RETVAL note pointing at a CLOBBER insn, we have reached the end of a REG_NO_CONFLICT block, so clear any register number that combined within it. */ if ((note = find_reg_note (insn, REG_RETVAL, NULL_RTX)) != 0 @@ -1421,7 +1421,7 @@ block_alloc (b) /* Now every register that is local to this basic block should have been given a quantity, or else -1 meaning ignore it. - Every quantity should have a known birth and death. + Every quantity should have a known birth and death. Order the qtys so we assign them registers in order of the number of suggested registers they need so we allocate those with @@ -1473,8 +1473,8 @@ block_alloc (b) qty_phys_reg[q] = -1; } - /* Order the qtys so we assign them registers in order of - decreasing length of life. Normally call qsort, but if we + /* Order the qtys so we assign them registers in order of + decreasing length of life. Normally call qsort, but if we have only a very small number of quantities, sort them ourselves. */ for (i = 0; i < next_qty; i++) @@ -1521,7 +1521,7 @@ block_alloc (b) { if (N_REG_CLASSES > 1) { - qty_phys_reg[q] = find_free_reg (qty_min_class[q], + qty_phys_reg[q] = find_free_reg (qty_min_class[q], qty_mode[q], q, 0, 0, qty_birth[q], qty_death[q]); if (qty_phys_reg[q] >= 0) @@ -1651,7 +1651,7 @@ qty_sugg_compare (q1, q2) if (sugg1 != sugg2) return sugg1 - sugg2; - + return pri2 - pri1; } @@ -1683,7 +1683,7 @@ qty_sugg_compare_1 (q1, q2) if (sugg1 != sugg2) return sugg1 - sugg2; - + if (pri1 != pri2) return pri2 - pri1; @@ -1711,10 +1711,10 @@ qty_sugg_compare_1 (q1, q2) MAY_SAVE_COPYCOPY is non-zero if this insn is simply copying USEDREG to SETREG or if the input and output must share a register. In that case, we record a hard reg suggestion in QTY_PHYS_COPY_SUGG. - + There are elaborate checks for the validity of combining. */ - + static int combine_regs (usedreg, setreg, may_save_copy, insn_number, insn, already_dead) rtx usedreg, setreg; @@ -1975,7 +1975,7 @@ reg_is_born (reg, birth) int birth; { register int regno; - + if (GET_CODE (reg) == SUBREG) regno = REGNO (SUBREG_REG (reg)) + SUBREG_WORD (reg); else @@ -2053,7 +2053,7 @@ wipe_dead_reg (reg, output_p) (but actually we test only the first of the block for holding MODE) and still free between insn BORN_INDEX and insn DEAD_INDEX, and return the number of the first of them. - Return -1 if such a block cannot be found. + Return -1 if such a block cannot be found. If QTY crosses calls, insist on a register preserved by calls, unless ACCEPT_CALL_CLOBBERED is nonzero. @@ -2177,7 +2177,7 @@ find_free_reg (class, mode, qty, accept_call_clobbered, just_try_suggested, /* If we are just trying suggested register, we have just tried copy- suggested registers, and there are arithmetic-suggested registers, try them. */ - + /* If it would be profitable to allocate a call-clobbered register and save and restore it around calls, do that. */ if (just_try_suggested && qty_phys_num_copy_sugg[qty] != 0 @@ -2298,7 +2298,7 @@ no_conflict_p (insn, r0, r1) && ! find_reg_note (p, REG_NO_CONFLICT, r1)) return 0; } - + return ok; } diff --git a/gnu/usr.bin/cc/cc_int/loop.c b/gnu/usr.bin/cc/cc_int/loop.c index 123c01383bf3..73037ae37972 100644 --- a/gnu/usr.bin/cc/cc_int/loop.c +++ b/gnu/usr.bin/cc/cc_int/loop.c @@ -20,7 +20,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ /* This is the loop optimization pass of the compiler. It finds invariant computations within loops and moves them - to the beginning of the loop. Then it identifies basic and + to the beginning of the loop. Then it identifies basic and general induction variables. Strength reduction is applied to the general induction variables, and induction variable elimination is applied to the basic induction variables. @@ -205,7 +205,7 @@ struct movable rtx set_dest; /* The destination of this SET. */ rtx dependencies; /* When INSN is libcall, this is an EXPR_LIST of any registers used within the LIBCALL. */ - int consec; /* Number of consecutive following insns + int consec; /* Number of consecutive following insns that must be moved with this one. */ int regno; /* The register it sets */ short lifetime; /* lifetime of that register; @@ -221,7 +221,7 @@ struct movable that the reg is live outside the range from where it is set to the following label. */ unsigned int done : 1; /* 1 inhibits further processing of this */ - + unsigned int partial : 1; /* 1 means this reg is used for zero-extending. In particular, moving it does not make it invariant. */ @@ -506,7 +506,7 @@ scan_loop (loop_start, end, nregs) Note that if we mistakenly think that a loop is entered at the top when, in fact, it is entered at the exit test, the only effect will be slightly poorer optimization. Making the opposite error can generate - incorrect code. Since very few loops now start with a jump to the + incorrect code. Since very few loops now start with a jump to the exit test, the code here to detect that case is very conservative. */ for (p = NEXT_INSN (loop_start); @@ -553,7 +553,7 @@ scan_loop (loop_start, end, nregs) /* If SCAN_START was an insn created by loop, we don't know its luid as required by loop_reg_used_before_p. So skip such loops. (This - test may never be true, but it's best to play it safe.) + test may never be true, but it's best to play it safe.) Also, skip loops where we do not start scanning at a label. This test also rejects loops starting with a JUMP_INSN that failed the @@ -658,7 +658,7 @@ scan_loop (loop_start, end, nregs) temp = find_reg_note (p, REG_EQUIV, NULL_RTX); if (temp) src = XEXP (temp, 0), move_insn = 1; - else + else { temp = find_reg_note (p, REG_EQUAL, NULL_RTX); if (temp && CONSTANT_P (XEXP (temp, 0))) @@ -715,12 +715,12 @@ scan_loop (loop_start, end, nregs) can be combined as long as they are both in the loop, but we move one of them outside the loop. For large loops, this can lose. The most common case of this is the address - of a function being called. + of a function being called. Therefore, if this register is marked as being used exactly once if we are in a loop with calls (a "large loop"), see if we can replace the usage of this register with the source - of this SET. If we can, delete this insn. + of this SET. If we can, delete this insn. Don't do this if P has a REG_RETVAL note or if we have SMALL_REGISTER_CLASSES and SET_SRC is a hard register. */ @@ -750,7 +750,7 @@ scan_loop (loop_start, end, nregs) REG_NOTES (reg_single_usage[regno]) = replace_rtx (REG_NOTES (reg_single_usage[regno]), SET_DEST (set), SET_SRC (set)); - + PUT_CODE (p, NOTE); NOTE_LINE_NUMBER (p) = NOTE_INSN_DELETED; NOTE_SOURCE_FILE (p) = 0; @@ -950,7 +950,7 @@ scan_loop (loop_start, end, nregs) all together as the priority of the first. */ combine_movables (movables, nregs); - + /* Now consider each movable insn to decide whether it is worth moving. Store 0 in n_times_set for each reg that is moved. */ @@ -1049,7 +1049,7 @@ libcall_other_reg (insn, equiv) /* Return 1 if all uses of REG are between INSN and the end of the basic block. */ -static int +static int reg_in_basic_block_p (insn, reg) rtx insn, reg; { @@ -1130,7 +1130,7 @@ skip_consec_insns (insn, count) rtx temp; /* If first insn of libcall sequence, skip to end. */ - /* Do this at start of loop, since INSN is guaranteed to + /* Do this at start of loop, since INSN is guaranteed to be an insn here. */ if (GET_CODE (insn) != NOTE && (temp = find_reg_note (insn, REG_LIBCALL, NULL_RTX))) @@ -1173,7 +1173,7 @@ ignore_some_movables (movables) m1->done = 1; } } -} +} /* For each movable insn, see if the reg that it loads leads when it dies right into another conditionally movable insn. @@ -1716,7 +1716,7 @@ move_movables (movables, threshold, insn_count, loop_start, end, nregs) rtx i1, temp; /* If first insn of libcall sequence, skip to end. */ - /* Do this at start of loop, since p is guaranteed to + /* Do this at start of loop, since p is guaranteed to be an insn here. */ if (GET_CODE (p) != NOTE && (temp = find_reg_note (p, REG_LIBCALL, NULL_RTX))) @@ -1753,7 +1753,7 @@ move_movables (movables, threshold, insn_count, loop_start, end, nregs) && GET_CODE (PATTERN (next)) == USE) && GET_CODE (next) != NOTE) break; - + /* If that is the call, this may be the insn that loads the function address. @@ -1815,7 +1815,7 @@ move_movables (movables, threshold, insn_count, loop_start, end, nregs) rtx reg = m->set_dest; rtx sequence; rtx tem; - + start_sequence (); tem = expand_binop (GET_MODE (reg), and_optab, reg, @@ -1851,7 +1851,7 @@ move_movables (movables, threshold, insn_count, loop_start, end, nregs) cause problems with later optimization passes. It is possible for cse to create such notes like this as a result of record_jump_cond. */ - + if ((temp = find_reg_note (i1, REG_EQUAL, NULL_RTX)) && ! invariant_p (XEXP (temp, 0))) remove_note (i1, temp); @@ -1938,7 +1938,7 @@ move_movables (movables, threshold, insn_count, loop_start, end, nregs) reg_map[m1->regno] = gen_lowpart_common (GET_MODE (m1->set_dest), m->set_dest); - + /* Get rid of the matching insn and prevent further processing of it. */ m1->done = 1; @@ -2288,7 +2288,7 @@ find_and_verify_loops (f) anywhere. Also look for blocks of code ending in an unconditional branch that - exits the loop. If such a block is surrounded by a conditional + exits the loop. If such a block is surrounded by a conditional branch around the block, move the block elsewhere (see below) and invert the jump to point to the code block. This may eliminate a label in our loop and will simplify processing by both us and a @@ -2534,7 +2534,7 @@ mark_loop_jump (x, loop_num) fprintf (loop_dump_stream, "\nLoop at %d ignored due to multiple entry points.\n", INSN_UID (loop_number_loop_starts[dest_loop])); - + loop_invalid[dest_loop] = 1; } return; @@ -2889,7 +2889,7 @@ find_single_use_in_loop (insn, x, usage) { /* Don't count SET_DEST if it is a REG; otherwise count things in SET_DEST because if a register is partially modified, it won't - show up as a potential movable so we don't care how USAGE is set + show up as a potential movable so we don't care how USAGE is set for it. */ if (GET_CODE (SET_DEST (x)) != REG) find_single_use_in_loop (insn, SET_DEST (x), usage); @@ -3200,9 +3200,9 @@ strength_reduce (scan_start, end, loop_top, insn_count, /* Save insn immediately after the loop_end. Insns inserted after loop_end must be put before this insn, so that they will appear in the right - order (i.e. loop order). + order (i.e. loop order). - If loop_end is the end of the current function, then emit a + If loop_end is the end of the current function, then emit a NOTE_INSN_DELETED after loop_end and set end_insert_before to the dummy note insn. */ if (NEXT_INSN (loop_end) != 0) @@ -3360,7 +3360,7 @@ strength_reduce (scan_start, end, loop_top, insn_count, ? "not induction variable" : (! bl->incremented ? "never incremented" : "count error"))); - + reg_iv_type[bl->regno] = NOT_BASIC_INDUCT; *backbl = bl->next; } @@ -3820,7 +3820,7 @@ strength_reduce (scan_start, end, loop_top, insn_count, /* Rescan all givs. If a giv is the same as a giv not reduced, mark it as not reduced. - + For each giv register that can be reduced now: if replaceable, substitute reduced reg wherever the old giv occurs; else add new move insn "giv_reg = reduced_reg". @@ -3957,11 +3957,11 @@ strength_reduce (scan_start, end, loop_top, insn_count, We have to be careful that we didn't initially think we could eliminate this biv because of a giv that we now think may be dead and shouldn't - be used as a biv replacement. + be used as a biv replacement. Also, there is the possibility that we may have a giv that looks like it can be used to eliminate a biv, but the resulting insn - isn't valid. This can happen, for example, on the 88k, where a + isn't valid. This can happen, for example, on the 88k, where a JUMP_INSN can compare a register only with zero. Attempts to replace it with a compare with a constant will fail. @@ -4037,7 +4037,7 @@ strength_reduce (scan_start, end, loop_top, insn_count, /* Unroll loops from within strength reduction so that we can use the induction variable information that strength_reduce has already collected. */ - + if (flag_unroll_loops) unroll_loop (loop_end, insn_count, loop_start, end_insert_before, 1); @@ -4391,7 +4391,7 @@ record_giv (v, insn, src_reg, dest_reg, mult_val, add_val, benefit, /* Check each biv update, and fail if any are between the first and last use of the giv. - + If this loop contains an inner loop that was unrolled, then the insn modifying the biv may have been emitted by the loop unrolling code, and hence does not have a valid luid. Just @@ -4599,7 +4599,7 @@ check_final_value (v, loop_start, loop_end) last_giv_use = p; } } - + /* Now that the lifetime of the giv is known, check for branches from within the lifetime to outside the lifetime if it is still replaceable. */ @@ -4774,7 +4774,7 @@ update_giv_derive (p) Note that treating the entire pseudo as a BIV will result in making simple increments to any GIVs based on it. However, if the variable overflows in its declared mode but not its promoted mode, the result will - be incorrect. This is acceptable if the variable is signed, since + be incorrect. This is acceptable if the variable is signed, since overflows in such cases are undefined, but not if it is unsigned, since those overflows are defined. So we only check for SIGN_EXTEND and not ZERO_EXTEND. @@ -5017,7 +5017,7 @@ general_induction_var (x, src_reg, add_val, mult_val) returns 0. For a non-zero return, the result will have a code of CONST_INT, USE, - REG (for a BIV), PLUS, or MULT. No other codes will occur. + REG (for a BIV), PLUS, or MULT. No other codes will occur. *BENEFIT will be incremented by the benefit of any sub-giv encountered. */ @@ -5301,7 +5301,7 @@ consec_sets_giv (first_benefit, p, src_reg, dest_reg, rtx set; /* Indicate that this is a giv so that we can update the value produced in - each insn of the multi-insn sequence. + each insn of the multi-insn sequence. This induction structure will be used only by the call to general_induction_var below, so we can allocate it on our stack. @@ -5371,7 +5371,7 @@ consec_sets_giv (first_benefit, p, src_reg, dest_reg, /* Return an rtx, if any, that expresses giv G2 as a function of the register represented by G1. If no such expression can be found, or it is clear that - it cannot possibly be a valid address, 0 is returned. + it cannot possibly be a valid address, 0 is returned. To perform the computation, we note that G1 = a * v + b and @@ -5832,7 +5832,7 @@ check_dbra_loop (loop_end, insn_count, loop_start) p = emit_insn_before (gen_add2_insn (reg, new_add_val), bl->biv->insn); delete_insn (bl->biv->insn); - + /* Update biv info to reflect its new status. */ bl->biv->insn = p; bl->initial_value = start_value; @@ -6118,7 +6118,7 @@ maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where) /* If that failed, put back the change we made above. */ XEXP (x, 1-arg_operand) = reg; } - + /* Look for giv with positive constant mult_val and nonconst add_val. Insert insns to calculate new compare value. */ @@ -6244,7 +6244,7 @@ maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where) switch (fmt[i]) { case 'e': - if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl, + if (! maybe_eliminate_biv_1 (XEXP (x, i), insn, bl, eliminate_p, where)) return 0; break; @@ -6259,7 +6259,7 @@ maybe_eliminate_biv_1 (x, insn, bl, eliminate_p, where) } return 1; -} +} /* Return nonzero if the last use of REG is in an insn following INSN in the same basic block. */ diff --git a/gnu/usr.bin/cc/cc_int/optabs.c b/gnu/usr.bin/cc/cc_int/optabs.c index 4b32d24b0f48..ac7230ef37cd 100644 --- a/gnu/usr.bin/cc/cc_int/optabs.c +++ b/gnu/usr.bin/cc/cc_int/optabs.c @@ -281,7 +281,7 @@ add_equal_note (seq, target, code, op0, op1) /* Widen OP to MODE and return the rtx for the widened operand. UNSIGNEDP says whether OP is signed or unsigned. NO_EXTEND is nonzero if we need - not actually do a sign-extend or zero-extend, but can leave the + not actually do a sign-extend or zero-extend, but can leave the higher-order bits of the result rtx undefined, for example, in the case of logical operations, but not right shifts. */ @@ -709,7 +709,7 @@ expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods) if (inter != 0) inter = expand_binop (word_mode, binoptab, outof_input, op1, outof_target, unsignedp, next_methods); - + if (inter != 0 && inter != outof_target) emit_move_insn (outof_target, inter); } @@ -945,7 +945,7 @@ expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods) } carry_in = carry_out; - } + } if (i == GET_MODE_BITSIZE (mode) / BITS_PER_WORD) { @@ -965,7 +965,7 @@ expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods) /* If we want to multiply two two-word values and have normal and widening multiplies of single-word values, we can do this with three smaller multiplications. Note that we do not make a REG_NO_CONFLICT block here - because we are not operating on one word at a time. + because we are not operating on one word at a time. The multiplication proceeds as follows: _______________________ @@ -1115,7 +1115,7 @@ expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods) emit_move_insn (product_high, temp); if (temp != 0) - temp = expand_binop (word_mode, binoptab, op1_low, op0_xhigh, + temp = expand_binop (word_mode, binoptab, op1_low, op0_xhigh, NULL_RTX, 0, OPTAB_DIRECT); if (temp != 0) @@ -1310,7 +1310,7 @@ expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods) case DIV: /* (a+ib) / (c+id) = ((ac+bd)/(cc+dd)) + i((bc-ad)/(cc+dd)) */ - + if (imag1 == 0) { /* (a+ib) / (c+i0) = (a/c) + i(b/c) */ @@ -1353,7 +1353,7 @@ expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods) rtx real_t, imag_t; rtx lhs, rhs; rtx temp1, temp2; - + /* Don't fetch these from memory more than once. */ real0 = force_reg (submode, real0); real1 = force_reg (submode, real1); @@ -1386,7 +1386,7 @@ expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods) /* Calculate the dividend */ real_t = expand_binop (submode, smul_optab, real0, real1, NULL_RTX, unsignedp, methods); - + imag_t = expand_binop (submode, smul_optab, real0, imag1, NULL_RTX, unsignedp, methods); @@ -1411,7 +1411,7 @@ expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods) real_t = expand_binop (submode, add_optab, temp1, temp2, NULL_RTX, unsignedp, methods); - + temp1 = expand_binop (submode, smul_optab, imag0, real1, NULL_RTX, unsignedp, methods); @@ -1455,7 +1455,7 @@ expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods) ok = 1; } break; - + default: abort (); } @@ -1470,9 +1470,9 @@ expand_binop (mode, binoptab, op0, op1, target, unsignedp, methods) = gen_rtx (binoptab->code, mode, copy_rtx (op0), copy_rtx (op1)); else equiv_value = 0; - + emit_no_conflict_block (seq, target, op0, op1, equiv_value); - + return target; } } @@ -1736,7 +1736,7 @@ expand_twoval_binop (binoptab, op0, op1, targ0, targ1, unsignedp) if (! (*insn_operand_predicate[icode][0]) (targ0, mode) || ! (*insn_operand_predicate[icode][3]) (targ1, mode)) abort (); - + pat = GEN_FCN (icode) (targ0, xop0, xop1, targ1); if (pat) { @@ -1852,7 +1852,7 @@ expand_unop (mode, unoptab, op0, target, unsignedp) } emit_insn (pat); - + return temp; } else @@ -1877,7 +1877,7 @@ expand_unop (mode, unoptab, op0, target, unsignedp) (unoptab == neg_optab || unoptab == one_cmpl_optab) && class == MODE_INT); - + temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX, unsignedp); @@ -1950,7 +1950,7 @@ expand_unop (mode, unoptab, op0, target, unsignedp) if (target == 0) target = gen_reg_rtx (mode); - + start_sequence (); target_piece = gen_imagpart (submode, target); @@ -2019,7 +2019,7 @@ expand_unop (mode, unoptab, op0, target, unsignedp) (unoptab == neg_optab || unoptab == one_cmpl_optab) && class == MODE_INT); - + temp = expand_unop (wider_mode, unoptab, xop0, NULL_RTX, unsignedp); @@ -2103,7 +2103,7 @@ expand_abs (mode, op0, target, unsignedp, safe) /* If this mode is an integer too wide to compare properly, compare word by word. Rely on CSE to optimize constant cases. */ if (GET_MODE_CLASS (mode) == MODE_INT && ! can_compare_p (mode)) - do_jump_by_parts_greater_rtx (mode, 0, target, const0_rtx, + do_jump_by_parts_greater_rtx (mode, 0, target, const0_rtx, NULL_RTX, op1); else { @@ -2206,7 +2206,7 @@ expand_complex_abs (mode, op0, target, unsignedp) } emit_insn (pat); - + return temp; } else @@ -2363,7 +2363,7 @@ emit_unop_insn (icode, target, op0, code) if (GET_CODE (pat) == SEQUENCE && code != UNKNOWN) add_equal_note (pat, temp, code, op0, NULL_RTX); - + emit_insn (pat); if (temp != target) @@ -2384,7 +2384,7 @@ emit_unop_insn (icode, target, op0, code) INSNS is a block of code generated to perform the operation, not including the CLOBBER and final copy. All insns that compute intermediate values - are first emitted, followed by the block as described above. + are first emitted, followed by the block as described above. TARGET, OP0, and OP1 are the output and inputs of the operations, respectively. OP1 may be zero for a unary operation. @@ -3048,7 +3048,7 @@ rtx gen_add2_insn (x, y) rtx x, y; { - int icode = (int) add_optab->handlers[(int) GET_MODE (x)].insn_code; + int icode = (int) add_optab->handlers[(int) GET_MODE (x)].insn_code; if (! (*insn_operand_predicate[icode][0]) (x, insn_operand_mode[icode][0]) || ! (*insn_operand_predicate[icode][1]) (x, insn_operand_mode[icode][1]) @@ -3071,7 +3071,7 @@ rtx gen_sub2_insn (x, y) rtx x, y; { - int icode = (int) sub_optab->handlers[(int) GET_MODE (x)].insn_code; + int icode = (int) sub_optab->handlers[(int) GET_MODE (x)].insn_code; if (! (*insn_operand_predicate[icode][0]) (x, insn_operand_mode[icode][0]) || ! (*insn_operand_predicate[icode][1]) (x, insn_operand_mode[icode][1]) @@ -3100,7 +3100,7 @@ gen_move_insn (x, y) rtx seq; if (mode == VOIDmode) - mode = GET_MODE (y); + mode = GET_MODE (y); insn_code = mov_optab->handlers[(int) mode].insn_code; @@ -3159,7 +3159,7 @@ gen_move_insn (x, y) x = gen_lowpart (tmode, x); y = gen_lowpart (tmode, y); } - + insn_code = mov_optab->handlers[(int) tmode].insn_code; return (GEN_FCN (insn_code) (x, y)); } @@ -3325,7 +3325,7 @@ expand_float (to, from, unsignedp) rtx temp1; rtx neglabel = gen_label_rtx (); - /* Don't use TARGET if it isn't a register, is a hard register, + /* Don't use TARGET if it isn't a register, is a hard register, or is the wrong mode. */ if (GET_CODE (target) != REG || REGNO (target) < FIRST_PSEUDO_REGISTER @@ -3353,7 +3353,7 @@ expand_float (to, from, unsignedp) NULL_RTX, 1, OPTAB_LIB_WIDEN); temp1 = expand_shift (RSHIFT_EXPR, imode, from, integer_one_node, NULL_RTX, 1); - temp = expand_binop (imode, ior_optab, temp, temp1, temp, 1, + temp = expand_binop (imode, ior_optab, temp, temp1, temp, 1, OPTAB_LIB_WIDEN); expand_float (target, temp, 0); @@ -3706,7 +3706,7 @@ expand_fix (to, from, unsignedp) gen_rtx (unsignedp ? UNSIGNED_FIX : FIX, GET_MODE (to), from)); } - + if (GET_MODE (to) == GET_MODE (target)) emit_move_insn (to, target); else @@ -3838,17 +3838,17 @@ init_optabs () /* Start by initializing all tables to contain CODE_FOR_nothing. */ for (p = fixtab[0][0]; - p < fixtab[0][0] + sizeof fixtab / sizeof (fixtab[0][0][0]); + p < fixtab[0][0] + sizeof fixtab / sizeof (fixtab[0][0][0]); p++) *p = CODE_FOR_nothing; for (p = fixtrunctab[0][0]; - p < fixtrunctab[0][0] + sizeof fixtrunctab / sizeof (fixtrunctab[0][0][0]); + p < fixtrunctab[0][0] + sizeof fixtrunctab / sizeof (fixtrunctab[0][0][0]); p++) *p = CODE_FOR_nothing; for (p = floattab[0][0]; - p < floattab[0][0] + sizeof floattab / sizeof (floattab[0][0][0]); + p < floattab[0][0] + sizeof floattab / sizeof (floattab[0][0][0]); p++) *p = CODE_FOR_nothing; diff --git a/gnu/usr.bin/cc/cc_int/real.c b/gnu/usr.bin/cc/cc_int/real.c index f3e22a7cad43..6a15925f25c1 100644 --- a/gnu/usr.bin/cc/cc_int/real.c +++ b/gnu/usr.bin/cc/cc_int/real.c @@ -86,7 +86,7 @@ research.att.com: netlib/cephes/ldouble.shar.Z */ both mean DFmode. In this case, the software floating-point support available here is activated by writing #define REAL_ARITHMETIC - in tm.h. + in tm.h. The case LONG_DOUBLE_TYPE_SIZE = 128 activates TFmode support and may deactivate XFmode since `long double' is used to refer @@ -428,7 +428,7 @@ static void esqrt PROTO((unsigned EMUSHORT *, unsigned EMUSHORT *)); swapping ends if required, into output array of longs. The result is normally passed to fprintf by the ASM_OUTPUT_ macros. */ -static void +static void endian (e, x, mode) unsigned EMUSHORT e[]; long x[]; @@ -534,7 +534,7 @@ endian (e, x, mode) /* This is the implementation of the REAL_ARITHMETIC macro. */ -void +void earith (value, icode, r1, r2) REAL_VALUE_TYPE *value; int icode; @@ -613,7 +613,7 @@ PUT_REAL (v, value); /* Truncate REAL_VALUE_TYPE toward zero to signed HOST_WIDE_INT. implements REAL_VALUE_RNDZINT (x) (etrunci (x)). */ -REAL_VALUE_TYPE +REAL_VALUE_TYPE etrunci (x) REAL_VALUE_TYPE x; { @@ -636,7 +636,7 @@ etrunci (x) /* Truncate REAL_VALUE_TYPE toward zero to unsigned HOST_WIDE_INT; implements REAL_VALUE_UNSIGNED_RNDZINT (x) (etruncui (x)). */ -REAL_VALUE_TYPE +REAL_VALUE_TYPE etruncui (x) REAL_VALUE_TYPE x; { @@ -660,7 +660,7 @@ etruncui (x) binary, rounding off as indicated by the machine_mode argument. Then it promotes the rounded value to REAL_VALUE_TYPE. */ -REAL_VALUE_TYPE +REAL_VALUE_TYPE ereal_atof (s, t) char *s; enum machine_mode t; @@ -697,7 +697,7 @@ ereal_atof (s, t) /* Expansion of REAL_NEGATE. */ -REAL_VALUE_TYPE +REAL_VALUE_TYPE ereal_negate (x) REAL_VALUE_TYPE x; { @@ -759,7 +759,7 @@ efixui (x) /* REAL_VALUE_FROM_INT macro. */ -void +void ereal_from_int (d, i, j) REAL_VALUE_TYPE *d; HOST_WIDE_INT i, j; @@ -793,7 +793,7 @@ ereal_from_int (d, i, j) /* REAL_VALUE_FROM_UNSIGNED_INT macro. */ -void +void ereal_from_uint (d, i, j) REAL_VALUE_TYPE *d; unsigned HOST_WIDE_INT i, j; @@ -814,7 +814,7 @@ ereal_from_uint (d, i, j) /* REAL_VALUE_TO_INT macro. */ -void +void ereal_to_int (low, high, rr) HOST_WIDE_INT *low, *high; REAL_VALUE_TYPE rr; @@ -993,7 +993,7 @@ debug_real (r) REAL_VALUE_TO_DECIMAL (r, "%.20g", dstr); fprintf (stderr, "%s", dstr); -} +} /* Target values are arrays of host longs. A long is guaranteed @@ -1001,7 +1001,7 @@ debug_real (r) /* 128-bit long double */ -void +void etartdouble (r, l) REAL_VALUE_TYPE r; long l[]; @@ -1015,7 +1015,7 @@ etartdouble (r, l) /* 80-bit long double */ -void +void etarldouble (r, l) REAL_VALUE_TYPE r; long l[]; @@ -1027,7 +1027,7 @@ etarldouble (r, l) endian (e, l, XFmode); } -void +void etardouble (r, l) REAL_VALUE_TYPE r; long l[]; @@ -1112,11 +1112,11 @@ ereal_isneg (x) most significant word first, most significant bit is set) ei[NI-1] low guard word (0x8000 bit is rounding place) - - - + + + Routines for external format numbers - + asctoe (string, e) ASCII string to extended double e type asctoe64 (string, &d) ASCII string to long double asctoe53 (string, &d) ASCII string to double @@ -1157,10 +1157,10 @@ ereal_isneg (x) eisinf (e) 1 if e has maximum exponent (non-IEEE) or is infinite (IEEE) eisnan (e) 1 if e is a NaN - + Routines for internal format numbers - + eaddm (ai, bi) add significands, bi = bi + ai ecleaz (ei) ei = 0 ecleazs (ei) set ei = 0 but leave its sign alone @@ -1190,13 +1190,13 @@ ereal_isneg (x) after each arithmetic operation. Exception flags are NOT fully supported. - + Signaling NaN's are NOT supported; they are treated the same as quiet NaN's. - + Define INFINITY for support of infinity; otherwise a saturation arithmetic is implemented. - + Define NANS for support of Not-a-Number items; otherwise the arithmetic will never produce a NaN output, and might be confused by a NaN input. @@ -1204,7 +1204,7 @@ ereal_isneg (x) either a or b is a NaN. This means asking `if (ecmp (a,b) < 0)' may not be legitimate. Use `if (ecmp (a,b) == -1)' for `less than' if in doubt. - + Denormals are always supported here where appropriate (e.g., not for conversion to DEC numbers). */ @@ -1217,26 +1217,26 @@ ereal_isneg (x) mode, most floating point constants are given as arrays of octal integers to eliminate decimal to binary conversion errors that might be introduced by the compiler. - + For computers, such as IBM PC, that follow the IEEE Standard for Binary Floating Point Arithmetic (ANSI/IEEE Std 754-1985), the symbol IBMPC or MIEEE should be defined. These numbers have 53-bit significands. In this mode, constants are provided as arrays of hexadecimal 16 bit integers. - + To accommodate other types of computer arithmetic, all constants are also provided in a normal decimal radix which one can hope are correctly converted to a suitable format by the available C language compiler. To invoke this mode, the symbol UNK is defined. - + An important difference among these modes is a predefined set of machine arithmetic constants for each. The numbers MACHEP (the machine roundoff error), MAXNUM (largest number represented), and several other parameters are preset by the configuration symbol. Check the file const.c to ensure that these values are correct for your computer. - + For ANSI C compatibility, define ANSIC equal to 1. Currently this affects only the atan2 function and others that use it. */ @@ -1331,7 +1331,7 @@ extern int rndprc; /* Clear out entire external format number. */ -static void +static void eclear (x) register unsigned EMUSHORT *x; { @@ -1345,7 +1345,7 @@ eclear (x) /* Move external format number from a to b. */ -static void +static void emov (a, b) register unsigned EMUSHORT *a, *b; { @@ -1358,17 +1358,17 @@ emov (a, b) /* Absolute value of external format number. */ -static void +static void eabs (x) unsigned EMUSHORT x[]; { /* sign is top bit of last word of external format */ - x[NE - 1] &= 0x7fff; + x[NE - 1] &= 0x7fff; } /* Negate external format number. */ -static void +static void eneg (x) unsigned EMUSHORT x[]; { @@ -1380,7 +1380,7 @@ eneg (x) /* Return 1 if sign bit of external format number is nonzero, else zero. */ -static int +static int eisneg (x) unsigned EMUSHORT x[]; { @@ -1394,7 +1394,7 @@ eisneg (x) /* Return 1 if external format number is infinity, else return zero. */ -static int +static int eisinf (x) unsigned EMUSHORT x[]; { @@ -1413,7 +1413,7 @@ eisinf (x) /* Check if e-type number is not a number. The bit pattern is one that we defined, so we know for sure how to detect it. */ -static int +static int eisnan (x) unsigned EMUSHORT x[]; { @@ -1437,7 +1437,7 @@ eisnan (x) /* Fill external format number with infinity pattern (IEEE) or largest possible number (non-IEEE). */ -static void +static void einfin (x) register unsigned EMUSHORT *x; { @@ -1481,7 +1481,7 @@ einfin (x) This generates Intel's quiet NaN pattern for extended real. The exponent is 7fff, the leading mantissa word is c000. */ -static void +static void enan (x, sign) register unsigned EMUSHORT *x; int sign; @@ -1497,7 +1497,7 @@ enan (x, sign) /* Move in external format number, converting it to internal format. */ -static void +static void emovi (a, b) unsigned EMUSHORT *a, *b; { @@ -1545,7 +1545,7 @@ emovi (a, b) /* Move internal format number out, converting it to external format. */ -static void +static void emovo (a, b) unsigned EMUSHORT *a, *b; { @@ -1584,7 +1584,7 @@ emovo (a, b) /* Clear out internal format number. */ -static void +static void ecleaz (xi) register unsigned EMUSHORT *xi; { @@ -1597,7 +1597,7 @@ ecleaz (xi) /* Same, but don't touch the sign. */ -static void +static void ecleazs (xi) register unsigned EMUSHORT *xi; { @@ -1612,7 +1612,7 @@ ecleazs (xi) /* Move internal format number from a to b. */ -static void +static void emovz (a, b) register unsigned EMUSHORT *a, *b; { @@ -1640,7 +1640,7 @@ einan (x) /* Return nonzero if internal format number is a NaN. */ -static int +static int eiisnan (x) unsigned EMUSHORT x[]; { @@ -1659,7 +1659,7 @@ eiisnan (x) /* Return nonzero if sign of internal format number is nonzero. */ -static int +static int eiisneg (x) unsigned EMUSHORT x[]; { @@ -1681,7 +1681,7 @@ eiinfin (x) /* Return nonzero if internal format number is infinite. */ -static int +static int eiisinf (x) unsigned EMUSHORT x[]; { @@ -1728,7 +1728,7 @@ ecmpm (a, b) /* Shift significand down by 1 bit. */ -static void +static void eshdn1 (x) register unsigned EMUSHORT *x; { @@ -1754,7 +1754,7 @@ eshdn1 (x) /* Shift significand up by 1 bit. */ -static void +static void eshup1 (x) register unsigned EMUSHORT *x; { @@ -1779,7 +1779,7 @@ eshup1 (x) /* Shift significand down by 8 bits. */ -static void +static void eshdn8 (x) register unsigned EMUSHORT *x; { @@ -1800,7 +1800,7 @@ eshdn8 (x) /* Shift significand up by 8 bits. */ -static void +static void eshup8 (x) register unsigned EMUSHORT *x; { @@ -1822,7 +1822,7 @@ eshup8 (x) /* Shift significand up by 16 bits. */ -static void +static void eshup6 (x) register unsigned EMUSHORT *x; { @@ -1840,7 +1840,7 @@ eshup6 (x) /* Shift significand down by 16 bits. */ -static void +static void eshdn6 (x) register unsigned EMUSHORT *x; { @@ -1858,7 +1858,7 @@ eshdn6 (x) /* Add significands. x + y replaces y. */ -static void +static void eaddm (x, y) unsigned EMUSHORT *x, *y; { @@ -1884,7 +1884,7 @@ eaddm (x, y) /* Subtract significands. y - x replaces y. */ -static void +static void esubm (x, y) unsigned EMUSHORT *x, *y; { @@ -1918,7 +1918,7 @@ static unsigned EMUSHORT equot[NI]; /* Divide significands */ -int +int edivm (den, num) unsigned EMUSHORT den[], num[]; { @@ -2015,7 +2015,7 @@ edivm (den, num) /* Multiply significands */ -int +int emulm (a, b) unsigned EMUSHORT a[], b[]; { @@ -2224,15 +2224,15 @@ emulm (a, b) The internal format number to be rounded is "s". Input "lost" indicates whether or not the number is exact. This is the so-called sticky bit. - + Input "subflg" indicates whether the number was obtained by a subtraction operation. In that case if lost is nonzero then the number is slightly smaller than indicated. - + Input "exp" is the biased exponent, which may be negative. the exponent field of "s" is ignored but is replaced by "exp" as adjusted by normalization and rounding. - + Input "rcntrl" is the rounding control. For future reference: In order for emdnorm to round off denormal @@ -2240,7 +2240,7 @@ emulm (a, b) adjusted to be the actual value it would have after conversion to the final floating point type. This adjustment has been implemented for all type conversions (etoe53, etc.) and decimal - conversions, but not for the arithmetic functions (eadd, etc.). + conversions, but not for the arithmetic functions (eadd, etc.). Data types having standard 15-bit exponents are not affected by this, but SFmode and DFmode are affected. For example, ediv with rndprc = 24 will not round correctly to 24-bit precision if the @@ -2254,7 +2254,7 @@ static unsigned EMUSHORT rebit = 0; static int re = 0; static unsigned EMUSHORT rbit[NI]; -static void +static void emdnorm (s, lost, subflg, exp, rcntrl) unsigned EMUSHORT s[]; int lost; @@ -2452,7 +2452,7 @@ emdnorm (s, lost, subflg, exp, rcntrl) static int subflg = 0; -static void +static void esub (a, b, c) unsigned EMUSHORT *a, *b, *c; { @@ -2485,7 +2485,7 @@ esub (a, b, c) /* Add. */ -static void +static void eadd (a, b, c) unsigned EMUSHORT *a, *b, *c; { @@ -2516,7 +2516,7 @@ eadd (a, b, c) eadd1 (a, b, c); } -static void +static void eadd1 (a, b, c) unsigned EMUSHORT *a, *b, *c; { @@ -2622,7 +2622,7 @@ eadd1 (a, b, c) /* Divide. */ -static void +static void ediv (a, b, c) unsigned EMUSHORT *a, *b, *c; { @@ -2726,7 +2726,7 @@ ediv (a, b, c) /* Multiply. */ -static void +static void emul (a, b, c) unsigned EMUSHORT *a, *b, *c; { @@ -2913,7 +2913,7 @@ e53toe (pe, y) #endif /* not DEC */ } -static void +static void e64toe (pe, y) unsigned EMUSHORT *pe, *y; { @@ -2986,7 +2986,7 @@ e64toe (pe, y) } -static void +static void e113toe (pe, y) unsigned EMUSHORT *pe, *y; { @@ -3064,7 +3064,7 @@ e113toe (pe, y) /* Convert IEEE single precision to e type. */ -static void +static void e24toe (pe, y) unsigned EMUSHORT *pe, *y; { @@ -3152,7 +3152,7 @@ e24toe (pe, y) } -static void +static void etoe113 (x, e) unsigned EMUSHORT *x, *e; { @@ -3184,7 +3184,7 @@ etoe113 (x, e) /* Move out internal format to ieee long double */ -static void +static void toe113 (a, b) unsigned EMUSHORT *a, *b; { @@ -3235,7 +3235,7 @@ toe113 (a, b) #endif } -static void +static void etoe64 (x, e) unsigned EMUSHORT *x, *e; { @@ -3269,7 +3269,7 @@ etoe64 (x, e) /* Move out internal format to ieee long double. */ -static void +static void toe64 (a, b) unsigned EMUSHORT *a, *b; { @@ -3325,14 +3325,14 @@ toe64 (a, b) #ifdef DEC -static void +static void etoe53 (x, e) unsigned EMUSHORT *x, *e; { etodec (x, e); /* see etodec.c */ } -static void +static void toe53 (x, y) unsigned EMUSHORT *x, *y; { @@ -3342,14 +3342,14 @@ toe53 (x, y) #else #ifdef IBM -static void +static void etoe53 (x, e) unsigned EMUSHORT *x, *e; { etoibm (x, e, DFmode); } -static void +static void toe53 (x, y) unsigned EMUSHORT *x, *y; { @@ -3358,7 +3358,7 @@ toe53 (x, y) #else /* it's neither DEC nor IBM */ -static void +static void etoe53 (x, e) unsigned EMUSHORT *x, *e; { @@ -3390,7 +3390,7 @@ etoe53 (x, e) } -static void +static void toe53 (x, y) unsigned EMUSHORT *x, *y; { @@ -3477,14 +3477,14 @@ toe53 (x, y) #ifdef IBM -static void +static void etoe24 (x, e) unsigned EMUSHORT *x, *e; { etoibm (x, e, SFmode); } -static void +static void toe24 (x, y) unsigned EMUSHORT *x, *y; { @@ -3493,7 +3493,7 @@ toe24 (x, y) #else -static void +static void etoe24 (x, e) unsigned EMUSHORT *x, *e; { @@ -3524,7 +3524,7 @@ etoe24 (x, e) toe24 (xi, e); } -static void +static void toe24 (x, y) unsigned EMUSHORT *x, *y; { @@ -3607,13 +3607,13 @@ toe24 (x, y) } #endif /* not IBM */ -/* Compare two e type numbers. +/* Compare two e type numbers. Return +1 if a > b 0 if a == b -1 if a < b -2 if either a or b is a NaN. */ -static int +static int ecmp (a, b) unsigned EMUSHORT *a, *b; { @@ -3680,7 +3680,7 @@ ecmp (a, b) /* Find nearest integer to x = floor (x + 0.5). */ -static void +static void eround (x, y) unsigned EMUSHORT *x, *y; { @@ -3693,7 +3693,7 @@ eround (x, y) /* Convert HOST_WIDE_INT to e type. */ -static void +static void ltoe (lp, y) HOST_WIDE_INT *lp; unsigned EMUSHORT *y; @@ -3735,7 +3735,7 @@ ltoe (lp, y) /* Convert unsigned HOST_WIDE_INT to e type. */ -static void +static void ultoe (lp, y) unsigned HOST_WIDE_INT *lp; unsigned EMUSHORT *y; @@ -3775,7 +3775,7 @@ ultoe (lp, y) The output e-type fraction FRAC is the positive fractional part of abs (X). */ -static void +static void eifrac (x, i, frac) unsigned EMUSHORT *x; HOST_WIDE_INT *i; @@ -3858,7 +3858,7 @@ eifrac (x, i, frac) A negative e type input yields integer output = 0 but correct fraction. */ -static void +static void euifrac (x, i, frac) unsigned EMUSHORT *x; unsigned HOST_WIDE_INT *i; @@ -3929,7 +3929,7 @@ euifrac (x, i, frac) /* Shift significand area up or down by the number of bits given by SC. */ -static int +static int eshift (x, sc) unsigned EMUSHORT *x; int sc; @@ -3997,7 +3997,7 @@ eshift (x, sc) /* Shift normalize the significand area pointed to by argument. Shift count (up = positive) is returned. */ -static int +static int enormlz (x) unsigned EMUSHORT x[]; { @@ -4169,7 +4169,7 @@ static unsigned EMUSHORT emtens[NTEN + 1][NE] = }; #endif -static void +static void e24toasc (x, string, ndigs) unsigned EMUSHORT x[]; char *string; @@ -4182,7 +4182,7 @@ e24toasc (x, string, ndigs) } -static void +static void e53toasc (x, string, ndigs) unsigned EMUSHORT x[]; char *string; @@ -4195,7 +4195,7 @@ e53toasc (x, string, ndigs) } -static void +static void e64toasc (x, string, ndigs) unsigned EMUSHORT x[]; char *string; @@ -4207,7 +4207,7 @@ e64toasc (x, string, ndigs) etoasc (w, string, ndigs); } -static void +static void e113toasc (x, string, ndigs) unsigned EMUSHORT x[]; char *string; @@ -4222,7 +4222,7 @@ e113toasc (x, string, ndigs) static char wstring[80]; /* working storage for ASCII output */ -static void +static void etoasc (x, string, ndigs) unsigned EMUSHORT x[]; char *string; @@ -4539,7 +4539,7 @@ etoasc (x, string, ndigs) /* ASCII to single */ -static void +static void asctoe24 (s, y) char *s; unsigned EMUSHORT *y; @@ -4550,7 +4550,7 @@ asctoe24 (s, y) /* ASCII to double */ -static void +static void asctoe53 (s, y) char *s; unsigned EMUSHORT *y; @@ -4565,7 +4565,7 @@ asctoe53 (s, y) /* ASCII to long double */ -static void +static void asctoe64 (s, y) char *s; unsigned EMUSHORT *y; @@ -4575,7 +4575,7 @@ asctoe64 (s, y) /* ASCII to 128-bit long double */ -static void +static void asctoe113 (s, y) char *s; unsigned EMUSHORT *y; @@ -4585,7 +4585,7 @@ asctoe113 (s, y) /* ASCII to super double */ -static void +static void asctoe (s, y) char *s; unsigned EMUSHORT *y; @@ -4596,7 +4596,7 @@ asctoe (s, y) /* ASCII to e type, with specified rounding precision = oprec. */ -static void +static void asctoeg (ss, y, oprec) char *ss; unsigned EMUSHORT *y; @@ -4932,7 +4932,7 @@ static unsigned EMUSHORT bmask[] = 0x0000, }; -static void +static void efloor (x, y) unsigned EMUSHORT x[], y[]; { @@ -4983,7 +4983,7 @@ efloor (x, y) For example, 1.1 = 0.55 * 2**1 Handles denormalized numbers properly using long integer exp. */ -static void +static void efrexp (x, exp, s) unsigned EMUSHORT x[]; int *exp; @@ -5008,7 +5008,7 @@ efrexp (x, exp, s) /* Return y = x * 2**pwr2. */ -static void +static void eldexp (x, pwr2, y) unsigned EMUSHORT x[]; int pwr2; @@ -5030,7 +5030,7 @@ eldexp (x, pwr2, y) /* c = remainder after dividing b by a Least significant integer quotient bits left in equot[]. */ -static void +static void eremain (a, b, c) unsigned EMUSHORT a[], b[], c[]; { @@ -5063,7 +5063,7 @@ eremain (a, b, c) emovo (num, c); } -static void +static void eiremain (den, num) unsigned EMUSHORT den[], num[]; { @@ -5098,7 +5098,7 @@ eiremain (den, num) error conditions (in the include file mconf.h). Mnemonic Value Significance - + DOMAIN 1 argument domain error SING 2 function singularity OVERFLOW 3 overflow range error @@ -5108,7 +5108,7 @@ eiremain (den, num) INVALID 7 NaN - producing operation EDOM 33 Unix domain error code ERANGE 34 Unix range error code - + The default version of the file prints the function name, passed to it by the pointer fctnam, followed by the error condition. The display is directed to the standard @@ -5116,7 +5116,7 @@ eiremain (den, num) program. Users may wish to modify the program to abort by calling exit under severe error conditions such as domain errors. - + Since all error conditions pass control to this function, the display may be easily changed, eliminated, or directed to an error logging device. */ @@ -5140,7 +5140,7 @@ static char *ermsg[NMSGS] = int merror = 0; extern int merror; -static void +static void mtherr (name, code) char *name; int code; @@ -5164,7 +5164,7 @@ mtherr (name, code) #ifdef DEC /* Convert DEC double precision to e type. */ -static void +static void dectoe (d, e) unsigned EMUSHORT *d; unsigned EMUSHORT *e; @@ -5211,7 +5211,7 @@ dectoe (d, e) ; etodec (e, &d); */ -static void +static void etodec (x, d) unsigned EMUSHORT *x, *d; { @@ -5229,7 +5229,7 @@ etodec (x, d) todec (xi, d); } -static void +static void todec (x, y) unsigned EMUSHORT *x, *y; { @@ -5275,7 +5275,7 @@ todec (x, y) #ifdef IBM /* Convert IBM single/double precision to e type. */ -static void +static void ibmtoe (d, e, mode) unsigned EMUSHORT *d; unsigned EMUSHORT *e; @@ -5319,7 +5319,7 @@ ibmtoe (d, e, mode) /* Convert e type to IBM single/double precision. */ -static void +static void etoibm (x, d, mode) unsigned EMUSHORT *x, *d; enum machine_mode mode; @@ -5338,7 +5338,7 @@ etoibm (x, d, mode) toibm (xi, d, mode); } -static void +static void toibm (x, y, mode) unsigned EMUSHORT *x, *y; enum machine_mode mode; @@ -5643,7 +5643,7 @@ ditoe (di, e) /* Convert e-type to unsigned 64-bit int. */ -static void +static void etoudi (x, i) unsigned EMUSHORT *x; unsigned EMUSHORT *i; @@ -5723,7 +5723,7 @@ noshift: /* Convert e-type to signed 64-bit int. */ -static void +static void etodi (x, i) unsigned EMUSHORT *x; unsigned EMUSHORT *i; @@ -5824,7 +5824,7 @@ etodi (x, i) static int esqinited = 0; static unsigned short sqrndbit[NI]; -static void +static void esqrt (x, y) unsigned EMUSHORT *x, *y; { diff --git a/gnu/usr.bin/cc/cc_int/recog.c b/gnu/usr.bin/cc/cc_int/recog.c index a09a1d93e35c..f4aac50e7548 100644 --- a/gnu/usr.bin/cc/cc_int/recog.c +++ b/gnu/usr.bin/cc/cc_int/recog.c @@ -259,7 +259,7 @@ apply_change_group () { int j; - newpat = gen_rtx (PARALLEL, VOIDmode, + newpat = gen_rtx (PARALLEL, VOIDmode, gen_rtvec (XVECLEN (pat, 0) - 1)); for (j = 0; j < XVECLEN (newpat, 0); j++) XVECEXP (newpat, 0, j) = XVECEXP (pat, 0, j); @@ -379,10 +379,10 @@ validate_replace_rtx_1 (loc, from, to, object) /* If we have have a PLUS whose second operand is now a CONST_INT, use plus_constant to try to simplify it. */ if (GET_CODE (XEXP (x, 1)) == CONST_INT && XEXP (x, 1) == to) - validate_change (object, loc, + validate_change (object, loc, plus_constant (XEXP (x, 0), INTVAL (XEXP (x, 1))), 1); return; - + case ZERO_EXTEND: case SIGN_EXTEND: /* In these cases, the operation to be performed depends on the mode @@ -405,7 +405,7 @@ validate_replace_rtx_1 (loc, from, to, object) return; } break; - + case SUBREG: /* If we have a SUBREG of a register that we are replacing and we are replacing it with a MEM, make a new MEM and try replacing the @@ -494,7 +494,7 @@ validate_replace_rtx_1 (loc, from, to, object) break; } - + fmt = GET_RTX_FORMAT (code); for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) { @@ -1283,7 +1283,7 @@ decode_asm_operands (body, operands, operand_locs, constraints, modes) { if (GET_CODE (XVECEXP (body, 0, i)) == CLOBBER) break; /* Past last SET */ - + if (operands) operands[i] = SET_DEST (XVECEXP (body, 0, i)); if (operand_locs) @@ -1529,7 +1529,7 @@ adj_offsettable_operand (op, offset) { register enum rtx_code code = GET_CODE (op); - if (code == MEM) + if (code == MEM) { register rtx y = XEXP (op, 0); register rtx new; diff --git a/gnu/usr.bin/cc/cc_int/reg-stack.c b/gnu/usr.bin/cc/cc_int/reg-stack.c index df45dd4980af..900b4137faeb 100644 --- a/gnu/usr.bin/cc/cc_int/reg-stack.c +++ b/gnu/usr.bin/cc/cc_int/reg-stack.c @@ -765,7 +765,7 @@ record_asm_reg_life (insn, regstack, operands, constraints, int *operand_matches = (int *) alloca (n_operands * sizeof (int *)); - enum reg_class *operand_class + enum reg_class *operand_class = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *)); int reg_used_as_output[FIRST_PSEUDO_REGISTER]; @@ -1257,7 +1257,7 @@ find_blocks (first) && SET_DEST (pat) == pc_rtx && uses_reg_or_mem (SET_SRC (pat))) computed_jump = 1; - + if (computed_jump) { for (x = label_value_list; x; x = XEXP (x, 1)) @@ -2243,7 +2243,7 @@ subst_asm_stack_regs (insn, regstack, operands, operands_loc, constraints, rtx body = PATTERN (insn); int *operand_matches = (int *) alloca (n_operands * sizeof (int *)); - enum reg_class *operand_class + enum reg_class *operand_class = (enum reg_class *) alloca (n_operands * sizeof (enum reg_class *)); rtx *note_reg; /* Array of note contents */ diff --git a/gnu/usr.bin/cc/cc_int/regclass.c b/gnu/usr.bin/cc/cc_int/regclass.c index d4636d583741..33097aa4a6d3 100644 --- a/gnu/usr.bin/cc/cc_int/regclass.c +++ b/gnu/usr.bin/cc/cc_int/regclass.c @@ -83,7 +83,7 @@ HARD_REG_SET call_used_reg_set; /* Data for initializing the above. */ static char initial_call_used_regs[] = CALL_USED_REGISTERS; - + /* Indexed by hard register number, contains 1 for registers that are fixed use -- i.e. in fixed_regs -- or a function value return register or STRUCT_VALUE_REGNUM or STATIC_CHAIN_REGNUM. These are the @@ -106,7 +106,7 @@ int n_non_fixed_regs; and are also considered fixed. */ char global_regs[FIRST_PSEUDO_REGISTER]; - + /* Table of register numbers in the order in which to try to use them. */ #ifdef REG_ALLOC_ORDER int reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER; @@ -123,7 +123,7 @@ HARD_REG_SET reg_class_contents[N_REG_CLASSES]; #define N_REG_INTS \ ((FIRST_PSEUDO_REGISTER + (HOST_BITS_PER_INT - 1)) / HOST_BITS_PER_INT) -static unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS] +static unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS] = REG_CLASS_CONTENTS; /* For each reg class, number of regs it contains. */ @@ -567,7 +567,7 @@ static char *prefclass; It might appear to be more general to have a bitmask of classes here, but since it is recommended that there be a class corresponding to the - union of most major pair of classes, that generality is not required. + union of most major pair of classes, that generality is not required. This is available after `regclass' is run. */ @@ -584,7 +584,7 @@ static int loop_cost; static void record_reg_classes PROTO((int, int, rtx *, enum machine_mode *, char **, rtx)); -static int copy_cost PROTO((rtx, enum machine_mode, +static int copy_cost PROTO((rtx, enum machine_mode, enum reg_class, int)); static void record_address_regs PROTO((rtx, enum reg_class, int)); static auto_inc_dec_reg_p PROTO((rtx, enum machine_mode)); @@ -777,7 +777,7 @@ regclass (f, nregs) BASE_REG_CLASS, loop_cost * 2); continue; } - + /* Improve handling of two-address insns such as (set X (ashift CONST Y)) where CONST must be made to match X. Change it into two insns: (set X CONST) @@ -848,7 +848,7 @@ regclass (f, nregs) Then handle any address registers. Finally record the desired classes for any pseudos, doing it twice if some pair of operands are commutative. */ - + for (i = 0; i < noperands; i++) { op_costs[i] = init_cost; @@ -867,7 +867,7 @@ regclass (f, nregs) /* Check for commutative in a separate loop so everything will have been initialized. We must do this even if one operand is a constant--see addsi3 in m68k.md. */ - + for (i = 0; i < noperands - 1; i++) if (constraints[i][0] == '%') { @@ -911,7 +911,7 @@ regclass (f, nregs) and find which class is preferred. Store that in `prefclass[REGNO]'. Record in `altclass[REGNO]' the largest register class any of whose registers is better than memory. */ - + if (pass == 0) { prefclass = (char *) oballoc (nregs); @@ -964,7 +964,7 @@ regclass (f, nregs) #endif ) alt = reg_class_subunion[(int) alt][class]; - + /* If we don't add any classes, nothing to try. */ if (alt == best) alt = (int) NO_REGS; @@ -996,7 +996,7 @@ regclass (f, nregs) This procedure works alternative by alternative. For each alternative we assume that we will be able to allocate all pseudos to their ideal register class and calculate the cost of using that alternative. Then - we compute for each operand that is a pseudo-register, the cost of + we compute for each operand that is a pseudo-register, the cost of having the pseudo allocated to each register class and using it in that alternative. To this cost is added the cost of the alternative. @@ -1041,7 +1041,7 @@ record_reg_classes (n_alts, n_ops, ops, modes, constraints, insn) int win = 0; char c; - /* If this operand has no constraints at all, we can conclude + /* If this operand has no constraints at all, we can conclude nothing about it since anything is valid. */ if (*p == 0) @@ -1082,7 +1082,7 @@ record_reg_classes (n_alts, n_ops, ops, modes, constraints, insn) || REGNO (ops[j]) < FIRST_PSEUDO_REGISTER) { /* This op is a pseudo but the one it matches is not. */ - + /* If we can't put the other operand into a register, this alternative can't be used. */ @@ -1375,7 +1375,7 @@ copy_cost (x, mode, class, to_p) class = PREFERRED_RELOAD_CLASS (x, class); #ifdef HAVE_SECONDARY_RELOADS - /* If we need a secondary reload (we assume here that we are using + /* If we need a secondary reload (we assume here that we are using the secondary reload as an intermediate, not a scratch register), the cost is that to load the input into the intermediate register, then to copy them. We use a special value of TO_P to avoid recursion. */ @@ -1470,7 +1470,7 @@ record_address_regs (x, class, scale) /* If index and base registers are the same on this machine, just record registers in any non-constant operands. We assume here, - as well as in the tests below, that all addresses are in + as well as in the tests below, that all addresses are in canonical form. */ else if (INDEX_REG_CLASS == BASE_REG_CLASS) @@ -1492,7 +1492,7 @@ record_address_regs (x, class, scale) else if (code1 == SYMBOL_REF || code1 == CONST || code1 == LABEL_REF) record_address_regs (arg0, INDEX_REG_CLASS, scale); - /* If this the sum of two registers where the first is known to be a + /* If this the sum of two registers where the first is known to be a pointer, it must be a base register with the second an index. */ else if (code0 == REG && code1 == REG @@ -1573,7 +1573,7 @@ record_address_regs (x, class, scale) /* Return 1 if REG is valid as an auto-increment memory reference to an object of MODE. */ -static +static auto_inc_dec_reg_p (reg, mode) rtx reg; enum machine_mode mode; @@ -1753,7 +1753,7 @@ reg_scan_mark_refs (x, insn, note_flag) Likewise if it is setting the destination from an address or from a value equivalent to an address or to the sum of an address and something else. - + But don't do any of this if the pseudo corresponds to a user variable since it should have already been set as a pointer based on the type. */ diff --git a/gnu/usr.bin/cc/cc_int/reload.c b/gnu/usr.bin/cc/cc_int/reload.c index aed06e44ddfc..92a617b96655 100644 --- a/gnu/usr.bin/cc/cc_int/reload.c +++ b/gnu/usr.bin/cc/cc_int/reload.c @@ -225,9 +225,9 @@ static int n_memlocs; #ifdef SECONDARY_MEMORY_NEEDED /* Save MEMs needed to copy from one class of registers to another. One MEM - is used per mode, but normally only one or two modes are ever used. + is used per mode, but normally only one or two modes are ever used. - We keep two versions, before and after register elimination. The one + We keep two versions, before and after register elimination. The one after register elimination is record separately for each operand. This is done in case the address is not valid to be sure that we separately reload each. */ @@ -398,7 +398,7 @@ push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode, if (icode != CODE_FOR_nothing) { - /* If IN_P is non-zero, the reload register will be the output in + /* If IN_P is non-zero, the reload register will be the output in operand 0. If IN_P is zero, the reload register will be the input in operand 1. Outputs should have an initial "=", which we must skip. */ @@ -565,7 +565,7 @@ push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode, reload_when_needed[s_reload] = secondary_type; reload_secondary_in_reload[s_reload] = in_p ? t_reload : -1; reload_secondary_out_reload[s_reload] = ! in_p ? t_reload : -1; - reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing; + reload_secondary_in_icode[s_reload] = in_p ? t_icode : CODE_FOR_nothing; reload_secondary_out_icode[s_reload] = ! in_p ? t_icode : CODE_FOR_nothing; reload_secondary_p[s_reload] = 1; @@ -593,7 +593,7 @@ push_secondary_reload (in_p, x, opnum, optional, reload_class, reload_mode, #ifdef SECONDARY_MEMORY_NEEDED -/* Return a memory location that will be used to copy X in mode MODE. +/* Return a memory location that will be used to copy X in mode MODE. If we haven't already made a location for this mode in this insn, call find_reloads_address on the location being returned. */ @@ -623,7 +623,7 @@ get_secondary_mem (x, mode, opnum, type) if (secondary_memlocs_elim[(int) mode][opnum] != 0) return secondary_memlocs_elim[(int) mode][opnum]; - /* If this is the first time we've tried to get a MEM for this mode, + /* If this is the first time we've tried to get a MEM for this mode, allocate a new one. `something_changed' in reload will get set by noticing that the frame size has changed. */ @@ -735,7 +735,7 @@ push_reload (in, out, inloc, outloc, class, if (outmode == VOIDmode && out != 0) outmode = GET_MODE (out); - /* If IN is a pseudo register everywhere-equivalent to a constant, and + /* If IN is a pseudo register everywhere-equivalent to a constant, and it is not in a hard register, reload straight from the constant, since we want to get rid of such pseudo registers. Often this is done earlier, but not always in find_reloads_address. */ @@ -934,7 +934,7 @@ push_reload (in, out, inloc, outloc, class, { out_subreg_loc = outloc; outloc = &SUBREG_REG (out); - out = *outloc; + out = *outloc; #ifndef LOAD_EXTEND_OP if (GET_CODE (out) == MEM && GET_MODE_SIZE (GET_MODE (out)) > GET_MODE_SIZE (outmode)) @@ -1035,7 +1035,7 @@ push_reload (in, out, inloc, outloc, class, /* We can use an existing reload if the class is right and at least one of IN and OUT is a match and the other is at worst neutral. - (A zero compared against anything is neutral.) + (A zero compared against anything is neutral.) If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are for the same thing since that can cause us to need more reload registers @@ -1778,7 +1778,7 @@ operands_match_p (x, y) register RTX_CODE code = GET_CODE (x); register char *fmt; int success_2; - + if (x == y) return 1; if ((code == REG || (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG)) @@ -1837,7 +1837,7 @@ operands_match_p (x, y) slow: - /* Now we have disposed of all the cases + /* Now we have disposed of all the cases in which different rtx codes can match. */ if (code != GET_CODE (y)) return 0; @@ -1908,11 +1908,11 @@ n_occurrences (c, s) } /* Describe the range of registers or memory referenced by X. - If X is a register, set REG_FLAG and put the first register + If X is a register, set REG_FLAG and put the first register number into START and the last plus one into END. - If X is a memory reference, put a base address into BASE + If X is a memory reference, put a base address into BASE and a range of integer offsets into START and END. - If X is pushing on the stack, we can assume it causes no trouble, + If X is pushing on the stack, we can assume it causes no trouble, so we set the SAFE field. */ static struct decomposition @@ -1962,7 +1962,7 @@ decompose (x) { base = addr; offset = const0_rtx; - } + } if (GET_CODE (offset) == CONST) offset = XEXP (offset, 0); if (GET_CODE (offset) == PLUS) @@ -2003,7 +2003,7 @@ decompose (x) else if (GET_CODE (x) == REG) { val.reg_flag = 1; - val.start = true_regnum (x); + val.start = true_regnum (x); if (val.start < 0) { /* A pseudo with no hard reg. */ @@ -2020,7 +2020,7 @@ decompose (x) /* This could be more precise, but it's good enough. */ return decompose (SUBREG_REG (x)); val.reg_flag = 1; - val.start = true_regnum (x); + val.start = true_regnum (x); if (val.start < 0) return decompose (SUBREG_REG (x)); else @@ -2192,7 +2192,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) if (reg_set_p (cc0_rtx, PATTERN (insn))) no_output_reloads = 1; #endif - + #ifdef SECONDARY_MEMORY_NEEDED /* The eliminated forms of any secondary memory locations are per-insn, so clear them out here. */ @@ -2306,7 +2306,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) modified[i] = RELOAD_READ; - /* Scan this operand's constraint to see if it is an output operand, + /* Scan this operand's constraint to see if it is an output operand, an in-out operand, is commutative, or should match another. */ while (c = *p++) @@ -2373,7 +2373,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) and reload parts of the addresses into index registers. Also here any references to pseudo regs that didn't get hard regs but are equivalent to constants get replaced in the insn itself - with those constants. Nobody will ever see them again. + with those constants. Nobody will ever see them again. Finally, set up the preferred classes of each operand. */ @@ -2451,7 +2451,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) address = copy_rtx (address); /* If this is an output operand, we must output a CLOBBER - after INSN so find_equiv_reg knows REGNO is being written. + after INSN so find_equiv_reg knows REGNO is being written. Mark this insn specially, do we can put our output reloads after it. */ @@ -2526,7 +2526,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) /* REJECT is a count of how undesirable this alternative says it is if any reloading is required. If the alternative matches exactly then REJECT is ignored, but otherwise it gets this much - counted against it in addition to the reloading needed. Each + counted against it in addition to the reloading needed. Each ? counts three times here since we want the disparaging caused by a bad register class to only count 1/3 as much. */ int reject = 0; @@ -2578,7 +2578,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) made assumptions about the behavior of the machine in such register access. If the data is, in fact, in memory we must always load using the size assumed to be in the - register and let the insn do the different-sized + register and let the insn do the different-sized accesses. */ || ((GET_CODE (operand) == MEM || (GET_CODE (operand)== REG @@ -2891,8 +2891,8 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) /* A SCRATCH is not a valid operand. */ && GET_CODE (operand) != SCRATCH #ifdef LEGITIMATE_PIC_OPERAND_P - && (! CONSTANT_P (operand) - || ! flag_pic + && (! CONSTANT_P (operand) + || ! flag_pic || LEGITIMATE_PIC_OPERAND_P (operand)) #endif && (GENERAL_REGS == ALL_REGS @@ -2917,11 +2917,11 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) win = 1; break; #endif - + default: this_alternative[i] = (int) reg_class_subunion[this_alternative[i]][(int) REG_CLASS_FROM_LETTER (c)]; - + reg: if (GET_MODE (operand) == BLKmode) break; @@ -2973,7 +2973,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) reload. This is consistent with other code and is required to avoid chosing another alternative when the constant is moved into memory by this function on - an early reload pass. Note that the test here is + an early reload pass. Note that the test here is precisely the same as in the code below that calls force_const_mem. */ if (CONSTANT_P (operand) @@ -3004,7 +3004,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) /* We prefer to reload pseudos over reloading other things, since such reloads may be able to be eliminated later. If we are reloading a SCRATCH, we won't be generating any - insns, just using a register, so it is also preferred. + insns, just using a register, so it is also preferred. So bump REJECT in other cases. Don't do this in the case where we are forcing a constant into memory and it will then win since we don't want to have a different @@ -3016,7 +3016,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) reject++; } - /* If this operand is a pseudo register that didn't get a hard + /* If this operand is a pseudo register that didn't get a hard reg and this alternative accepts some register, see if the class that we want is a subset of the preferred class for this register. If not, but it intersects that class, use the @@ -3047,7 +3047,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) { /* Since we don't have a way of forming the intersection, we just do something special if the preferred class - is a subset of the class we have; that's the most + is a subset of the class we have; that's the most common case anyway. */ if (reg_class_subset_p (preferred_class[i], this_alternative[i])) @@ -3066,7 +3066,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) if (this_alternative_earlyclobber[i] && this_alternative_win[i]) { - struct decomposition early_data; + struct decomposition early_data; early_data = decompose (recog_operand[i]); @@ -3079,7 +3079,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) abort (); continue; } - + if (this_alternative[i] == NO_REGS) { this_alternative_earlyclobber[i] = 0; @@ -3301,9 +3301,9 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) One special case that is worth checking is when we have an output that is earlyclobber but isn't used past the insn (typically - a SCRATCH). In this case, we only need have the reload live + a SCRATCH). In this case, we only need have the reload live through the insn itself, but not for any of our input or output - reloads. + reloads. In any case, anything needed to address this operand can remain however they were previously categorized. */ @@ -3439,7 +3439,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) && goal_alternative_matches[i] < 0 && optimize) { - /* For each non-matching operand that's a MEM or a pseudo-register + /* For each non-matching operand that's a MEM or a pseudo-register that didn't get a hard register, make an optional reload. This may get done even if the insn needs no reloads otherwise. */ @@ -3502,7 +3502,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) operand_mode[i], 0, 1, goal_alternative_matches[i], RELOAD_OTHER); } - + /* If this insn pattern contains any MATCH_DUP's, make sure that they will be substituted if the operands they match are substituted. Also do now any substitutions we already did on the operands. @@ -3584,7 +3584,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) } } - /* Scan all the reloads and update their type. + /* Scan all the reloads and update their type. If a reload is for the address of an operand and we didn't reload that operand, change the type. Similarly, change the operand number of a reload when two operands match. If a reload is optional, treat it @@ -3620,13 +3620,13 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) { int secondary_in_reload = reload_secondary_in_reload[i]; - reload_when_needed[secondary_in_reload] = + reload_when_needed[secondary_in_reload] = RELOAD_FOR_OPADDR_ADDR; /* If there's a tertiary reload we have to change it also. */ if (secondary_in_reload > 0 && reload_secondary_in_reload[secondary_in_reload] != -1) - reload_when_needed[reload_secondary_in_reload[secondary_in_reload]] + reload_when_needed[reload_secondary_in_reload[secondary_in_reload]] = RELOAD_FOR_OPADDR_ADDR; } @@ -3635,13 +3635,13 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) { int secondary_out_reload = reload_secondary_out_reload[i]; - reload_when_needed[secondary_out_reload] = + reload_when_needed[secondary_out_reload] = RELOAD_FOR_OPADDR_ADDR; /* If there's a tertiary reload we have to change it also. */ if (secondary_out_reload && reload_secondary_out_reload[secondary_out_reload] != -1) - reload_when_needed[reload_secondary_out_reload[secondary_out_reload]] + reload_when_needed[reload_secondary_out_reload[secondary_out_reload]] = RELOAD_FOR_OPADDR_ADDR; } reload_when_needed[i] = RELOAD_FOR_OPERAND_ADDRESS; @@ -3649,7 +3649,7 @@ find_reloads (insn, replace, ind_levels, live_known, reload_reg_p) if (reload_when_needed[i] == RELOAD_FOR_INPUT_ADDRESS && operand_reloadnum[reload_opnum[i]] >= 0 - && (reload_when_needed[operand_reloadnum[reload_opnum[i]]] + && (reload_when_needed[operand_reloadnum[reload_opnum[i]]] == RELOAD_OTHER)) reload_when_needed[i] = RELOAD_FOR_OTHER_ADDRESS; @@ -3875,7 +3875,7 @@ find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest) if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG) { - /* Check for SUBREG containing a REG that's equivalent to a constant. + /* Check for SUBREG containing a REG that's equivalent to a constant. If the constant has a known value, truncate it right now. Similarly if we are extracting a single-word of a multi-word constant. If the constant is symbolic, allow it to be substituted @@ -3927,7 +3927,7 @@ find_reloads_toplev (x, opnum, type, ind_levels, is_set_dest) #endif && (reg_equiv_address[regno] != 0 || (reg_equiv_mem[regno] != 0 - && (! strict_memory_address_p (GET_MODE (x), + && (! strict_memory_address_p (GET_MODE (x), XEXP (reg_equiv_mem[regno], 0)) || ! offsettable_memref_p (reg_equiv_mem[regno]))))) { @@ -4194,7 +4194,7 @@ find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels) /* If we have an indexed stack slot, there are three possible reasons why it might be invalid: The index might need to be reloaded, the address might have been made by frame pointer elimination and hence have a - constant out of range, or both reasons might apply. + constant out of range, or both reasons might apply. We can easily check for an index needing reload, but even if that is the case, we might also have an invalid constant. To avoid making the @@ -4242,7 +4242,7 @@ find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels) return 1; } - + else if (GET_CODE (ad) == PLUS && GET_CODE (XEXP (ad, 1)) == CONST_INT && GET_CODE (XEXP (ad, 0)) == PLUS && (XEXP (XEXP (ad, 0), 1) == frame_pointer_rtx @@ -4265,7 +4265,7 @@ find_reloads_address (mode, memrefloc, ad, loc, opnum, type, ind_levels) return 1; } - + /* See if address becomes valid when an eliminable register in a sum is replaced. */ @@ -4558,7 +4558,7 @@ find_reloads_address_1 (x, context, loc, opnum, type, ind_levels) && REG_OK_FOR_BASE_P (op0)) return 0; else if (REG_OK_FOR_BASE_P (op1)) - find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type, + find_reloads_address_1 (orig_op0, 1, &XEXP (x, 0), opnum, type, ind_levels); else if (REG_OK_FOR_BASE_P (op0)) find_reloads_address_1 (orig_op1, 1, &XEXP (x, 1), opnum, type, @@ -4727,7 +4727,7 @@ find_reloads_address_1 (x, context, loc, opnum, type, ind_levels) if (reg_equiv_constant[regno] != 0) { - find_reloads_address_part (reg_equiv_constant[regno], loc, + find_reloads_address_part (reg_equiv_constant[regno], loc, (context ? INDEX_REG_CLASS : BASE_REG_CLASS), GET_MODE (x), opnum, type, ind_levels); @@ -5043,7 +5043,7 @@ refers_to_regno_for_reload_p (regno, endregno, x, loc) } return (endregno > i - && regno < i + (i < FIRST_PSEUDO_REGISTER + && regno < i + (i < FIRST_PSEUDO_REGISTER ? HARD_REGNO_NREGS (i, GET_MODE (x)) : 1)); @@ -5123,7 +5123,7 @@ refers_to_regno_for_reload_p (regno, endregno, x, loc) we check if any register number in X conflicts with the relevant register numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN contains a MEM (we don't bother checking for memory addresses that can't - conflict because we expect this to be a rare case. + conflict because we expect this to be a rare case. This function is similar to reg_overlap_mention_p in rtlanal.c except that we look at equivalences for pseudos that didn't get hard registers. */ @@ -5188,14 +5188,14 @@ refers_to_mem_for_reload_p (x) if (GET_CODE (x) == REG) return (REGNO (x) >= FIRST_PSEUDO_REGISTER && reg_equiv_memory_loc[REGNO (x)]); - + fmt = GET_RTX_FORMAT (GET_CODE (x)); for (i = GET_RTX_LENGTH (GET_CODE (x)) - 1; i >= 0; i--) if (fmt[i] == 'e' && (GET_CODE (XEXP (x, i)) == MEM || refers_to_mem_for_reload_p (XEXP (x, i)))) return 1; - + return 0; } @@ -5281,12 +5281,12 @@ find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode) /* On some machines, certain regs must always be rejected because they don't behave the way ordinary registers do. */ - + #ifdef OVERLAPPING_REGNO_P if (regno >= 0 && regno < FIRST_PSEUDO_REGISTER && OVERLAPPING_REGNO_P (regno)) return 0; -#endif +#endif /* Scan insns back from INSN, looking for one that copies a value into or out of GOAL. @@ -5425,11 +5425,11 @@ find_equiv_reg (goal, insn, class, other, reload_reg_p, goalreg, mode) /* On some machines, certain regs must always be rejected because they don't behave the way ordinary registers do. */ - + #ifdef OVERLAPPING_REGNO_P if (OVERLAPPING_REGNO_P (valueno)) return 0; -#endif +#endif nregs = HARD_REGNO_NREGS (regno, mode); valuenregs = HARD_REGNO_NREGS (valueno, mode); @@ -5674,14 +5674,14 @@ regno_clobbered_p (regno, insn) static char *reload_when_needed_name[] = { - "RELOAD_FOR_INPUT", - "RELOAD_FOR_OUTPUT", + "RELOAD_FOR_INPUT", + "RELOAD_FOR_OUTPUT", "RELOAD_FOR_INSN", - "RELOAD_FOR_INPUT_ADDRESS", + "RELOAD_FOR_INPUT_ADDRESS", "RELOAD_FOR_OUTPUT_ADDRESS", - "RELOAD_FOR_OPERAND_ADDRESS", + "RELOAD_FOR_OPERAND_ADDRESS", "RELOAD_FOR_OPADDR_ADDR", - "RELOAD_OTHER", + "RELOAD_OTHER", "RELOAD_FOR_OTHER_ADDRESS" }; diff --git a/gnu/usr.bin/cc/cc_int/reload1.c b/gnu/usr.bin/cc/cc_int/reload1.c index 49a1811ea201..8eb4908dbb21 100644 --- a/gnu/usr.bin/cc/cc_int/reload1.c +++ b/gnu/usr.bin/cc/cc_int/reload1.c @@ -914,10 +914,10 @@ reload (first, global, dumpfile) rtx old_notes = REG_NOTES (insn); int did_elimination = 0; - /* To compute the number of reload registers of each class + /* To compute the number of reload registers of each class needed for an insn, we must similate what choose_reload_regs can do. We do this by splitting an insn into an "input" and - an "output" part. RELOAD_OTHER reloads are used in both. + an "output" part. RELOAD_OTHER reloads are used in both. The input part uses those reloads, RELOAD_FOR_INPUT reloads, which must be live over the entire input section of reloads, and the maximum of all the RELOAD_FOR_INPUT_ADDRESS and @@ -1279,10 +1279,10 @@ reload (first, global, dumpfile) break; } - caller_save_needs + caller_save_needs = (caller_save_group_size > 1 ? insn_needs.other.groups - : insn_needs.other.regs[nongroup_need]); + : insn_needs.other.regs[nongroup_need]); if (caller_save_needs[(int) caller_save_spill_class] == 0) { @@ -1428,7 +1428,7 @@ reload (first, global, dumpfile) mode_name[(int) group_mode[i]], reg_class_names[i], INSN_UID (max_groups_insn[i])); } - + /* If we have caller-saves, set up the save areas and see if caller-save will need a spill register. */ @@ -1542,8 +1542,8 @@ reload (first, global, dumpfile) were in a block that didn't need any spill registers of a conflicting class. We used to try to mark off the need for those registers, but doing so properly is very complex and reallocating them is the - simpler approach. First, "pack" potential_reload_regs by pushing - any nonnegative entries towards the end. That will leave room + simpler approach. First, "pack" potential_reload_regs by pushing + any nonnegative entries towards the end. That will leave room for the registers we already spilled. Also, undo the marking of the spill registers from the last time @@ -2766,7 +2766,7 @@ eliminate_regs (x, mem_mode, insn) return x; case MULT: - /* If this is the product of an eliminable register and a + /* If this is the product of an eliminable register and a constant, apply the distribute law and move the constant out so that we have (plus (mult ..) ..). This is needed in order to keep load-address insns valid. This case is pathalogical. @@ -3254,7 +3254,7 @@ eliminate_regs_in_insn (insn, replace) old_asm_operands_vec = 0; /* Replace the body of this insn with a substituted form. If we changed - something, return non-zero. + something, return non-zero. If we are replacing a body that was a (set X (plus Y Z)), try to re-recognize the insn. We do this in case we had a simple addition @@ -3505,7 +3505,7 @@ spill_hard_reg (regno, global, dumpfile, cant_eliminate) return something_changed; } -/* Find all paradoxical subregs within X and update reg_max_ref_width. +/* Find all paradoxical subregs within X and update reg_max_ref_width. Also mark any hard registers used to store user variables as forbidden from being used for spill registers. */ @@ -3866,7 +3866,7 @@ reload_as_needed (first, live_known) choose_reload_regs (insn, avoid_return_reg); #ifdef SMALL_REGISTER_CLASSES - /* Merge any reloads that we didn't combine for fear of + /* Merge any reloads that we didn't combine for fear of increasing the number of spill registers needed but now discover can be safely merged. */ merge_assigned_reloads (insn); @@ -4398,7 +4398,7 @@ reload_reg_free_before_p (regno, opnum, type) return (! TEST_HARD_REG_BIT (reload_reg_used_in_other_addr, regno) && ! TEST_HARD_REG_BIT (reload_reg_used_in_insn, regno) && ! TEST_HARD_REG_BIT (reload_reg_used_in_op_addr, regno)); - + case RELOAD_FOR_OUTPUT: /* This can't be used in the output address for this operand and anything that can't be used for it, except that we've already @@ -4479,7 +4479,7 @@ reload_reg_reaches_end_p (regno, opnum, type) return 1; /* If this use is for part of the insn, - its value reaches if no subsequent part uses the same register. + its value reaches if no subsequent part uses the same register. Just like the above function, don't try to do this with lots of fallthroughs. */ @@ -4525,7 +4525,7 @@ reload_reg_reaches_end_p (regno, opnum, type) case RELOAD_FOR_INPUT: /* Similar to input address, except we start at the next operand for - both input and input address and we do not check for + both input and input address and we do not check for RELOAD_FOR_OPERAND_ADDRESS and RELOAD_FOR_INSN since these would conflict. */ @@ -4592,7 +4592,7 @@ reloads_conflict (r1, r2) int r2_opnum = reload_opnum[r2]; /* RELOAD_OTHER conflicts with everything except RELOAD_FOR_OTHER_ADDRESS. */ - + if (r2_type == RELOAD_OTHER && r1_type != RELOAD_FOR_OTHER_ADDRESS) return 1; @@ -4601,7 +4601,7 @@ reloads_conflict (r1, r2) switch (r1_type) { case RELOAD_FOR_INPUT: - return (r2_type == RELOAD_FOR_INSN + return (r2_type == RELOAD_FOR_INSN || r2_type == RELOAD_FOR_OPERAND_ADDRESS || r2_type == RELOAD_FOR_OPADDR_ADDR || r2_type == RELOAD_FOR_INPUT @@ -4620,7 +4620,7 @@ reloads_conflict (r1, r2) || r2_type == RELOAD_FOR_OPERAND_ADDRESS); case RELOAD_FOR_OPADDR_ADDR: - return (r2_type == RELOAD_FOR_INPUT + return (r2_type == RELOAD_FOR_INPUT || r2_type == RELOAD_FOR_OPADDR_ADDR); case RELOAD_FOR_OUTPUT: @@ -4726,7 +4726,7 @@ allocate_reload_reg (r, insn, last_reload, noerror) of leapfrogging each other. Don't do this, however, when we have group needs and failure would be fatal; if we only have a relatively small number of spill registers, and more than one of them has - group needs, then by starting in the middle, we may end up + group needs, then by starting in the middle, we may end up allocating the first one in such a way that we are not left with sufficient groups to handle the rest. */ @@ -4734,7 +4734,7 @@ allocate_reload_reg (r, insn, last_reload, noerror) i = last_spill_reg; else i = -1; - + for (count = 0; count < n_spills; count++) { int class = (int) reload_reg_class[r]; @@ -4811,7 +4811,7 @@ allocate_reload_reg (r, insn, last_reload, noerror) if (new == 0 || GET_MODE (new) != reload_mode[r]) spill_reg_rtx[i] = new = gen_rtx (REG, reload_mode[r], spill_regs[i]); - + regno = true_regnum (new); /* Detect when the reload reg can't hold the reload mode. @@ -5525,7 +5525,7 @@ choose_reload_regs (insn, avoid_return_reg) /* If SMALL_REGISTER_CLASSES are defined, we may not have merged two reloads of the same item for fear that we might not have enough reload registers. However, normally they will get the same reload register - and hence actually need not be loaded twice. + and hence actually need not be loaded twice. Here we check for the most common case of this phenomenon: when we have a number of reloads for the same object, each of which were allocated @@ -5608,7 +5608,7 @@ merge_assigned_reloads (insn) ? RELOAD_FOR_OTHER_ADDRESS : RELOAD_OTHER; } } -} +} #endif /* SMALL_RELOAD_CLASSES */ /* Output insns to reload values in and out of the chosen reload regs. */ @@ -6001,7 +6001,7 @@ emit_reload_insns (insn) to see if it is being used as a scratch or intermediate register and generate code appropriately. If we need a scratch register, use REAL_OLDEQUIV since the form of - the insn may depend on the actual address if it is + the insn may depend on the actual address if it is a MEM. */ if (second_reload_reg) @@ -6520,7 +6520,7 @@ emit_reload_insns (insn) reg_last_reload_reg[nregno] = reload_reg_rtx[r]; /* If NREGNO is a hard register, it may occupy more than - one register. If it does, say what is in the + one register. If it does, say what is in the rest of the registers assuming that both registers agree on how many words the object takes. If not, invalidate the subsequent registers. */ @@ -6612,7 +6612,7 @@ emit_reload_insns (insn) /* Emit code to perform a reload from IN (which may be a reload register) to OUT (which may also be a reload register). IN or OUT is from operand - OPNUM with reload type TYPE. + OPNUM with reload type TYPE. Returns first insn emitted. */ @@ -6938,7 +6938,7 @@ inc_for_reload (reloadreg, value, inc_amount) add_insn = emit_insn (gen_rtx (SET, VOIDmode, incloc, gen_rtx (PLUS, GET_MODE (incloc), incloc, inc))); - + code = recog_memoized (add_insn); if (code >= 0) { diff --git a/gnu/usr.bin/cc/cc_int/reorg.c b/gnu/usr.bin/cc/cc_int/reorg.c index c90c055724c6..d977404afa22 100644 --- a/gnu/usr.bin/cc/cc_int/reorg.c +++ b/gnu/usr.bin/cc/cc_int/reorg.c @@ -54,7 +54,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ is taken. The HP-PA always has a branch delay slot. For unconditional branches - its effects can be annulled when the branch is taken. The effects + its effects can be annulled when the branch is taken. The effects of the delay slot in a conditional branch can be nullified for forward taken branches, or for untaken backward branches. This means we can hoist insns from the fall-through path for forward branches or @@ -335,7 +335,7 @@ mark_referenced_resources (x, res, include_delayed_effects) We can not just fall through here since then we would be confused by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate traditional asms unlike their normal usage. */ - + for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++) mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0); return; @@ -576,7 +576,7 @@ mark_set_resources (x, res, in_dest, include_delayed_effects) case CLOBBER: mark_set_resources (XEXP (x, 0), res, 1, 0); return; - + case SEQUENCE: for (i = 0; i < XVECLEN (x, 0); i++) if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0)) @@ -773,7 +773,7 @@ find_end_label () || GET_CODE (PATTERN (insn)) == CLOBBER))) insn = PREV_INSN (insn); - /* When a target threads its epilogue we might already have a + /* When a target threads its epilogue we might already have a suitable return insn. If so put a label before it for the end_of_function_label. */ if (GET_CODE (insn) == BARRIER @@ -852,7 +852,7 @@ emit_delay_sequence (insn, list, length, avail) rtx delay_insn = copy_rtx (insn); /* If INSN is followed by a BARRIER, delete the BARRIER since it will only - confuse further processing. Update LAST in case it was the last insn. + confuse further processing. Update LAST in case it was the last insn. We will put the BARRIER back in later. */ if (NEXT_INSN (insn) && GET_CODE (NEXT_INSN (insn)) == BARRIER) { @@ -914,7 +914,7 @@ emit_delay_sequence (insn, list, length, avail) if (NEXT_INSN (seq_insn) && GET_CODE (NEXT_INSN (seq_insn)) == INSN && GET_CODE (PATTERN (NEXT_INSN (seq_insn))) == SEQUENCE) PREV_INSN (XVECEXP (PATTERN (NEXT_INSN (seq_insn)), 0, 0)) = seq_insn; - + /* If there used to be a BARRIER, put it back. */ if (had_barrier) emit_barrier_after (seq_insn); @@ -940,7 +940,7 @@ add_to_delay_list (insn, delay_list) if (delay_list == 0) { struct target_info *tinfo; - + for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME]; tinfo; tinfo = tinfo->next) if (tinfo->uid == INSN_UID (insn)) @@ -957,7 +957,7 @@ add_to_delay_list (insn, delay_list) XEXP (delay_list, 1) = add_to_delay_list (insn, XEXP (delay_list, 1)); return delay_list; -} +} /* Delete INSN from the the delay slot of the insn that it is in. This may produce an insn without anything in its delay slots. */ @@ -1215,15 +1215,15 @@ get_jump_flags (insn, label) && INSN_UID (insn) <= max_uid && label != 0 && INSN_UID (label) <= max_uid) - flags + flags = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)]) ? ATTR_FLAG_forward : ATTR_FLAG_backward; /* No valid direction information. */ else flags = 0; - + /* If insn is a conditional branch call mostly_true_jump to get - determine the branch prediction. + determine the branch prediction. Non conditional branches are predicted as very likely taken. */ if (GET_CODE (insn) == JUMP_INSN @@ -1281,7 +1281,7 @@ rare_destination (insn) case CODE_LABEL: return 0; case BARRIER: - /* A BARRIER can either be after a JUMP_INSN or a CALL_INSN. We + /* A BARRIER can either be after a JUMP_INSN or a CALL_INSN. We don't scan past JUMP_INSNs, so any barrier we find here must have been after a CALL_INSN and hence mean the call doesn't return. */ @@ -1333,7 +1333,7 @@ mostly_true_jump (jump_insn, condition) { /* If this is the test of a loop, it is very likely true. We scan backwards from the target label. If we find a NOTE_INSN_LOOP_BEG - before the next real insn, we assume the branch is to the top of + before the next real insn, we assume the branch is to the top of the loop. */ for (insn = PREV_INSN (target_label); insn && GET_CODE (insn) == NOTE; @@ -1369,7 +1369,7 @@ mostly_true_jump (jump_insn, condition) return 2; } - /* If we couldn't figure out what this jump was, assume it won't be + /* If we couldn't figure out what this jump was, assume it won't be taken. This should be rare. */ if (condition == 0) return 0; @@ -1419,7 +1419,7 @@ get_branch_condition (insn, target) { rtx pat = PATTERN (insn); rtx src; - + if (condjump_in_parallel_p (insn)) pat = XVECEXP (pat, 0, 0); @@ -1665,13 +1665,13 @@ steal_delay_list_from_target (insn, condition, seq, delay_list, return delay_list; } -/* Similar to steal_delay_list_from_target except that SEQ is on the +/* Similar to steal_delay_list_from_target except that SEQ is on the fallthrough path of INSN. Here we only do something if the delay insn of SEQ is an unconditional branch. In that case we steal its delay slot for INSN since unconditional branches are much easier to fill. */ static rtx -steal_delay_list_from_fallthrough (insn, condition, seq, +steal_delay_list_from_fallthrough (insn, condition, seq, delay_list, sets, needed, other_needed, slots_to_fill, pslots_filled, pannul_p) rtx insn, condition; @@ -1956,17 +1956,17 @@ redundant_insn_p (insn, target, delay_list) return 0; /* Stop for an INSN or JUMP_INSN with delayed effects and its delay - slots because it is difficult to track its resource needs + slots because it is difficult to track its resource needs correctly. */ #ifdef INSN_SETS_ARE_DELAYED if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0))) - return 0; + return 0; #endif #ifdef INSN_REFERENCES_ARE_DELAYED if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0))) - return 0; + return 0; #endif /* See if any of the insns in the delay slot match, updating @@ -2058,12 +2058,12 @@ redundant_insn_p (insn, target, delay_list) #ifdef INSN_SETS_ARE_DELAYED if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0))) - return 0; + return 0; #endif #ifdef INSN_REFERENCES_ARE_DELAYED if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0))) - return 0; + return 0; #endif /* See if any of the insns in the delay slot match, updating @@ -2092,7 +2092,7 @@ redundant_insn_p (insn, target, delay_list) } - /* If the insn requiring the delay slot conflicts with INSN, we + /* If the insn requiring the delay slot conflicts with INSN, we must stop. */ if (insn_sets_resource_p (XVECEXP (pat, 0, 0), &needed, 1)) return 0; @@ -2210,7 +2210,7 @@ update_block (insn, where) { int b; - /* Ignore if this was in a delay slot and it came from the target of + /* Ignore if this was in a delay slot and it came from the target of a branch. */ if (INSN_FROM_TARGET_P (insn)) return; @@ -2466,7 +2466,7 @@ mark_target_live_regs (target, res) } else { - /* Allocate a place to put our results and chain it into the + /* Allocate a place to put our results and chain it into the hash table. */ tinfo = (struct target_info *) oballoc (sizeof (struct target_info)); tinfo->uid = INSN_UID (target); @@ -2593,7 +2593,7 @@ mark_target_live_regs (target, res) = (first_regno + HARD_REGNO_NREGS (first_regno, GET_MODE (XEXP (link, 0)))); - + for (i = first_regno; i < last_regno; i++) SET_HARD_REG_BIT (pending_dead_regs, i); } @@ -2612,7 +2612,7 @@ mark_target_live_regs (target, res) = (first_regno + HARD_REGNO_NREGS (first_regno, GET_MODE (XEXP (link, 0)))); - + for (i = first_regno; i < last_regno; i++) CLEAR_HARD_REG_BIT (current_live_regs, i); } @@ -2795,7 +2795,7 @@ fill_simple_delay_slots (first, non_jumps_p) || (GET_CODE (insn) == JUMP_INSN && non_jumps_p) || (GET_CODE (insn) != JUMP_INSN && ! non_jumps_p)) continue; - + if (GET_CODE (insn) == JUMP_INSN) flags = get_jump_flags (insn, JUMP_LABEL (insn)); else @@ -2819,7 +2819,7 @@ fill_simple_delay_slots (first, non_jumps_p) insn must exist when it is subsequently scanned. This is tried on each insn with delay slots as some machines - have insns which perform calls, but are not represented as + have insns which perform calls, but are not represented as CALL_INSNs. */ slots_filled = 0; @@ -2854,7 +2854,7 @@ fill_simple_delay_slots (first, non_jumps_p) forward in execution sequence), it must not need or set any resources that were set by later insns and must not set any resources that are needed for those insns. - + The delay slot insn itself sets resources unless it is a call (in which case the called routine, not the insn itself, is doing the setting). */ @@ -2878,7 +2878,7 @@ fill_simple_delay_slots (first, non_jumps_p) if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER) continue; - /* Check for resource conflict first, to avoid unnecessary + /* Check for resource conflict first, to avoid unnecessary splitting. */ if (! insn_references_resource_p (trial, &set, 1) && ! insn_sets_resource_p (trial, &set, 1) @@ -2921,7 +2921,7 @@ fill_simple_delay_slots (first, non_jumps_p) #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS) if (slots_filled != slots_to_fill && delay_list == 0 - && GET_CODE (insn) == JUMP_INSN + && GET_CODE (insn) == JUMP_INSN && (condjump_p (insn) || condjump_in_parallel_p (insn))) { delay_list = optimize_skip (insn); @@ -2966,7 +2966,7 @@ fill_simple_delay_slots (first, non_jumps_p) mark_referenced_resources (insn, &needed, 1); maybe_never = 1; } - else + else { mark_set_resources (insn, &set, 0, 1); mark_referenced_resources (insn, &needed, 1); @@ -2977,7 +2977,7 @@ fill_simple_delay_slots (first, non_jumps_p) target = JUMP_LABEL (insn); target_uses = LABEL_NUSES (target) - 1; } - + } for (trial = next_nonnote_insn (insn); trial; trial = next_trial) @@ -3110,7 +3110,7 @@ fill_simple_delay_slots (first, non_jumps_p) else new_label = find_end_label (); - delay_list + delay_list = add_to_delay_list (copy_rtx (next_trial), delay_list); slots_filled++; reorg_redirect_jump (trial, new_label); @@ -3135,7 +3135,7 @@ fill_simple_delay_slots (first, non_jumps_p) #ifdef DELAY_SLOTS_FOR_EPILOGUE /* See if the epilogue needs any delay slots. Try to fill them if so. - The only thing we can do is scan backwards from the end of the + The only thing we can do is scan backwards from the end of the function. If we did this in a previous pass, it is incorrect to do it again. */ if (current_function_epilogue_delay_list) @@ -3783,7 +3783,7 @@ relax_delay_slots (first) continue; } } - + /* If this is an unconditional jump and the previous insn is a conditional jump, try reversing the condition of the previous insn and swapping our targets. The next pass might be able to @@ -3851,7 +3851,7 @@ relax_delay_slots (first) if (trial == 0 && target_label != 0) trial = find_end_label (); - if (trial != target_label + if (trial != target_label && redirect_with_delay_slots_safe_p (delay_insn, trial, insn)) { reorg_redirect_jump (delay_insn, trial); @@ -3887,7 +3887,7 @@ relax_delay_slots (first) if (target_label == 0) target_label = find_end_label (); - if (redirect_with_delay_slots_safe_p (delay_insn, target_label, + if (redirect_with_delay_slots_safe_p (delay_insn, target_label, insn)) { reorg_redirect_jump (delay_insn, target_label); @@ -4032,7 +4032,7 @@ make_return_insns (first) real_return_label = get_label_before (insn); break; } - + /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it was equal to END_OF_FUNCTION_LABEL. */ LABEL_NUSES (real_return_label)++; @@ -4154,7 +4154,7 @@ dbr_schedule (first, file) flag_no_peephole = old_flag_no_peephole; #endif - /* If the current function has no insns other than the prologue and + /* If the current function has no insns other than the prologue and epilogue, then do not try to fill any delay slots. */ if (n_basic_blocks == 0) return; @@ -4173,7 +4173,7 @@ dbr_schedule (first, file) uid_to_ruid = (int *) alloca ((max_uid + 1) * sizeof (int *)); for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn)) uid_to_ruid[INSN_UID (insn)] = i; - + /* Initialize the list of insns that need filling. */ if (unfilled_firstobj == 0) { @@ -4193,12 +4193,12 @@ dbr_schedule (first, file) && (GET_CODE (PATTERN (insn)) == ADDR_VEC || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)) continue; - + if (num_delay_slots (insn) > 0) obstack_ptr_grow (&unfilled_slots_obstack, insn); /* Ensure all jumps go to the last of a set of consecutive labels. */ - if (GET_CODE (insn) == JUMP_INSN + if (GET_CODE (insn) == JUMP_INSN && (condjump_p (insn) || condjump_in_parallel_p (insn)) && JUMP_LABEL (insn) != 0 && ((target = prev_label (next_active_insn (JUMP_LABEL (insn)))) diff --git a/gnu/usr.bin/cc/cc_int/rtl.c b/gnu/usr.bin/cc/cc_int/rtl.c index 6f29f7f7005f..4131c8971bb2 100644 --- a/gnu/usr.bin/cc/cc_int/rtl.c +++ b/gnu/usr.bin/cc/cc_int/rtl.c @@ -158,7 +158,7 @@ char *rtx_format[] = { that rtx code. See rtl.def for documentation on the defined classes. */ char rtx_class[] = { -#define DEF_RTL_EXPR(ENUM, NAME, FORMAT, CLASS) CLASS, +#define DEF_RTL_EXPR(ENUM, NAME, FORMAT, CLASS) CLASS, #include "rtl.def" /* rtl expressions are defined here */ #undef DEF_RTL_EXPR }; @@ -301,7 +301,7 @@ copy_rtx (orig) copy->volatil = orig->volatil; copy->unchanging = orig->unchanging; copy->integrated = orig->integrated; - + format_ptr = GET_RTX_FORMAT (GET_CODE (copy)); for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++) @@ -387,7 +387,7 @@ copy_most_rtx (orig, may_share) copy->volatil = orig->volatil; copy->unchanging = orig->unchanging; copy->integrated = orig->integrated; - + format_ptr = GET_RTX_FORMAT (GET_CODE (copy)); for (i = 0; i < GET_RTX_LENGTH (GET_CODE (copy)); i++) @@ -490,7 +490,7 @@ read_skip_spaces (infile) c = getc (infile); if (c != '*') dump_and_abort ('*', c, infile); - + prevc = 0; while (c = getc (infile)) { @@ -643,7 +643,7 @@ read_rtx (infile) break; } /* Now process the vector. */ - + case 'E': { register struct rtx_list *next_rtx, *rtx_list_link; diff --git a/gnu/usr.bin/cc/cc_int/rtlanal.c b/gnu/usr.bin/cc/cc_int/rtlanal.c index d52bd646686f..6a45cdf08cd9 100644 --- a/gnu/usr.bin/cc/cc_int/rtlanal.c +++ b/gnu/usr.bin/cc/cc_int/rtlanal.c @@ -154,7 +154,7 @@ rtx_addr_can_trap_p (x) return 1; } -/* Return 1 if X refers to a memory location whose address +/* Return 1 if X refers to a memory location whose address cannot be compared reliably with constant addresses, or if X refers to a BLKmode memory object. */ @@ -260,7 +260,7 @@ reg_mentioned_p (reg, in) case CONST_INT: return GET_CODE (reg) == CONST_INT && INTVAL (in) == INTVAL (reg); - + case CONST_DOUBLE: /* These are kept unique for a given value. */ return 0; @@ -586,13 +586,13 @@ single_set (insn) { rtx set; int i; - + if (GET_RTX_CLASS (GET_CODE (insn)) != 'i') return 0; if (GET_CODE (PATTERN (insn)) == SET) return PATTERN (insn); - + else if (GET_CODE (PATTERN (insn)) == PARALLEL) { for (i = 0, set = 0; i < XVECLEN (PATTERN (insn), 0); i++) @@ -608,7 +608,7 @@ single_set (insn) } return set; } - + return 0; } @@ -649,14 +649,14 @@ find_last_value (x, pinsn, valid_to) return src; } } - + /* If set in non-simple way, we don't have a value. */ if (reg_set_p (x, p)) break; } return x; -} +} /* Return nonzero if register in range [REGNO, ENDREGNO) appears either explicitly or implicitly in X @@ -700,7 +700,7 @@ refers_to_regno_p (regno, endregno, x, loc) return 1; return (endregno > i - && regno < i + (i < FIRST_PSEUDO_REGISTER + && regno < i + (i < FIRST_PSEUDO_REGISTER ? HARD_REGNO_NREGS (i, GET_MODE (x)) : 1)); @@ -1029,7 +1029,7 @@ rtx_equal_p (x, y) If the item being stored in or clobbered is a SUBREG of a hard register, the SUBREG will be passed. */ - + void note_stores (x, fun) register rtx x; @@ -1146,7 +1146,7 @@ dead_or_set_regno_p (insn, test_regno) if (GET_CODE (PATTERN (insn)) == SET) { rtx dest = SET_DEST (PATTERN (insn)); - + /* A value is totally replaced if it is the destination or the destination is a SUBREG of REGNO that does not change the number of words in it. */ @@ -1401,7 +1401,7 @@ volatile_insn_p (x) { register char *fmt = GET_RTX_FORMAT (code); register int i; - + for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) { if (fmt[i] == 'e') @@ -1464,7 +1464,7 @@ volatile_refs_p (x) { register char *fmt = GET_RTX_FORMAT (code); register int i; - + for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) { if (fmt[i] == 'e') @@ -1536,7 +1536,7 @@ side_effects_p (x) { register char *fmt = GET_RTX_FORMAT (code); register int i; - + for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--) { if (fmt[i] == 'e') @@ -1685,7 +1685,7 @@ inequality_comparisons_p (x) return 1; } } - + return 0; } @@ -1719,12 +1719,12 @@ replace_rtx (x, from, to) } return x; -} +} /* Throughout the rtx X, replace many registers according to REG_MAP. Return the replacement for X (which may be X with altered contents). REG_MAP[R] is the replacement for register R, or 0 for don't replace. - NREGS is the length of REG_MAP; regs >= NREGS are not mapped. + NREGS is the length of REG_MAP; regs >= NREGS are not mapped. We only support REG_MAP entries of REG or SUBREG. Also, hard registers should not be mapped to pseudos or vice versa since validate_change diff --git a/gnu/usr.bin/cc/cc_int/sched.c b/gnu/usr.bin/cc/cc_int/sched.c index 0f08b6531da0..ef089badbd9d 100644 --- a/gnu/usr.bin/cc/cc_int/sched.c +++ b/gnu/usr.bin/cc/cc_int/sched.c @@ -791,7 +791,7 @@ memrefs_conflict_p (xsize, x, ysize, y, c) If both memory references are volatile, then there must always be a dependence between the two references, since their order can not be changed. A volatile and non-volatile reference can be interchanged - though. + though. A MEM_IN_STRUCT reference at a non-QImode varying address can never conflict with a non-MEM_IN_STRUCT reference at a fixed address. We must @@ -2331,7 +2331,7 @@ sched_note_set (b, x, death) { offset = (regno + j) / REGSET_ELT_BITS; bit = (REGSET_ELT_TYPE) 1 << ((regno + j) % REGSET_ELT_BITS); - + bb_live_regs[offset] &= ~bit; bb_dead_regs[offset] |= bit; } @@ -2352,7 +2352,7 @@ sched_note_set (b, x, death) { offset = (regno + j) / REGSET_ELT_BITS; bit = (REGSET_ELT_TYPE) 1 << ((regno + j) % REGSET_ELT_BITS); - + bb_live_regs[offset] |= bit; bb_dead_regs[offset] &= ~bit; } @@ -2710,13 +2710,13 @@ create_reg_dead_note (reg, insn) rtx reg, insn; { rtx link; - + /* The number of registers killed after scheduling must be the same as the number of registers killed before scheduling. The number of REG_DEAD notes may not be conserved, i.e. two SImode hard register REG_DEAD notes might become one DImode hard register REG_DEAD note, but the number of registers killed will be conserved. - + We carefully remove REG_DEAD notes from the dead_notes list, so that there will be none left at the end. If we run out early, then there is a bug somewhere in flow, combine and/or sched. */ @@ -2841,7 +2841,7 @@ attach_deaths (x, insn, set_p) because we may have to execute this code several times, e.g. once for a clobber (which doesn't add a note) and later for a use (which does add a note). - + Always make the register live. We must do this even if it was live before, because this may be an insn which sets and uses the same register, in which case the register has already been @@ -3756,7 +3756,7 @@ schedule_block (b, file) || GET_CODE (XVECEXP (PATTERN (insn), 0, j)) == CLOBBER) sched_note_set (b, XVECEXP (PATTERN (insn), 0, j), 1); } - + /* This code keeps life analysis information up to date. */ if (GET_CODE (insn) == CALL_INSN) { @@ -4221,16 +4221,16 @@ update_n_sets (x, inc) while (GET_CODE (dest) == STRICT_LOW_PART || GET_CODE (dest) == SUBREG || GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT) dest = SUBREG_REG (dest); - + if (GET_CODE (dest) == REG) { int regno = REGNO (dest); - + if (regno < FIRST_PSEUDO_REGISTER) { register int i; int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (dest)); - + for (i = regno; i < endregno; i++) reg_n_sets[i] += inc; } @@ -4718,7 +4718,7 @@ schedule_insns (dump_file) This must be computed and saved now, because after a basic block's predecessor has been scheduled, it is impossible to accurately determine the correct line number for the first insn of the block. */ - + for (b = 0; b < n_basic_blocks; b++) for (line = basic_block_head[b]; line; line = PREV_INSN (line)) if (GET_CODE (line) == NOTE && NOTE_LINE_NUMBER (line) > 0) diff --git a/gnu/usr.bin/cc/cc_int/sdbout.c b/gnu/usr.bin/cc/cc_int/sdbout.c index 4426457797a8..cd7396487572 100644 --- a/gnu/usr.bin/cc/cc_int/sdbout.c +++ b/gnu/usr.bin/cc/cc_int/sdbout.c @@ -291,7 +291,7 @@ sdbout_init (asm_file, input_file_name, syms) if (DECL_NAME (t) && IDENTIFIER_POINTER (DECL_NAME (t)) != 0 && !strcmp (IDENTIFIER_POINTER (DECL_NAME (t)), "__vtbl_ptr_type")) sdbout_symbol (t, 0); -#endif +#endif #if 0 /* Nothing need be output for the predefined types. */ /* Get all permanent types that have typedef names, diff --git a/gnu/usr.bin/cc/cc_int/stmt.c b/gnu/usr.bin/cc/cc_int/stmt.c index c845d3037379..2b5f06cc0537 100644 --- a/gnu/usr.bin/cc/cc_int/stmt.c +++ b/gnu/usr.bin/cc/cc_int/stmt.c @@ -735,7 +735,7 @@ expand_goto (label) addr = copy_rtx (p->nonlocal_goto_handler_slot); temp = copy_to_reg (replace_rtx (addr, virtual_stack_vars_rtx, hard_frame_pointer_rtx)); - + /* Restore the stack pointer. Note this uses fp just restored. */ addr = p->nonlocal_goto_stack_level; if (addr) @@ -892,11 +892,11 @@ bc_expand_goto_internal (opcode, label, body) if (body && DECL_BIT_FIELD (body)) error ("jump to `%s' invalidly jumps into binding contour", IDENTIFIER_POINTER (DECL_NAME (body))); - + /* Emit immediate jump */ bc_emit_bytecode (opcode); bc_emit_bytecode_labelref (label); - + #ifdef DEBUG_PRINT_CODE fputc ('\n', stderr); #endif @@ -1601,7 +1601,7 @@ expand_expr_stmt (exp) /* Restore stack depth */ if (stack_depth < org_stack_depth) abort (); - + bc_emit_instruction (drop); last_expr_type = TREE_TYPE (exp); @@ -1640,7 +1640,7 @@ expand_expr_stmt (exp) else { rtx lab = gen_label_rtx (); - + /* Compare the value with itself to reference it. */ emit_cmp_insn (last_expr_value, last_expr_value, EQ, expand_expr (TYPE_SIZE (last_expr_type), @@ -1801,8 +1801,8 @@ expand_end_stmt_expr (t) { int i; tree t; - - + + /* At this point, all expressions have been evaluated in order. However, all expression values have been popped when evaluated, which means we have to recover the last expression value. This is @@ -1811,20 +1811,20 @@ expand_end_stmt_expr (t) is here recovered by undoing the `drop'. Since `drop' is equivalent to `adjustackSI [1]', it can be undone with `adjstackSI [-1]'. */ - + bc_adjust_stack (-1); - + if (!last_expr_type) last_expr_type = void_type_node; - + t = make_node (RTL_EXPR); TREE_TYPE (t) = last_expr_type; RTL_EXPR_RTL (t) = NULL; RTL_EXPR_SEQUENCE (t) = NULL; - + /* Don't consider deleting this expr or containing exprs at tree level. */ TREE_THIS_VOLATILE (t) = 1; - + last_expr_type = 0; return t; } @@ -2123,7 +2123,7 @@ expand_end_loop () register rtx start_label; rtx last_test_insn = 0; int num_insns = 0; - + if (output_bytecode) { bc_expand_end_loop (); @@ -2502,7 +2502,7 @@ expand_return (retval) bc_emit_instruction (ret); return; } - + /* If function wants no value, give it none. */ if (TREE_CODE (TREE_TYPE (TREE_TYPE (current_function_decl))) == VOID_TYPE) { @@ -3472,7 +3472,7 @@ bc_expand_decl_init (decl) bc_adjust_stack (stack_depth - org_stack_depth); } - + /* CLEANUP is an expression to be executed at exit from this binding contour; for example, in C++, it might call the destructor for this variable. @@ -4158,7 +4158,7 @@ all_cases_count (type, spareness) } prev = TREE_VALUE (t); } - + } } return count; @@ -4260,7 +4260,7 @@ mark_seen_cases (type, cases_seen, count, sparseness) TREE_INT_CST_LOW (val), TREE_INT_CST_HIGH (val), &xlo, &xhi); } - + if (xhi == 0 && xlo >= 0 && xlo < count) BITARRAY_SET (cases_seen, xlo); } @@ -4684,7 +4684,7 @@ expand_end_case (orig_index) use_cost_table = (TREE_CODE (TREE_TYPE (orig_index)) != ENUMERAL_TYPE && estimate_case_costs (thiscase->data.case_stmt.case_list)); - balance_case_nodes (&thiscase->data.case_stmt.case_list, + balance_case_nodes (&thiscase->data.case_stmt.case_list, NULL_PTR); emit_case_nodes (index, thiscase->data.case_stmt.case_list, default_label, index_type); @@ -4921,7 +4921,7 @@ bc_expand_end_case (expr) /* Bad mode */ abort (); - + bc_emit_bytecode_labeldef (BYTECODE_BC_LABEL (thiscase->exit_label)); /* Possibly issue enumeration warnings. */ @@ -4943,7 +4943,7 @@ bc_expand_end_case (expr) /* Return unique bytecode ID. */ -int +int bc_new_uid () { static int bc_uid = 0; diff --git a/gnu/usr.bin/cc/cc_int/stor-layout.c b/gnu/usr.bin/cc/cc_int/stor-layout.c index 834e96d392bc..3da5cc2e0ac0 100644 --- a/gnu/usr.bin/cc/cc_int/stor-layout.c +++ b/gnu/usr.bin/cc/cc_int/stor-layout.c @@ -105,7 +105,7 @@ variable_size (size) } if (immediate_size_expand) - /* NULL_RTX is not defined; neither is the rtx type. + /* NULL_RTX is not defined; neither is the rtx type. Also, we would like to pass const0_rtx here, but don't have it. */ expand_expr (size, expand_expr (integer_zero_node, NULL_PTR, VOIDmode, 0), VOIDmode, 0); @@ -974,7 +974,7 @@ layout_type (type) TYPE_MODE (variant) = mode; } } - + pop_obstacks (); resume_momentary (old); } diff --git a/gnu/usr.bin/cc/cc_int/stupid.c b/gnu/usr.bin/cc/cc_int/stupid.c index e10f2dce459d..3317feb17089 100644 --- a/gnu/usr.bin/cc/cc_int/stupid.c +++ b/gnu/usr.bin/cc/cc_int/stupid.c @@ -258,7 +258,7 @@ stupid_life_analysis (f, nregs, file) /* Now find the best hard-register class for this pseudo register */ if (N_REG_CLASSES > 1) - reg_renumber[r] = stupid_find_reg (reg_n_calls_crossed[r], + reg_renumber[r] = stupid_find_reg (reg_n_calls_crossed[r], reg_preferred_class (r), PSEUDO_REGNO_MODE (r), reg_where_born[r], diff --git a/gnu/usr.bin/cc/cc_int/toplev.c b/gnu/usr.bin/cc/cc_int/toplev.c index 28114c8fb981..30b027a8552f 100644 --- a/gnu/usr.bin/cc/cc_int/toplev.c +++ b/gnu/usr.bin/cc/cc_int/toplev.c @@ -487,7 +487,7 @@ int flag_schedule_insns = 0; int flag_schedule_insns_after_reload = 0; /* -finhibit-size-directive inhibits output of .size for ELF. - This is used only for compiling crtstuff.c, + This is used only for compiling crtstuff.c, and it may be extended to other effects needed for crtstuff.c on other systems. */ int flag_inhibit_size_directive = 0; @@ -779,7 +779,7 @@ unsigned id_clash_len; /* Nonzero means warn about any objects definitions whose size is larger than N bytes. Also want about function definitions whose returned values are larger than N bytes. The value N is in `larger_than_size'. */ - + int warn_larger_than; unsigned larger_than_size; @@ -1189,7 +1189,7 @@ v_message_with_decl (decl, prefix, s, ap) { char fmt[sizeof "%.255s"]; long width = p - s; - + if (width > 255L) width = 255L; /* arbitrary */ sprintf (fmt, "%%.%lds", width); fprintf (stderr, fmt, s); @@ -2246,7 +2246,7 @@ compile_file (name) Therefore, I took out that change. In future versions we should find another way to solve that dbx problem. -- rms, 23 May 93. */ - + /* Don't let the first function fall at the same address as gcc_compiled., if profiling. */ if (profile_flag || profile_block_flag) @@ -2414,7 +2414,7 @@ compile_file (name) && DECL_EXTERNAL (decl) && ! TREE_PUBLIC (decl)) { - pedwarn_with_decl (decl, + pedwarn_with_decl (decl, "`%s' declared `static' but never defined"); /* This symbol is effectively an "extern" declaration now. */ TREE_PUBLIC (decl) = 1; @@ -3758,7 +3758,7 @@ You Lose! You must define PREFERRED_DEBUGGING_TYPE! else if (!strncmp (str, "gstabs+", len)) write_symbols = DBX_DEBUG; - /* Always enable extensions for -ggdb or -gstabs+, + /* Always enable extensions for -ggdb or -gstabs+, always disable for -gstabs. For plain -g, use system-specific default. */ if (write_symbols == DBX_DEBUG && !strncmp (str, "ggdb", len) @@ -3783,7 +3783,7 @@ You Lose! You must define PREFERRED_DEBUGGING_TYPE! else if (!strncmp (str, "gdwarf", len)) write_symbols = DWARF_DEBUG; - /* Always enable extensions for -ggdb or -gdwarf+, + /* Always enable extensions for -ggdb or -gdwarf+, always disable for -gdwarf. For plain -g, use system-specific default. */ if (write_symbols == DWARF_DEBUG && !strncmp (str, "ggdb", len) @@ -3830,7 +3830,7 @@ You Lose! You must define PREFERRED_DEBUGGING_TYPE! use_gnu_debug_info_extensions = 0; else use_gnu_debug_info_extensions = DEFAULT_GDB_EXTENSIONS; -#endif +#endif if (write_symbols == NO_DEBUG) warning ("`-%s' option not supported on this version of GCC", str); else if (level == 0) @@ -4049,7 +4049,7 @@ print_single_switch (type, name) line_position = 8; } } - + /* Print default target switches for -version. */ static void diff --git a/gnu/usr.bin/cc/cc_int/tree.c b/gnu/usr.bin/cc/cc_int/tree.c index d63a7a5a1bdf..a790574d9da9 100644 --- a/gnu/usr.bin/cc/cc_int/tree.c +++ b/gnu/usr.bin/cc/cc_int/tree.c @@ -141,7 +141,7 @@ char *momentary_function_firstobj; int all_types_permanent; /* Stack of places to restore the momentary obstack back to. */ - + struct momentary_level { /* Pointer back to previous such level. */ @@ -869,7 +869,7 @@ make_node (code) PARM_DECLs of top-level functions do not have this problem. However, we allocate them where we put the FUNCTION_DECL for languauges such as Ada that need to consult some flags in the PARM_DECLs of the function - when calling it. + when calling it. See comment in restore_tree_status for why we can't put this in function_obstack. */ @@ -1165,7 +1165,7 @@ get_identifier (text) hi &= (1 << HASHBITS) - 1; hi %= MAX_HASH_TABLE; - + /* Search table for identifier */ for (idp = hash_table[hi]; idp; idp = TREE_CHAIN (idp)) if (IDENTIFIER_LENGTH (idp) == len @@ -1224,7 +1224,7 @@ set_identifier_size (size) /* Return a newly constructed INTEGER_CST node whose constant value is specified by the two ints LOW and HI. - The TREE_TYPE is set to `int'. + The TREE_TYPE is set to `int'. This function should be used via the `build_int_2' macro. */ @@ -1545,7 +1545,7 @@ real_twop (expr) } /* Nonzero if EXP is a constant or a cast of a constant. */ - + int really_constant_p (exp) tree exp; @@ -1979,7 +1979,7 @@ save_expr (expr) /* If the tree evaluates to a constant, then we don't want to hide that fact (i.e. this allows further folding, and direct checks for constants). However, a read-only object that has side effects cannot be bypassed. - Since it is no problem to reevaluate literals, we just return the + Since it is no problem to reevaluate literals, we just return the literal node. */ if (TREE_CONSTANT (t) || (TREE_READONLY (t) && ! TREE_SIDE_EFFECTS (t)) @@ -2252,7 +2252,7 @@ substitute_in_type (t, f, r) /* If this is an anonymous field and the type of this field is a UNION_TYPE or RECORD_TYPE with no elements, ignore it. If - the type just has one element, treat that as the field. + the type just has one element, treat that as the field. But don't do this if we are processing a QUAL_UNION_TYPE. */ if (TREE_CODE (t) != QUAL_UNION_TYPE && DECL_NAME (new_field) == 0 && (TREE_CODE (TREE_TYPE (new_field)) == UNION_TYPE @@ -2437,7 +2437,7 @@ stabilize_reference_1 (e) /* Constants need no processing. In fact, we should never reach here. */ return e; - + case '2': /* Division is slow and tends to be compiled with jumps, especially the division by powers of 2 that is often @@ -2460,7 +2460,7 @@ stabilize_reference_1 (e) default: abort (); } - + TREE_TYPE (result) = TREE_TYPE (e); TREE_READONLY (result) = TREE_READONLY (e); TREE_SIDE_EFFECTS (result) = TREE_SIDE_EFFECTS (e); @@ -3621,7 +3621,7 @@ build_complex_type (component_type) OP must have integer, real or enumeral type. Pointers are not allowed! There are some cases where the obvious value we could return - would regenerate to OP if converted to OP's type, + would regenerate to OP if converted to OP's type, but would not extend like OP to wider types. If FOR_TYPE indicates such extension is contemplated, we eschew such values. For example, if OP is (unsigned short)(signed char)-1, @@ -4029,7 +4029,7 @@ get_set_constructor_bits (init, buffer, bit_size) for (i = 0; i < bit_size; i++) buffer[i] = 0; - for (vals = TREE_OPERAND (init, 1); + for (vals = TREE_OPERAND (init, 1); vals != NULL_TREE; vals = TREE_CHAIN (vals)) { if (TREE_CODE (TREE_VALUE (vals)) != INTEGER_CST diff --git a/gnu/usr.bin/cc/cc_int/unroll.c b/gnu/usr.bin/cc/cc_int/unroll.c index c82266e21cc8..b498843658e4 100644 --- a/gnu/usr.bin/cc/cc_int/unroll.c +++ b/gnu/usr.bin/cc/cc_int/unroll.c @@ -140,7 +140,7 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */ struct _factor { int factor, count; } factors[NUM_FACTORS] = { {2, 0}, {3, 0}, {5, 0}, {7, 0}}; - + /* Describes the different types of loop unrolling performed. */ enum unroll_types { UNROLL_COMPLETELY, UNROLL_MODULO, UNROLL_NAIVE }; @@ -792,7 +792,7 @@ unroll_loop (loop_end, insn_count, loop_start, end_insert_before, /* Calculate the difference between the final and initial values. Final value may be a (plus (reg x) (const_int 1)) rtx. Let the following cse pass simplify this if initial value is - a constant. + a constant. We must copy the final and initial values here to avoid improperly shared rtl. */ @@ -861,7 +861,7 @@ unroll_loop (loop_end, insn_count, loop_start, end_insert_before, For the negative increment case, the branch here could easily be merged with the `0' case branch above. For the positive increment case, it is not clear how this can be simplified. */ - + if (abs_inc != 1) { int cmp_const; @@ -885,7 +885,7 @@ unroll_loop (loop_end, insn_count, loop_start, end_insert_before, sequence = gen_sequence (); end_sequence (); emit_insn_before (sequence, loop_start); - + /* Only the last copy of the loop body here needs the exit test, so set copy_end to exclude the compare/branch here, and then reset it inside the loop when get to the last @@ -1066,7 +1066,7 @@ unroll_loop (loop_end, insn_count, loop_start, end_insert_before, { insn = PREV_INSN (copy_start); pattern = PATTERN (insn); - + tem = map->label_map[CODE_LABEL_NUMBER (XEXP (SET_SRC (pattern), 0))]; SET_SRC (pattern) = gen_rtx (LABEL_REF, VOIDmode, tem); @@ -1096,7 +1096,7 @@ unroll_loop (loop_end, insn_count, loop_start, end_insert_before, else safety_label = emit_label_after (gen_label_rtx (), copy_end); - /* Delete all of the original loop instructions. Don't delete the + /* Delete all of the original loop instructions. Don't delete the LOOP_BEG note, or the first code label in the loop. */ insn = NEXT_INSN (copy_start); @@ -1315,7 +1315,7 @@ calculate_giv_inc (pattern, src_insn, regno) pattern = PATTERN (src_insn); if (GET_CODE (SET_SRC (pattern)) != PLUS) abort (); - + /* The last insn emitted is not needed, so delete it to avoid confusing the second cse pass. This insn sets the giv unnecessarily. */ delete_insn (get_last_insn ()); @@ -1354,7 +1354,7 @@ calculate_giv_inc (pattern, src_insn, regno) if (GET_CODE (increment) != CONST_INT) abort (); - + /* The insn loading the constant into a register is no longer needed, so delete it. */ delete_insn (get_last_insn ()); @@ -1438,7 +1438,7 @@ final_reg_note_copy (notes, map) /* Copy each instruction in the loop, substituting from map as appropriate. This is very similar to a loop in expand_inline_function. */ - + static void copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, unroll_type, start_label, loop_end, insert_before, @@ -1472,29 +1472,29 @@ copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, map->label_map[CODE_LABEL_NUMBER (start_label)] = start_label; start_sequence (); - + insn = copy_start; do { insn = NEXT_INSN (insn); - + map->orig_asm_operands_vector = 0; - + switch (GET_CODE (insn)) { case INSN: pattern = PATTERN (insn); copy = 0; giv_inc = 0; - + /* Check to see if this is a giv that has been combined with - some split address givs. (Combined in the sense that + some split address givs. (Combined in the sense that `combine_givs' in loop.c has put two givs in the same register.) In this case, we must search all givs based on the same biv to find the address givs. Then split the address givs. Do this before splitting the giv, since that may map the SET_DEST to a new register. */ - + if (GET_CODE (pattern) == SET && GET_CODE (SET_DEST (pattern)) == REG && addr_combined_regs[REGNO (SET_DEST (pattern))]) @@ -1502,10 +1502,10 @@ copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, struct iv_class *bl; struct induction *v, *tv; int regno = REGNO (SET_DEST (pattern)); - + v = addr_combined_regs[REGNO (SET_DEST (pattern))]; bl = reg_biv_class[REGNO (v->src_reg)]; - + /* Although the giv_inc amount is not needed here, we must call calculate_giv_inc here since it might try to delete the last insn emitted. If we wait until later to call it, @@ -1526,24 +1526,24 @@ copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, if (tv->mult_val != v->mult_val) this_giv_inc = (this_giv_inc / INTVAL (v->mult_val) * INTVAL (tv->mult_val)); - + tv->dest_reg = plus_constant (tv->dest_reg, this_giv_inc); *tv->location = tv->dest_reg; - + if (last_iteration && unroll_type != UNROLL_COMPLETELY) { /* Must emit an insn to increment the split address giv. Add in the const_adjust field in case there was a constant eliminated from the address. */ rtx value, dest_reg; - + /* tv->dest_reg will be either a bare register, or else a register plus a constant. */ if (GET_CODE (tv->dest_reg) == REG) dest_reg = tv->dest_reg; else dest_reg = XEXP (tv->dest_reg, 0); - + /* Check for shared address givs, and avoid incrementing the shared psuedo reg more than once. */ @@ -1563,7 +1563,7 @@ copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, emit_unrolled_add (dest_reg, XEXP (value, 0), XEXP (value, 1)); } - + /* Reset the giv to be just the register again, in case it is used after the set we have just emitted. We must subtract the const_adjust factor added in @@ -1574,22 +1574,22 @@ copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, } } } - + /* If this is a setting of a splittable variable, then determine how to split the variable, create a new set based on this split, and set up the reg_map so that later uses of the variable will use the new split variable. */ - + dest_reg_was_split = 0; - + if (GET_CODE (pattern) == SET && GET_CODE (SET_DEST (pattern)) == REG && splittable_regs[REGNO (SET_DEST (pattern))]) { int regno = REGNO (SET_DEST (pattern)); - + dest_reg_was_split = 1; - + /* Compute the increment value for the giv, if it wasn't already computed above. */ @@ -1602,7 +1602,7 @@ copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, { /* Completely unrolling the loop. Set the induction variable to a known constant value. */ - + /* The value in splittable_regs may be an invariant value, so we must use plus_constant here. */ splittable_regs[regno] @@ -1629,7 +1629,7 @@ copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, be a constant plus the original register. Except on the last iteration, when the result has to go back into the original iteration var register. */ - + /* Handle bivs which must be mapped to a new register when split. This happens for bivs which need their final value set before loop entry. The new register @@ -1642,18 +1642,18 @@ copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, giv_src_reg = reg_biv_class[regno]->biv->src_reg; giv_dest_reg = giv_src_reg; } - + #if 0 /* If non-reduced/final-value givs were split, then this would have to remap those givs also. See find_splittable_regs. */ #endif - + splittable_regs[regno] = GEN_INT (INTVAL (giv_inc) + INTVAL (splittable_regs[regno])); giv_inc = splittable_regs[regno]; - + /* Now split the induction variable by changing the dest of this insn to a new register, and setting its reg_map entry to point to this new register. @@ -1691,7 +1691,7 @@ copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, copy = emit_insn (pattern); } REG_NOTES (copy) = initial_reg_note_copy (REG_NOTES (insn), map); - + #ifdef HAVE_cc0 /* If this insn is setting CC0, it may need to look at the insn that uses CC0 to see what type of insn it is. @@ -1731,7 +1731,7 @@ copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, map->const_age_map[regno] = -1; } break; - + case JUMP_INSN: pattern = copy_rtx_and_substitute (PATTERN (insn), map); copy = emit_jump_insn (pattern); @@ -1773,7 +1773,7 @@ copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, abort (); } } - + #ifdef HAVE_cc0 if (cc0_insn) try_constants (cc0_insn, map); @@ -1813,7 +1813,7 @@ copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, JUMP_LABEL (copy) = map->label_map[CODE_LABEL_NUMBER (JUMP_LABEL (insn))]; } - + /* If this is a non-local jump, then must increase the label use count so that the label will not be deleted when the original jump is deleted. */ @@ -1860,7 +1860,7 @@ copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, emit_barrier (); } break; - + case CALL_INSN: pattern = copy_rtx_and_substitute (PATTERN (insn), map); copy = emit_call_insn (pattern); @@ -1882,7 +1882,7 @@ copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, for (i = 0; i < FIRST_PSEUDO_REGISTER; i++) map->const_equiv_map[i] = 0; break; - + case CODE_LABEL: /* If this is the loop start label, then we don't need to emit a copy of this label since no one will use it. */ @@ -1893,15 +1893,15 @@ copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, map->const_age++; } break; - + case BARRIER: copy = emit_barrier (); break; - + case NOTE: /* VTOP notes are valid only before the loop exit test. If placed anywhere else, loop may generate bad code. */ - + if (NOTE_LINE_NUMBER (insn) != NOTE_INSN_DELETED && (NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_VTOP || (last_iteration && unroll_type != UNROLL_COMPLETELY))) @@ -1910,16 +1910,16 @@ copy_loop_body (copy_start, copy_end, map, exit_label, last_iteration, else copy = 0; break; - + default: abort (); break; } - + map->insn_map[INSN_UID (insn)] = copy; } while (insn != copy_end); - + /* Now finish coping the REG_NOTES. */ insn = copy_start; do @@ -2011,7 +2011,7 @@ back_branch_in_range_p (insn, loop_start, loop_end) if (GET_CODE (p) == JUMP_INSN) { target_insn = JUMP_LABEL (p); - + /* Search from loop_start to insn, to see if one of them is the target_insn. We can't use INSN_LUID comparisons here, since insn may not have an LUID entry. */ @@ -2077,7 +2077,7 @@ fold_rtx_mult_add (mult1, mult2, add1, mode) Returns the increment value as an rtx, simplified as much as possible, if it can be calculated. Otherwise, returns 0. */ -rtx +rtx biv_total_increment (bl, loop_start, loop_end) struct iv_class *bl; rtx loop_start, loop_end; @@ -2184,7 +2184,7 @@ iteration_info (iteration_var, initial_value, increment, loop_start, loop_end) bl = reg_biv_class[REGNO (v->src_reg)]; *initial_value = fold_rtx_mult_add (v->mult_val, bl->initial_value, v->add_val, v->mode); - + /* Increment value is mult_val times the increment value of the biv. */ *increment = biv_total_increment (bl, loop_start, loop_end); @@ -2359,7 +2359,7 @@ find_splittable_regs (unroll_type, loop_start, loop_end, end_insert_before, || REGNO (bl->initial_value) < FIRST_PSEUDO_REGISTER)) { rtx tem = gen_reg_rtx (bl->biv->mode); - + emit_insn_before (gen_move_insn (tem, bl->biv->src_reg), loop_start); @@ -2473,7 +2473,7 @@ find_splittable_givs (bl, unroll_type, loop_start, loop_end, increment, && (! v->always_computable || back_branch_in_range_p (v->insn, loop_start, loop_end))) continue; - + /* The giv increment value must be a constant. */ giv_inc = fold_rtx_mult_add (v->mult_val, increment, const0_rtx, v->mode); @@ -2485,7 +2485,7 @@ find_splittable_givs (bl, unroll_type, loop_start, loop_end, increment, the loop, or else the final value of the giv must be known. Otherwise, it is not safe to split the giv since it may not have the proper value on loop exit. */ - + /* The used outside loop test will fail for DEST_ADDR givs. They are never used outside the loop anyways, so it is always safe to split a DEST_ADDR giv. */ @@ -2525,11 +2525,11 @@ find_splittable_givs (bl, unroll_type, loop_start, loop_end, increment, emit_insn_before (gen_move_insn (tem, v->dest_reg), loop_start); emit_insn_before (gen_move_insn (v->dest_reg, final_value), loop_start); - + if (loop_dump_stream) fprintf (loop_dump_stream, "Giv %d mapped to %d for split.\n", REGNO (v->dest_reg), REGNO (tem)); - + v->src_reg = tem; } #endif @@ -2601,7 +2601,7 @@ find_splittable_givs (bl, unroll_type, loop_start, loop_end, increment, v->add_val, tem, loop_start); value = tem; } - + splittable_regs[REGNO (v->new_reg)] = value; } else @@ -2621,7 +2621,7 @@ find_splittable_givs (bl, unroll_type, loop_start, loop_end, increment, catch some of the common cases of this. Currently, I leave the work of simplifying multiple address givs to the following cse pass. */ - + /* As a special case, if we have multiple identical address givs within a single instruction, then we do use a single psuedo reg for both. This is necessary in case one is a match_dup @@ -2648,13 +2648,13 @@ find_splittable_givs (bl, unroll_type, loop_start, loop_end, increment, /* If the address giv has a constant in its new_reg value, then this constant can be pulled out and put in value, instead of being part of the initialization code. */ - + if (GET_CODE (v->new_reg) == PLUS && GET_CODE (XEXP (v->new_reg, 1)) == CONST_INT) { v->dest_reg = plus_constant (tem, INTVAL (XEXP (v->new_reg,1))); - + /* Only succeed if this will give valid addresses. Try to validate both the first and the last address resulting from loop unrolling, if @@ -2681,7 +2681,7 @@ find_splittable_givs (bl, unroll_type, loop_start, loop_end, increment, } else v->dest_reg = tem; - + /* If the address hasn't been checked for validity yet, do so now, and fail completely if either the first or the last unrolled copy of the address is not a valid address. */ @@ -2698,7 +2698,7 @@ find_splittable_givs (bl, unroll_type, loop_start, loop_end, increment, INSN_UID (v->insn)); continue; } - + /* To initialize the new register, just move the value of new_reg into it. This is not guaranteed to give a valid instruction on machines with complex addressing modes. @@ -2733,7 +2733,7 @@ find_splittable_givs (bl, unroll_type, loop_start, loop_end, increment, else { v->dest_reg = value; - + /* Check the resulting address for validity, and fail if the resulting address would be illegal. */ if (! memory_address_p (v->mem_mode, v->dest_reg) @@ -2749,28 +2749,28 @@ find_splittable_givs (bl, unroll_type, loop_start, loop_end, increment, continue; } } - + /* Store the value of dest_reg into the insn. This sharing will not be a problem as this insn will always be copied later. */ - + *v->location = v->dest_reg; - + /* If this address giv is combined with a dest reg giv, then save the base giv's induction pointer so that we will be able to handle this address giv properly. The base giv itself does not have to be splittable. */ - + if (v->same && v->same->giv_type == DEST_REG) addr_combined_regs[REGNO (v->same->new_reg)] = v->same; - + if (GET_CODE (v->new_reg) == REG) { /* This giv maybe hasn't been combined with any others. Make sure that it's giv is marked as splittable here. */ - + splittable_regs[REGNO (v->new_reg)] = value; - + /* Make it appear to depend upon itself, so that the giv will be properly split in the main loop above. */ if (! v->same) @@ -2793,7 +2793,7 @@ find_splittable_givs (bl, unroll_type, loop_start, loop_end, increment, it makes sense to reduce&split givs when possible, as this will result in simpler instructions, and will not require that a reg be live across loop iterations. */ - + splittable_regs[REGNO (v->dest_reg)] = value; fprintf (stderr, "Giv %d at insn %d not reduced\n", REGNO (v->dest_reg), INSN_UID (v->insn)); @@ -2801,7 +2801,7 @@ find_splittable_givs (bl, unroll_type, loop_start, loop_end, increment, continue; #endif } - + /* Givs are only updated once by definition. Mark it so if this is a splittable register. Don't need to do anything for address givs where this may not be a register. */ @@ -2810,11 +2810,11 @@ find_splittable_givs (bl, unroll_type, loop_start, loop_end, increment, splittable_regs_updates[REGNO (v->new_reg)] = 1; result++; - + if (loop_dump_stream) { int regnum; - + if (GET_CODE (v->dest_reg) == CONST_INT) regnum = -1; else if (GET_CODE (v->dest_reg) != REG) @@ -2896,7 +2896,7 @@ reg_dead_after_loop (reg, loop_start, loop_end) /* Try to calculate the final value of the biv, the value it will have at the end of the loop. If we can do it, return that value. */ - + rtx final_biv_value (bl, loop_start, loop_end) struct iv_class *bl; @@ -2918,7 +2918,7 @@ final_biv_value (bl, loop_start, loop_end) if (loop_dump_stream) fprintf (loop_dump_stream, "Final biv value for %d, reversed biv.\n", bl->regno); - + return const0_rtx; } @@ -2933,7 +2933,7 @@ final_biv_value (bl, loop_start, loop_end) && invariant_p (bl->initial_value)) { increment = biv_total_increment (bl, loop_start, loop_end); - + if (increment && invariant_p (increment)) { /* Can calculate the loop exit value, emit insns after loop @@ -2950,7 +2950,7 @@ final_biv_value (bl, loop_start, loop_end) if (loop_dump_stream) fprintf (loop_dump_stream, "Final biv value for %d, calculated.\n", bl->regno); - + return tem; } } @@ -3000,7 +3000,7 @@ final_giv_value (v, loop_start, loop_end) /* Try to calculate the final value as a function of the biv it depends upon. The only exit from the loop must be the fall through at the bottom (otherwise it may not have its final value when the loop exits). */ - + /* ??? Can calculate the final giv value by subtracting off the extra biv increments times the giv's mult_val. The loop must have only one exit for this to work, but the loop iterations does not need @@ -3022,7 +3022,7 @@ final_giv_value (v, loop_start, loop_end) { /* Can calculate the loop exit value of its biv as (loop_n_iterations * increment) + initial_value */ - + /* The loop exit value of the giv is then (final_biv_value - extra increments) * mult_val + add_val. The extra increments are any increments to the biv which @@ -3055,11 +3055,11 @@ final_giv_value (v, loop_start, loop_end) emit_insn_before (seq, insert_before); } } - + /* Now calculate the giv's final value. */ emit_iv_add_mult (tem, v->mult_val, v->add_val, tem, insert_before); - + if (loop_dump_stream) fprintf (loop_dump_stream, "Final giv value for %d, calc from biv's value.\n", @@ -3107,7 +3107,7 @@ loop_iterations (loop_start, loop_end) /* First find the iteration variable. If the last insn is a conditional branch, and the insn before tests a register value, make that the iteration variable. */ - + loop_initial_value = 0; loop_increment = 0; loop_final_value = 0; @@ -3161,7 +3161,7 @@ loop_iterations (loop_start, loop_end) if (GET_CODE (comparison_value) == REG && invariant_p (comparison_value)) { rtx insn, set; - + for (insn = PREV_INSN (loop_start); insn ; insn = PREV_INSN (insn)) { if (GET_CODE (insn) == CODE_LABEL) @@ -3272,7 +3272,7 @@ loop_iterations (loop_start, loop_end) will overflow before the loop exits), 4 infinite loop cases, and 15 immediate exit (0 or 1 iteration depending on loop type) cases. Only try to optimize the normal cases. */ - + /* (compare_dir/final_larger/increment_dir) Normal cases: (0/-1/-1), (0/1/1), (-1/-1/-1), (1/1/1) Reverse cases: (0/-1/1), (0/1/-1), (-1/-1/1), (1/1/-1) diff --git a/gnu/usr.bin/cc/cc_int/varasm.c b/gnu/usr.bin/cc/cc_int/varasm.c index 2ef7ec85cd3d..76f4b8ca7fe3 100644 --- a/gnu/usr.bin/cc/cc_int/varasm.c +++ b/gnu/usr.bin/cc/cc_int/varasm.c @@ -213,7 +213,7 @@ named_section (name) { in_named_name = name; in_section = in_named; - + #ifdef ASM_OUTPUT_SECTION_NAME ASM_OUTPUT_SECTION_NAME (asm_out_file, name); #else @@ -239,7 +239,7 @@ make_function_rtl (decl) { if (DECL_RTL (decl) == 0) DECL_RTL (decl) = bc_gen_rtx (name, 0, (struct bc_label *) 0); - + /* Record that at least one function has been defined. */ function_defined = 1; return; @@ -351,7 +351,7 @@ decode_reg_name (asmspec) /* Get rid of confusing prefixes. */ asmspec = strip_reg_name (asmspec); - + /* Allow a decimal number as a "register name". */ for (i = strlen (asmspec) - 1; i >= 0; i--) if (! (asmspec[i] >= '0' && asmspec[i] <= '9')) @@ -1285,7 +1285,7 @@ assemble_variable (decl, top_level, at_end, dont_output_data) finish: #ifdef XCOFF_DEBUGGING_INFO /* Unfortunately, the IBM assembler cannot handle stabx before the actual - declaration. When something like ".stabx "aa:S-2",aa,133,0" is emitted + declaration. When something like ".stabx "aa:S-2",aa,133,0" is emitted and `aa' hasn't been output yet, the assembler generates a stab entry with a value of zero, in addition to creating an unnecessary external entry for `aa'. Hence, we must postpone dbxout_symbol to here at the end. */ @@ -2583,21 +2583,21 @@ output_constant_def (exp) the label number already assigned. */ hash = const_hash (exp) % MAX_HASH_TABLE; - + for (desc = const_hash_table[hash]; desc; desc = desc->next) if (compare_constant (exp, desc)) { found = desc->label; break; } - + if (found == 0) { /* No constant equal to EXP is known to have been output. Make a constant descriptor to enter EXP in the hash table. Assign the label number and record it in the descriptor for future calls to this function to find. */ - + /* Create a string containing the label name, in LABEL. */ ASM_GENERATE_INTERNAL_LABEL (label, "LC", const_labelno); @@ -2612,7 +2612,7 @@ output_constant_def (exp) /* Create a string containing the label name, in LABEL. */ ASM_GENERATE_INTERNAL_LABEL (label, "LC", const_labelno); } - + /* We have a symbol name; construct the SYMBOL_REF and the MEM. */ push_obstacks_nochange (); @@ -2620,7 +2620,7 @@ output_constant_def (exp) end_temporary_allocation (); def = gen_rtx (SYMBOL_REF, Pmode, desc->label); - + TREE_CST_RTL (exp) = gen_rtx (MEM, TYPE_MODE (TREE_TYPE (exp)), def); RTX_UNCHANGING_P (TREE_CST_RTL (exp)) = 1; @@ -3083,8 +3083,8 @@ force_const_mem (mode, x) push_obstacks_nochange (); rtl_in_saveable_obstack (); - x = gen_rtx (CONST, GET_MODE (x), - gen_rtx (PLUS, GET_MODE (x), + x = gen_rtx (CONST, GET_MODE (x), + gen_rtx (PLUS, GET_MODE (x), XEXP (XEXP (x, 0), 0), XEXP (XEXP (x, 0), 1))); pop_obstacks (); } @@ -3383,7 +3383,7 @@ output_constant (exp, size) /* Eliminate the NON_LVALUE_EXPR_EXPR that makes a cast not be an lvalue. That way we get the constant (we hope) inside it. Also, strip off any NOP_EXPR that converts between two record, union, or array types. */ - while ((TREE_CODE (exp) == NOP_EXPR + while ((TREE_CODE (exp) == NOP_EXPR && (TREE_TYPE (exp) == TREE_TYPE (TREE_OPERAND (exp, 0)) || TREE_CODE (TREE_TYPE (exp)) == ARRAY_TYPE || TREE_CODE (TREE_TYPE (exp)) == RECORD_TYPE @@ -3489,9 +3489,9 @@ bc_assemble_integer (exp, size) expand_expr() using EXPAND_SUM above in the RTL case? I hate RMS. FIXME: Copied as is from BC-GCC1; may need work. Don't hate. -bson */ - + exp = fold (exp); - + while (TREE_CODE (exp) == NOP_EXPR || TREE_CODE (exp) == CONVERT_EXPR) exp = TREE_OPERAND (exp, 0); if (TREE_CODE (exp) == INTEGER_CST) @@ -3523,7 +3523,7 @@ bc_assemble_integer (exp, size) } else abort (); /* FIXME: ditto previous. */ - + if (addr_part == 0) { if (size == 1) diff --git a/gnu/usr.bin/cc/cc_int/xcoffout.c b/gnu/usr.bin/cc/cc_int/xcoffout.c index 42b01f93dcbb..5518cfe493fd 100644 --- a/gnu/usr.bin/cc/cc_int/xcoffout.c +++ b/gnu/usr.bin/cc/cc_int/xcoffout.c @@ -187,7 +187,7 @@ stab_to_sclass (stab) return C_GSYM; case N_FNAME: - UNKNOWN_STAB ("N_FNAME"); + UNKNOWN_STAB ("N_FNAME"); abort(); case N_FUN: @@ -199,7 +199,7 @@ stab_to_sclass (stab) #ifdef N_MAIN case N_MAIN: - UNKNOWN_STAB ("N_MAIN"); + UNKNOWN_STAB ("N_MAIN"); abort (); #endif @@ -207,7 +207,7 @@ stab_to_sclass (stab) return C_RSYM; case N_SSYM: - UNKNOWN_STAB ("N_SSYM"); + UNKNOWN_STAB ("N_SSYM"); abort (); case N_RPSYM: @@ -223,59 +223,59 @@ stab_to_sclass (stab) return C_ENTRY; case N_SO: - UNKNOWN_STAB ("N_SO"); + UNKNOWN_STAB ("N_SO"); abort (); case N_SOL: - UNKNOWN_STAB ("N_SOL"); + UNKNOWN_STAB ("N_SOL"); abort (); case N_SLINE: - UNKNOWN_STAB ("N_SLINE"); + UNKNOWN_STAB ("N_SLINE"); abort (); #ifdef N_DSLINE case N_DSLINE: - UNKNOWN_STAB ("N_DSLINE"); + UNKNOWN_STAB ("N_DSLINE"); abort (); #endif #ifdef N_BSLINE case N_BSLINE: - UNKNOWN_STAB ("N_BSLINE"); + UNKNOWN_STAB ("N_BSLINE"); abort (); #endif #if 0 /* This has the same value as N_BSLINE. */ case N_BROWS: - UNKNOWN_STAB ("N_BROWS"); + UNKNOWN_STAB ("N_BROWS"); abort (); #endif #ifdef N_BINCL case N_BINCL: - UNKNOWN_STAB ("N_BINCL"); + UNKNOWN_STAB ("N_BINCL"); abort (); #endif #ifdef N_EINCL case N_EINCL: - UNKNOWN_STAB ("N_EINCL"); + UNKNOWN_STAB ("N_EINCL"); abort (); #endif #ifdef N_EXCL case N_EXCL: - UNKNOWN_STAB ("N_EXCL"); + UNKNOWN_STAB ("N_EXCL"); abort (); #endif case N_LBRAC: - UNKNOWN_STAB ("N_LBRAC"); + UNKNOWN_STAB ("N_LBRAC"); abort (); case N_RBRAC: - UNKNOWN_STAB ("N_RBRAC"); + UNKNOWN_STAB ("N_RBRAC"); abort (); case N_BCOMM: @@ -286,31 +286,31 @@ stab_to_sclass (stab) return C_ECOML; case N_LENG: - UNKNOWN_STAB ("N_LENG"); + UNKNOWN_STAB ("N_LENG"); abort (); case N_PC: - UNKNOWN_STAB ("N_PC"); + UNKNOWN_STAB ("N_PC"); abort (); #ifdef N_M2C case N_M2C: - UNKNOWN_STAB ("N_M2C"); + UNKNOWN_STAB ("N_M2C"); abort (); #endif #ifdef N_SCOPE case N_SCOPE: - UNKNOWN_STAB ("N_SCOPE"); + UNKNOWN_STAB ("N_SCOPE"); abort (); #endif case N_CATCH: - UNKNOWN_STAB ("N_CATCH"); + UNKNOWN_STAB ("N_CATCH"); abort (); default: - UNKNOWN_STAB ("default"); + UNKNOWN_STAB ("default"); abort (); } } @@ -437,7 +437,7 @@ xcoffout_begin_block (file, line, n) { tree decl = current_function_decl; - + /* The IBM AIX compiler does not emit a .bb for the function level scope, so we avoid it here also. */ if (n != 1) |