diff options
Diffstat (limited to 'contrib/llvm/lib/Target/X86/X86ScheduleAtom.td')
| -rw-r--r-- | contrib/llvm/lib/Target/X86/X86ScheduleAtom.td | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/contrib/llvm/lib/Target/X86/X86ScheduleAtom.td b/contrib/llvm/lib/Target/X86/X86ScheduleAtom.td index a5b440182aa9..e052ad98104c 100644 --- a/contrib/llvm/lib/Target/X86/X86ScheduleAtom.td +++ b/contrib/llvm/lib/Target/X86/X86ScheduleAtom.td @@ -212,6 +212,7 @@ def AtomItineraries : ProcessorItineraries< InstrItinData<IIC_SSE_PSHUF_RI, [InstrStage<1, [Port0]>] >, InstrItinData<IIC_SSE_PSHUF_MI, [InstrStage<1, [Port0]>] >, + InstrItinData<IIC_SSE_PACK, [InstrStage<1, [Port0]>] >, InstrItinData<IIC_SSE_UNPCK, [InstrStage<1, [Port0]>] >, InstrItinData<IIC_SSE_SQRTPS_RR, [InstrStage<70, [Port0, Port1]>] >, @@ -337,6 +338,7 @@ def AtomItineraries : ProcessorItineraries< InstrItinData<IIC_MMX_PEXTR, [InstrStage<4, [Port0, Port1]>] >, InstrItinData<IIC_MMX_PINSRW, [InstrStage<1, [Port0]>] >, InstrItinData<IIC_MMX_MASKMOV, [InstrStage<1, [Port0]>] >, + InstrItinData<IIC_MMX_MOVMSK, [InstrStage<3, [Port0]>] >, // conversions // from/to PD InstrItinData<IIC_MMX_CVT_PD_RR, [InstrStage<7, [Port0, Port1]>] >, @@ -362,6 +364,7 @@ def AtomItineraries : ProcessorItineraries< InstrItinData<IIC_FST80, [InstrStage<5, [Port0, Port1]>] >, InstrItinData<IIC_FIST, [InstrStage<6, [Port0, Port1]>] >, + InstrItinData<IIC_FCMOV, [InstrStage<9, [Port0, Port1]>] >, InstrItinData<IIC_FLDZ, [InstrStage<1, [Port0, Port1]>] >, InstrItinData<IIC_FUCOM, [InstrStage<1, [Port1]>] >, InstrItinData<IIC_FUCOMI, [InstrStage<9, [Port0, Port1]>] >, @@ -392,6 +395,8 @@ def AtomItineraries : ProcessorItineraries< InstrItinData<IIC_FXSAVE, [InstrStage<140, [Port0, Port1]>] >, InstrItinData<IIC_FXRSTOR, [InstrStage<141, [Port0, Port1]>] >, InstrItinData<IIC_FXCH, [InstrStage<1, [Port0], 0>, InstrStage<1, [Port1]>] >, + InstrItinData<IIC_FSIGN, [InstrStage<1, [Port1]>] >, + InstrItinData<IIC_FSQRT, [InstrStage<71, [Port0, Port1]>] >, // System instructions InstrItinData<IIC_CPUID, [InstrStage<121, [Port0, Port1]>] >, @@ -404,6 +409,7 @@ def AtomItineraries : ProcessorItineraries< InstrItinData<IIC_LXS, [InstrStage<10, [Port0, Port1]>] >, InstrItinData<IIC_LTR, [InstrStage<83, [Port0, Port1]>] >, InstrItinData<IIC_RDTSC, [InstrStage<30, [Port0, Port1]>] >, + InstrItinData<IIC_RDTSCP, [InstrStage<30, [Port0, Port1]>] >, InstrItinData<IIC_RSM, [InstrStage<741, [Port0, Port1]>] >, InstrItinData<IIC_SIDT, [InstrStage<4, [Port0, Port1]>] >, InstrItinData<IIC_SGDT, [InstrStage<4, [Port0, Port1]>] >, |