diff options
Diffstat (limited to 'contrib/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h')
-rw-r--r-- | contrib/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h | 78 |
1 files changed, 39 insertions, 39 deletions
diff --git a/contrib/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h b/contrib/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h index 97e325b984f6..cbaf9a83b80f 100644 --- a/contrib/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h +++ b/contrib/llvm/lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.h @@ -28,47 +28,47 @@ class raw_ostream; extern Target TheSystemZTarget; namespace SystemZMC { - // How many bytes are in the ABI-defined, caller-allocated part of - // a stack frame. - const int64_t CallFrameSize = 160; - - // The offset of the DWARF CFA from the incoming stack pointer. - const int64_t CFAOffsetFromInitialSP = CallFrameSize; - - // Maps of asm register numbers to LLVM register numbers, with 0 indicating - // an invalid register. In principle we could use 32-bit and 64-bit register - // classes directly, provided that we relegated the GPR allocation order - // in SystemZRegisterInfo.td to an AltOrder and left the default order - // as %r0-%r15. It seems better to provide the same interface for - // all classes though. - extern const unsigned GR32Regs[16]; - extern const unsigned GRH32Regs[16]; - extern const unsigned GR64Regs[16]; - extern const unsigned GR128Regs[16]; - extern const unsigned FP32Regs[16]; - extern const unsigned FP64Regs[16]; - extern const unsigned FP128Regs[16]; - - // Return the 0-based number of the first architectural register that - // contains the given LLVM register. E.g. R1D -> 1. - unsigned getFirstReg(unsigned Reg); - - // Return the given register as a GR64. - inline unsigned getRegAsGR64(unsigned Reg) { - return GR64Regs[getFirstReg(Reg)]; - } - - // Return the given register as a low GR32. - inline unsigned getRegAsGR32(unsigned Reg) { - return GR32Regs[getFirstReg(Reg)]; - } - - // Return the given register as a high GR32. - inline unsigned getRegAsGRH32(unsigned Reg) { - return GRH32Regs[getFirstReg(Reg)]; - } +// How many bytes are in the ABI-defined, caller-allocated part of +// a stack frame. +const int64_t CallFrameSize = 160; + +// The offset of the DWARF CFA from the incoming stack pointer. +const int64_t CFAOffsetFromInitialSP = CallFrameSize; + +// Maps of asm register numbers to LLVM register numbers, with 0 indicating +// an invalid register. In principle we could use 32-bit and 64-bit register +// classes directly, provided that we relegated the GPR allocation order +// in SystemZRegisterInfo.td to an AltOrder and left the default order +// as %r0-%r15. It seems better to provide the same interface for +// all classes though. +extern const unsigned GR32Regs[16]; +extern const unsigned GRH32Regs[16]; +extern const unsigned GR64Regs[16]; +extern const unsigned GR128Regs[16]; +extern const unsigned FP32Regs[16]; +extern const unsigned FP64Regs[16]; +extern const unsigned FP128Regs[16]; + +// Return the 0-based number of the first architectural register that +// contains the given LLVM register. E.g. R1D -> 1. +unsigned getFirstReg(unsigned Reg); + +// Return the given register as a GR64. +inline unsigned getRegAsGR64(unsigned Reg) { + return GR64Regs[getFirstReg(Reg)]; } +// Return the given register as a low GR32. +inline unsigned getRegAsGR32(unsigned Reg) { + return GR32Regs[getFirstReg(Reg)]; +} + +// Return the given register as a high GR32. +inline unsigned getRegAsGRH32(unsigned Reg) { + return GRH32Regs[getFirstReg(Reg)]; +} +} // end namespace SystemZMC + MCCodeEmitter *createSystemZMCCodeEmitter(const MCInstrInfo &MCII, const MCRegisterInfo &MRI, const MCSubtargetInfo &STI, |