diff options
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/X86/X86Instr3DNow.td')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/Target/X86/X86Instr3DNow.td | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/X86/X86Instr3DNow.td b/contrib/llvm-project/llvm/lib/Target/X86/X86Instr3DNow.td index cd1b06365971..3be03ab0f433 100644 --- a/contrib/llvm-project/llvm/lib/Target/X86/X86Instr3DNow.td +++ b/contrib/llvm-project/llvm/lib/Target/X86/X86Instr3DNow.td @@ -79,21 +79,11 @@ let SchedRW = [WriteEMMS], def FEMMS : I3DNow<0x0E, RawFrm, (outs), (ins), "femms", [(int_x86_mmx_femms)]>, TB; -// PREFETCHWT1 is supported we want to use it for everything but T0. -def PrefetchWLevel : PatFrag<(ops), (i32 imm), [{ - return N->getSExtValue() == 3 || !Subtarget->hasPREFETCHWT1(); -}]>; - -// Use PREFETCHWT1 for NTA, T2, T1. -def PrefetchWT1Level : ImmLeaf<i32, [{ - return Imm < 3; -}]>; - let SchedRW = [WriteLoad] in { let Predicates = [Has3DNow, NoSSEPrefetch] in def PREFETCH : I3DNow<0x0D, MRM0m, (outs), (ins i8mem:$addr), "prefetch\t$addr", - [(prefetch addr:$addr, imm, imm, (i32 1))]>, TB; + [(prefetch addr:$addr, timm, timm, (i32 1))]>, TB; def PREFETCHW : I<0x0D, MRM1m, (outs), (ins i8mem:$addr), "prefetchw\t$addr", [(prefetch addr:$addr, (i32 1), (i32 PrefetchWLevel), (i32 1))]>, |