diff options
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/Sparc/SparcInstr64Bit.td')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/Target/Sparc/SparcInstr64Bit.td | 116 |
1 files changed, 51 insertions, 65 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/Sparc/SparcInstr64Bit.td b/contrib/llvm-project/llvm/lib/Target/Sparc/SparcInstr64Bit.td index 0a6479487418..93862414fb35 100644 --- a/contrib/llvm-project/llvm/lib/Target/Sparc/SparcInstr64Bit.td +++ b/contrib/llvm-project/llvm/lib/Target/Sparc/SparcInstr64Bit.td @@ -65,6 +65,7 @@ def : Pat<(i64 0), (COPY (i64 G0))>, Requires<[Is64Bit]>; // The ALU instructions want their simm13 operands as i32 immediates. +// FIXME: This is no longer true, they are now pointer-sized. def as_i32imm : SDNodeXForm<imm, [{ return CurDAG->getTargetConstant(N->getSExtValue(), SDLoc(N), MVT::i32); }]>; @@ -144,43 +145,29 @@ def : Pat<(i64 imm:$val), let Predicates = [Is64Bit] in { -// Register-register instructions. -let isCodeGenOnly = 1 in { -defm ANDX : F3_12<"and", 0b000001, and, I64Regs, i64, i64imm>; -defm ORX : F3_12<"or", 0b000010, or, I64Regs, i64, i64imm>; -defm XORX : F3_12<"xor", 0b000011, xor, I64Regs, i64, i64imm>; - -def ANDXNrr : F3_1<2, 0b000101, - (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2), - "andn $rs1, $rs2, $rd", - [(set i64:$rd, (and i64:$rs1, (not i64:$rs2)))]>; -def ORXNrr : F3_1<2, 0b000110, - (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2), - "orn $rs1, $rs2, $rd", - [(set i64:$rd, (or i64:$rs1, (not i64:$rs2)))]>; -def XNORXrr : F3_1<2, 0b000111, - (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2), - "xnor $rs1, $rs2, $rd", - [(set i64:$rd, (not (xor i64:$rs1, i64:$rs2)))]>; - -defm ADDX : F3_12<"add", 0b000000, add, I64Regs, i64, i64imm>; -defm SUBX : F3_12<"sub", 0b000100, sub, I64Regs, i64, i64imm>; - -def TLS_ADDXrr : F3_1<2, 0b000000, (outs I64Regs:$rd), - (ins I64Regs:$rs1, I64Regs:$rs2, TailRelocSymTLSAdd:$sym), - "add $rs1, $rs2, $rd, $sym", - [(set i64:$rd, - (tlsadd i64:$rs1, i64:$rs2, tglobaltlsaddr:$sym))]>; - -// "LEA" form of add -def LEAX_ADDri : F3_2<2, 0b000000, - (outs I64Regs:$rd), (ins (MEMri $rs1, $simm13):$addr), - "add ${addr:arith}, $rd", - [(set iPTR:$rd, ADDRri:$addr)]>; -} +def : Pat<(and i64:$lhs, i64:$rhs), (ANDrr $lhs, $rhs)>; +def : Pat<(or i64:$lhs, i64:$rhs), (ORrr $lhs, $rhs)>; +def : Pat<(xor i64:$lhs, i64:$rhs), (XORrr $lhs, $rhs)>; + +def : Pat<(and i64:$lhs, (i64 simm13:$rhs)), (ANDri $lhs, imm:$rhs)>; +def : Pat<(or i64:$lhs, (i64 simm13:$rhs)), (ORri $lhs, imm:$rhs)>; +def : Pat<(xor i64:$lhs, (i64 simm13:$rhs)), (XORri $lhs, imm:$rhs)>; + +def : Pat<(and i64:$lhs, (not i64:$rhs)), (ANDNrr $lhs, $rhs)>; +def : Pat<(or i64:$lhs, (not i64:$rhs)), (ORNrr $lhs, $rhs)>; +def : Pat<(not (xor i64:$lhs, i64:$rhs)), (XNORrr $lhs, $rhs)>; + +def : Pat<(add i64:$lhs, i64:$rhs), (ADDrr $lhs, $rhs)>; +def : Pat<(sub i64:$lhs, i64:$rhs), (SUBrr $lhs, $rhs)>; + +def : Pat<(add i64:$lhs, (i64 simm13:$rhs)), (ADDri $lhs, imm:$rhs)>; +def : Pat<(sub i64:$lhs, (i64 simm13:$rhs)), (SUBri $lhs, imm:$rhs)>; + +def : Pat<(tlsadd i64:$rs1, i64:$rs2, tglobaltlsaddr:$sym), + (TLS_ADDrr $rs1, $rs2, $sym)>; -def : Pat<(SPcmpicc i64:$a, i64:$b), (CMPrr $a, $b)>; -def : Pat<(SPcmpicc i64:$a, (i64 simm13:$b)), (CMPri $a, (as_i32imm $b))>; +def : Pat<(SPcmpicc i64:$lhs, i64:$rhs), (SUBCCrr $lhs, $rhs)>; +def : Pat<(SPcmpicc i64:$lhs, (i64 simm13:$rhs)), (SUBCCri $lhs, imm:$rhs)>; def : Pat<(i64 (ctpop i64:$src)), (POPCrr $src)>; } // Predicates = [Is64Bit] @@ -239,7 +226,7 @@ def UDIVXri : F3_2<2, 0b001101, let Predicates = [Is64Bit] in { // 64-bit loads. -defm LDX : Load<"ldx", 0b001011, load, I64Regs, i64>; +defm LDX : LoadA<"ldx", 0b001011, 0b011011, load, I64Regs, i64>; let mayLoad = 1, isAsmParserOnly = 1 in { def TLS_LDXrr : F3_1<3, 0b001011, @@ -282,10 +269,10 @@ def : Pat<(i64 (extloadi32 ADDRrr:$addr)), (LDrr ADDRrr:$addr)>; def : Pat<(i64 (extloadi32 ADDRri:$addr)), (LDri ADDRri:$addr)>; // Sign-extending load of i32 into i64 is a new SPARC v9 instruction. -defm LDSW : Load<"ldsw", 0b001000, sextloadi32, I64Regs, i64>; +defm LDSW : LoadA<"ldsw", 0b001000, 0b011000, sextloadi32, I64Regs, i64>; // 64-bit stores. -defm STX : Store<"stx", 0b001110, store, I64Regs, i64>; +defm STX : StoreA<"stx", 0b001110, 0b011110, store, I64Regs, i64>; // Truncating stores from i64 are identical to the i32 stores. def : Pat<(truncstorei8 i64:$src, ADDRrr:$addr), (STBrr ADDRrr:$addr, $src)>; @@ -465,24 +452,20 @@ def : Pat<(SPselectreg (i64 simm10:$t), i64:$f, imm:$rcond, i64:$rs1), } // Predicates = [Is64Bit] - -// 64 bit SETHI -let Predicates = [Is64Bit], isCodeGenOnly = 1 in { -def SETHIXi : F2_1<0b100, - (outs IntRegs:$rd), (ins i64imm:$imm22), - "sethi $imm22, $rd", - [(set i64:$rd, SETHIimm:$imm22)]>; -} - // ATOMICS. -let Predicates = [Is64Bit], Constraints = "$swap = $rd", asi = 0b10000000 in { - def CASXrr: F3_1_asi<3, 0b111110, +let Predicates = [Is64Bit, HasV9], Constraints = "$swap = $rd" in { + def CASXArr: F3_1_asi<3, 0b111110, (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2, - I64Regs:$swap), - "casx [$rs1], $rs2, $rd", - [(set i64:$rd, - (atomic_cmp_swap_64 i64:$rs1, i64:$rs2, i64:$swap))]>; + I64Regs:$swap, ASITag:$asi), + "casxa [$rs1] $asi, $rs2, $rd", + []>; + let Uses = [ASR3] in + def CASXAri: F3_1_cas_asi<3, 0b111110, + (outs I64Regs:$rd), (ins I64Regs:$rs1, I64Regs:$rs2, + I64Regs:$swap), + "casxa [$rs1] %asi, $rs2, $rd", + []>; } // Predicates = [Is64Bit], Constraints = ... let Predicates = [Is64Bit] in { @@ -492,8 +475,11 @@ def : Pat<(i64 (atomic_load_64 ADDRrr:$src)), (LDXrr ADDRrr:$src)>; def : Pat<(i64 (atomic_load_64 ADDRri:$src)), (LDXri ADDRri:$src)>; // atomic_store_64 val, addr -> store val, addr -def : Pat<(atomic_store_64 ADDRrr:$dst, i64:$val), (STXrr ADDRrr:$dst, $val)>; -def : Pat<(atomic_store_64 ADDRri:$dst, i64:$val), (STXri ADDRri:$dst, $val)>; +def : Pat<(atomic_store_64 i64:$val, ADDRrr:$dst), (STXrr ADDRrr:$dst, $val)>; +def : Pat<(atomic_store_64 i64:$val, ADDRri:$dst), (STXri ADDRri:$dst, $val)>; + +def : Pat<(atomic_cmp_swap_64 i64:$rs1, i64:$rs2, i64:$swap), + (CASXArr $rs1, $rs2, $swap, 0x80)>; } // Predicates = [Is64Bit] @@ -504,25 +490,25 @@ let Predicates = [Is64Bit], hasSideEffects = 1, Uses = [ICC], cc = 0b10 in let Predicates = [Is64Bit] in { def : Pat<(SPhi tglobaladdr:$in), (SETHIi tglobaladdr:$in)>; -def : Pat<(SPlo tglobaladdr:$in), (ORXri (i64 G0), tglobaladdr:$in)>; +def : Pat<(SPlo tglobaladdr:$in), (ORri (i64 G0), tglobaladdr:$in)>; def : Pat<(SPhi tconstpool:$in), (SETHIi tconstpool:$in)>; -def : Pat<(SPlo tconstpool:$in), (ORXri (i64 G0), tconstpool:$in)>; +def : Pat<(SPlo tconstpool:$in), (ORri (i64 G0), tconstpool:$in)>; // GlobalTLS addresses def : Pat<(SPhi tglobaltlsaddr:$in), (SETHIi tglobaltlsaddr:$in)>; -def : Pat<(SPlo tglobaltlsaddr:$in), (ORXri (i64 G0), tglobaltlsaddr:$in)>; +def : Pat<(SPlo tglobaltlsaddr:$in), (ORri (i64 G0), tglobaltlsaddr:$in)>; def : Pat<(add (SPhi tglobaltlsaddr:$in1), (SPlo tglobaltlsaddr:$in2)), - (ADDXri (SETHIXi tglobaltlsaddr:$in1), (tglobaltlsaddr:$in2))>; + (ADDri (SETHIi tglobaltlsaddr:$in1), (tglobaltlsaddr:$in2))>; def : Pat<(xor (SPhi tglobaltlsaddr:$in1), (SPlo tglobaltlsaddr:$in2)), - (XORXri (SETHIXi tglobaltlsaddr:$in1), (tglobaltlsaddr:$in2))>; + (XORri (SETHIi tglobaltlsaddr:$in1), (tglobaltlsaddr:$in2))>; // Blockaddress def : Pat<(SPhi tblockaddress:$in), (SETHIi tblockaddress:$in)>; -def : Pat<(SPlo tblockaddress:$in), (ORXri (i64 G0), tblockaddress:$in)>; +def : Pat<(SPlo tblockaddress:$in), (ORri (i64 G0), tblockaddress:$in)>; // Add reg, lo. This is used when taking the addr of a global/constpool entry. -def : Pat<(add iPTR:$r, (SPlo tglobaladdr:$in)), (ADDXri $r, tglobaladdr:$in)>; -def : Pat<(add iPTR:$r, (SPlo tconstpool:$in)), (ADDXri $r, tconstpool:$in)>; +def : Pat<(add iPTR:$r, (SPlo tglobaladdr:$in)), (ADDri $r, tglobaladdr:$in)>; +def : Pat<(add iPTR:$r, (SPlo tconstpool:$in)), (ADDri $r, tconstpool:$in)>; def : Pat<(add iPTR:$r, (SPlo tblockaddress:$in)), - (ADDXri $r, tblockaddress:$in)>; + (ADDri $r, tblockaddress:$in)>; } |