diff options
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/Mips/MipsTargetMachine.cpp')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/Target/Mips/MipsTargetMachine.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/contrib/llvm-project/llvm/lib/Target/Mips/MipsTargetMachine.cpp index fe31ab91d0ea..074222836929 100644 --- a/contrib/llvm-project/llvm/lib/Target/Mips/MipsTargetMachine.cpp +++ b/contrib/llvm-project/llvm/lib/Target/Mips/MipsTargetMachine.cpp @@ -123,7 +123,7 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, const Triple &TT, const TargetOptions &Options, std::optional<Reloc::Model> RM, std::optional<CodeModel::Model> CM, - CodeGenOpt::Level OL, bool JIT, + CodeGenOptLevel OL, bool JIT, bool isLittle) : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, CPU, FS, Options, getEffectiveRelocModel(JIT, RM), @@ -152,7 +152,7 @@ MipsebTargetMachine::MipsebTargetMachine(const Target &T, const Triple &TT, const TargetOptions &Options, std::optional<Reloc::Model> RM, std::optional<CodeModel::Model> CM, - CodeGenOpt::Level OL, bool JIT) + CodeGenOptLevel OL, bool JIT) : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, false) {} void MipselTargetMachine::anchor() {} @@ -162,7 +162,7 @@ MipselTargetMachine::MipselTargetMachine(const Target &T, const Triple &TT, const TargetOptions &Options, std::optional<Reloc::Model> RM, std::optional<CodeModel::Model> CM, - CodeGenOpt::Level OL, bool JIT) + CodeGenOptLevel OL, bool JIT) : MipsTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} const MipsSubtarget * @@ -347,7 +347,7 @@ bool MipsPassConfig::addLegalizeMachineIR() { } void MipsPassConfig::addPreRegBankSelect() { - bool IsOptNone = getOptLevel() == CodeGenOpt::None; + bool IsOptNone = getOptLevel() == CodeGenOptLevel::None; addPass(createMipsPostLegalizeCombiner(IsOptNone)); } |