1 files changed, 68 insertions, 2 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp b/contrib/llvm-project/llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
index 146ef53befd5..bcbd4b28f3c7 100644
--- a/contrib/llvm-project/llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
+++ b/contrib/llvm-project/llvm/lib/Target/LoongArch/LoongArchInstrInfo.cpp
@@ -12,6 +12,7 @@
 
 #include "LoongArchInstrInfo.h"
 #include "LoongArch.h"
+#include "LoongArchMachineFunctionInfo.h"
 
 using namespace llvm;
 
@@ -19,8 +20,8 @@ using namespace llvm;
 #include "LoongArchGenInstrInfo.inc"
 
 LoongArchInstrInfo::LoongArchInstrInfo(LoongArchSubtarget &STI)
-    // FIXME: add CFSetup and CFDestroy Inst when we implement function call.
-    : LoongArchGenInstrInfo() {}
+    : LoongArchGenInstrInfo(LoongArch::ADJCALLSTACKDOWN,
+                            LoongArch::ADJCALLSTACKUP) {}
 
 void LoongArchInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
                                      MachineBasicBlock::iterator MBBI,
@@ -47,3 +48,68 @@ void LoongArchInstrInfo::copyPhysReg(MachineBasicBlock &MBB,
   BuildMI(MBB, MBBI, DL, get(Opc), DstReg)
       .addReg(SrcReg, getKillRegState(KillSrc));
 }
+
+void LoongArchInstrInfo::storeRegToStackSlot(
+    MachineBasicBlock &MBB, MachineBasicBlock::iterator I, Register SrcReg,
+    bool IsKill, int FI, const TargetRegisterClass *RC,
+    const TargetRegisterInfo *TRI) const {
+  DebugLoc DL;
+  if (I != MBB.end())
+    DL = I->getDebugLoc();
+  MachineFunction *MF = MBB.getParent();
+  MachineFrameInfo &MFI = MF->getFrameInfo();
+
+  unsigned Opcode;
+  if (LoongArch::GPRRegClass.hasSubClassEq(RC))
+    Opcode = TRI->getRegSizeInBits(LoongArch::GPRRegClass) == 32
+                 ? LoongArch::ST_W
+                 : LoongArch::ST_D;
+  else if (LoongArch::FPR32RegClass.hasSubClassEq(RC))
+    Opcode = LoongArch::FST_S;
+  else if (LoongArch::FPR64RegClass.hasSubClassEq(RC))
+    Opcode = LoongArch::FST_D;
+  else
+    llvm_unreachable("Can't store this register to stack slot");
+
+  MachineMemOperand *MMO = MF->getMachineMemOperand(
+      MachinePointerInfo::getFixedStack(*MF, FI), MachineMemOperand::MOStore,
+      MFI.getObjectSize(FI), MFI.getObjectAlign(FI));
+
+  BuildMI(MBB, I, DL, get(Opcode))
+      .addReg(SrcReg, getKillRegState(IsKill))
+      .addFrameIndex(FI)
+      .addImm(0)
+      .addMemOperand(MMO);
+}
+
+void LoongArchInstrInfo::loadRegFromStackSlot(
+    MachineBasicBlock &MBB, MachineBasicBlock::iterator I, Register DstReg,
+    int FI, const TargetRegisterClass *RC,
+    const TargetRegisterInfo *TRI) const {
+  DebugLoc DL;
+  if (I != MBB.end())
+    DL = I->getDebugLoc();
+  MachineFunction *MF = MBB.getParent();
+  MachineFrameInfo &MFI = MF->getFrameInfo();
+
+  unsigned Opcode;
+  if (LoongArch::GPRRegClass.hasSubClassEq(RC))
+    Opcode = TRI->getRegSizeInBits(LoongArch::GPRRegClass) == 32
+                 ? LoongArch::LD_W
+                 : LoongArch::LD_D;
+  else if (LoongArch::FPR32RegClass.hasSubClassEq(RC))
+    Opcode = LoongArch::FLD_S;
+  else if (LoongArch::FPR64RegClass.hasSubClassEq(RC))
+    Opcode = LoongArch::FLD_D;
+  else
+    llvm_unreachable("Can't load this register from stack slot");
+
+  MachineMemOperand *MMO = MF->getMachineMemOperand(
+      MachinePointerInfo::getFixedStack(*MF, FI), MachineMemOperand::MOLoad,
+      MFI.getObjectSize(FI), MFI.getObjectAlign(FI));
+
+  BuildMI(MBB, I, DL, get(Opcode), DstReg)
+      .addFrameIndex(FI)
+      .addImm(0)
+      .addMemOperand(MMO);
+}