diff options
Diffstat (limited to 'contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp')
| -rw-r--r-- | contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp b/contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp index 29c9b9ccf276..33c208495c50 100644 --- a/contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp +++ b/contrib/llvm-project/llvm/lib/Target/AMDGPU/GCNVOPDUtils.cpp @@ -103,7 +103,13 @@ bool llvm::checkVOPDRegConstraints(const SIInstrInfo &TII, return false; if ((UniqueLiterals.size() + UniqueScalarRegs.size()) > 2) return false; - if (InstInfo.hasInvalidOperand(getVRegIdx)) + + // On GFX12 if both OpX and OpY are V_MOV_B32 then OPY uses SRC2 source-cache. + bool SkipSrc = ST.getGeneration() >= AMDGPUSubtarget::GFX12 && + FirstMI.getOpcode() == AMDGPU::V_MOV_B32_e32 && + SecondMI.getOpcode() == AMDGPU::V_MOV_B32_e32; + + if (InstInfo.hasInvalidOperand(getVRegIdx, SkipSrc)) return false; LLVM_DEBUG(dbgs() << "VOPD Reg Constraints Passed\n\tX: " << FirstMI @@ -142,10 +148,10 @@ namespace { /// be turned into VOPD instructions /// Greedily pairs instruction candidates. O(n^2) algorithm. struct VOPDPairingMutation : ScheduleDAGMutation { - ShouldSchedulePredTy shouldScheduleAdjacent; // NOLINT: function pointer + MacroFusionPredTy shouldScheduleAdjacent; // NOLINT: function pointer VOPDPairingMutation( - ShouldSchedulePredTy shouldScheduleAdjacent) // NOLINT: function pointer + MacroFusionPredTy shouldScheduleAdjacent) // NOLINT: function pointer : shouldScheduleAdjacent(shouldScheduleAdjacent) {} void apply(ScheduleDAGInstrs *DAG) override { |