diff options
-rw-r--r-- | sys/conf/options.i386 | 1 | ||||
-rw-r--r-- | sys/i386/acpica/madt.c | 2 | ||||
-rw-r--r-- | sys/i386/i386/io_apic.c | 97 | ||||
-rw-r--r-- | sys/i386/i386/machdep.c | 5 | ||||
-rw-r--r-- | sys/i386/i386/mptable.c | 1 | ||||
-rw-r--r-- | sys/i386/include/apicvar.h | 1 |
6 files changed, 8 insertions, 99 deletions
diff --git a/sys/conf/options.i386 b/sys/conf/options.i386 index 5720b841a247..a1dfee63797d 100644 --- a/sys/conf/options.i386 +++ b/sys/conf/options.i386 @@ -9,7 +9,6 @@ DISABLE_PSE opt_pmap.h I586_PMC_GUPROF opt_i586_guprof.h MAXMEM MPTABLE_FORCE_HTT -NO_MIXED_MODE PERFMON PMAP_SHPGPERPROC opt_pmap.h POWERFAIL_NMI opt_trap.h diff --git a/sys/i386/acpica/madt.c b/sys/i386/acpica/madt.c index 22598e0f52bd..e1f20c0e2bbb 100644 --- a/sys/i386/acpica/madt.c +++ b/sys/i386/acpica/madt.c @@ -367,8 +367,6 @@ madt_setup_io(void) } /* First, we run through adding I/O APIC's. */ - if (madt->PCATCompat && !(acpi_quirks & ACPI_Q_MADT_IRQ0)) - ioapic_enable_mixed_mode(); madt_walk_table(madt_parse_apics, NULL); /* Second, we run through the table tweaking interrupt sources. */ diff --git a/sys/i386/i386/io_apic.c b/sys/i386/i386/io_apic.c index 770832b546ed..c7f1bbba1181 100644 --- a/sys/i386/i386/io_apic.c +++ b/sys/i386/i386/io_apic.c @@ -31,7 +31,6 @@ __FBSDID("$FreeBSD$"); #include "opt_isa.h" -#include "opt_no_mixed_mode.h" #include <sys/param.h> #include <sys/systm.h> @@ -61,7 +60,6 @@ __FBSDID("$FreeBSD$"); #define VECTOR_DISABLED 255 #define DEST_NONE -1 -#define DEST_EXTINT -2 #define TODO printf("%s: not implemented!\n", __func__) @@ -82,15 +80,6 @@ static MALLOC_DEFINE(M_IOAPIC, "I/O APIC", "I/O APIC structures"); * IO APIC has a contiguous chunk of the System Interrupt address space. */ -/* - * Direct the ExtINT pin on the first I/O APIC to a logical cluster of - * CPUs rather than a physical destination of just the BSP. - * - * Note: This is disabled by default as test systems seem to croak with it - * enabled. -#define ENABLE_EXTINT_LOGICAL_DESTINATION - */ - struct ioapic_intsrc { struct intsrc io_intsrc; u_int io_intpin:8; @@ -129,7 +118,6 @@ static void ioapic_suspend(struct intsrc *isrc); static void ioapic_resume(struct intsrc *isrc); static void ioapic_program_destination(struct ioapic_intsrc *intpin); static void ioapic_program_intpin(struct ioapic_intsrc *intpin); -static void ioapic_setup_mixed_mode(struct ioapic_intsrc *intpin); static STAILQ_HEAD(,ioapic) ioapic_list = STAILQ_HEAD_INITIALIZER(ioapic_list); struct pic ioapic_template = { ioapic_enable_source, ioapic_disable_source, @@ -139,13 +127,7 @@ struct pic ioapic_template = { ioapic_enable_source, ioapic_disable_source, ioapic_config_intr }; static int bsp_id, current_cluster, logical_clusters, next_ioapic_base; -static u_int mixed_mode_enabled, next_id, program_logical_dest; -#ifdef NO_MIXED_MODE -static int mixed_mode_active = 0; -#else -static int mixed_mode_active = 1; -#endif -TUNABLE_INT("hw.apic.mixed_mode", &mixed_mode_active); +static u_int next_id, program_logical_dest; static __inline void _ioapic_eoi_source(struct intsrc *isrc) @@ -269,12 +251,8 @@ ioapic_program_intpin(struct ioapic_intsrc *intpin) struct ioapic *io = (struct ioapic *)intpin->io_intsrc.is_pic; uint32_t low, high, value; - /* - * For pins routed via mixed mode or disabled, just ensure that - * they are masked. - */ - if (intpin->io_dest == DEST_EXTINT || - intpin->io_vector == VECTOR_DISABLED) { + /* For disabled pins, just ensure that they are masked. */ + if (intpin->io_vector == VECTOR_DISABLED) { low = ioapic_read(io->io_addr, IOAPIC_REDTBL_LO(intpin->io_intpin)); if ((low & IOART_INTMASK) == IOART_INTMCLR) @@ -345,8 +323,6 @@ ioapic_program_destination(struct ioapic_intsrc *intpin) KASSERT(intpin->io_dest != DEST_NONE, ("intpin not assigned to a cluster")); - KASSERT(intpin->io_dest != DEST_EXTINT, - ("intpin routed via ExtINT")); if (bootverbose) { printf("ioapic%u: routing intpin %u (", io->io_id, intpin->io_intpin); @@ -382,8 +358,6 @@ ioapic_enable_intr(struct intsrc *isrc) { struct ioapic_intsrc *intpin = (struct ioapic_intsrc *)isrc; - KASSERT(intpin->io_dest != DEST_EXTINT, - ("ExtINT pin trying to use ioapic enable_intr method")); if (intpin->io_dest == DEST_NONE) { ioapic_assign_cluster(intpin); lapic_enable_intr(intpin->io_vector); @@ -464,17 +438,6 @@ ioapic_resume(struct intsrc *isrc) } /* - * APIC enumerators call this function to indicate that the 8259A AT PICs - * are available and that mixed mode can be used. - */ -void -ioapic_enable_mixed_mode(void) -{ - - mixed_mode_enabled = 1; -} - -/* * Allocate and return a logical cluster ID. Note that the first time * this is called, it returns cluster 0. ioapic_enable_intr() treats * the two cases of logical_clusters == 0 and logical_clusters == 1 the @@ -555,12 +518,11 @@ ioapic_create(uintptr_t addr, int32_t apic_id, int intbase) intpin->io_vector = intbase + i; /* - * Assume that pin 0 on the first I/O APIC is an ExtINT pin - * if mixed mode is enabled and an ISA interrupt if not. + * Assume that pin 0 on the first I/O APIC is an ExtINT pin. * Assume that pins 1-15 are ISA interrupts and that all * other pins are PCI interrupts. */ - if (intpin->io_vector == 0 && mixed_mode_enabled) + if (intpin->io_vector == 0) ioapic_set_extint(io, i); else if (intpin->io_vector < IOAPIC_ISA_INTS) { intpin->io_bus = APIC_BUS_ISA; @@ -718,12 +680,7 @@ ioapic_set_extint(void *cookie, u_int pin) return (EINVAL); io->io_pins[pin].io_bus = APIC_BUS_UNKNOWN; io->io_pins[pin].io_vector = VECTOR_EXTINT; - - /* Enable this pin if mixed mode is available and active. */ - if (mixed_mode_enabled && mixed_mode_active) - io->io_pins[pin].io_masked = 0; - else - io->io_pins[pin].io_masked = 1; + io->io_pins[pin].io_masked = 1; io->io_pins[pin].io_edgetrigger = 1; io->io_pins[pin].io_activehi = 1; if (bootverbose) @@ -798,15 +755,7 @@ ioapic_register(void *cookie) ioapic_program_intpin(pin); if (pin->io_vector >= NUM_IO_INTS) continue; - /* - * Route IRQ0 via the 8259A using mixed mode if mixed mode - * is available and turned on. - */ - if (pin->io_vector == 0 && mixed_mode_active && - mixed_mode_enabled) - ioapic_setup_mixed_mode(pin); - else - intr_register_source(&pin->io_intsrc); + intr_register_source(&pin->io_intsrc); } } @@ -823,38 +772,8 @@ ioapic_set_logical_destinations(void *arg __unused) program_logical_dest = 1; STAILQ_FOREACH(io, &ioapic_list, io_next) for (i = 0; i < io->io_numintr; i++) - if (io->io_pins[i].io_dest != DEST_NONE && - io->io_pins[i].io_dest != DEST_EXTINT) + if (io->io_pins[i].io_dest != DEST_NONE) ioapic_program_destination(&io->io_pins[i]); } SYSINIT(ioapic_destinations, SI_SUB_SMP, SI_ORDER_SECOND, ioapic_set_logical_destinations, NULL) - -/* - * Support for mixed-mode interrupt sources. These sources route an ISA - * IRQ through the 8259A's via the ExtINT on pin 0 of the I/O APIC that - * routes the ISA interrupts. We just ignore the intpins that use this - * mode and allow the atpic driver to register its interrupt source for - * that IRQ instead. - */ - -static void -ioapic_setup_mixed_mode(struct ioapic_intsrc *intpin) -{ - struct ioapic_intsrc *extint; - struct ioapic *io; - - /* - * Mark the associated I/O APIC intpin as being delivered via - * ExtINT and enable the ExtINT pin on the I/O APIC if needed. - */ - intpin->io_dest = DEST_EXTINT; - io = (struct ioapic *)intpin->io_intsrc.is_pic; - extint = &io->io_pins[0]; - if (extint->io_vector != VECTOR_EXTINT) - panic("Can't find ExtINT pin to route through!"); -#ifdef ENABLE_EXTINT_LOGICAL_DESTINATION - if (extint->io_dest == DEST_NONE) - ioapic_assign_cluster(extint); -#endif -} diff --git a/sys/i386/i386/machdep.c b/sys/i386/i386/machdep.c index 40d88b4a8c7f..adbf5bf022a4 100644 --- a/sys/i386/i386/machdep.c +++ b/sys/i386/i386/machdep.c @@ -2886,11 +2886,6 @@ ioapic_disable_pin(void *cookie, u_int pin) return (ENXIO); } -void -ioapic_enable_mixed_mode(void) -{ -} - int ioapic_get_vector(void *cookie, u_int pin) { diff --git a/sys/i386/i386/mptable.c b/sys/i386/i386/mptable.c index 1cc2573d2b7f..cffeb1c6244d 100644 --- a/sys/i386/i386/mptable.c +++ b/sys/i386/i386/mptable.c @@ -353,7 +353,6 @@ mptable_setup_io(void) busses[i].bus_type = NOBUS; /* Second, we run through adding I/O APIC's and busses. */ - ioapic_enable_mixed_mode(); mptable_parse_apics_and_busses(); /* Third, we run through the table tweaking interrupt sources. */ diff --git a/sys/i386/include/apicvar.h b/sys/i386/include/apicvar.h index d4af36b7d786..1beb025bf255 100644 --- a/sys/i386/include/apicvar.h +++ b/sys/i386/include/apicvar.h @@ -176,7 +176,6 @@ u_int apic_idt_to_irq(u_int vector); void apic_register_enumerator(struct apic_enumerator *enumerator); void *ioapic_create(uintptr_t addr, int32_t id, int intbase); int ioapic_disable_pin(void *cookie, u_int pin); -void ioapic_enable_mixed_mode(void); int ioapic_get_vector(void *cookie, u_int pin); int ioapic_next_logical_cluster(void); void ioapic_register(void *cookie); |