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| author | Ed Maste <emaste@FreeBSD.org> | 2018-05-12 15:34:35 +0000 |
|---|---|---|
| committer | Ed Maste <emaste@FreeBSD.org> | 2018-05-12 15:34:35 +0000 |
| commit | 09e24fbe184ce8416d467bd2dd7ef246fa09897c (patch) | |
| tree | 2caaeea92c92d5cab02ba3a055cb3fe7fec20307 /usr.sbin/cpucontrol | |
| parent | 0fb349906ef68608577702ca46e86aafdd7456b2 (diff) | |
| download | src-09e24fbe184ce8416d467bd2dd7ef246fa09897c.tar.gz src-09e24fbe184ce8416d467bd2dd7ef246fa09897c.zip | |
cpucontrol: improve Intel microcode revision check
According to the Intel SDM (Volme 3, 9.11.7) the BIOS signature MSR
should be zeroed before executing cpuid (although in practice it does
not seem to matter).
PR: 192487
Submitted by: Dan Lukes
Reported by: Henrique de Moraes Holschuh
MFC after: 3 days
Notes
Notes:
svn path=/head/; revision=333569
Diffstat (limited to 'usr.sbin/cpucontrol')
| -rw-r--r-- | usr.sbin/cpucontrol/intel.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/usr.sbin/cpucontrol/intel.c b/usr.sbin/cpucontrol/intel.c index 7eca224e1ee7..8ad1908bd386 100644 --- a/usr.sbin/cpucontrol/intel.c +++ b/usr.sbin/cpucontrol/intel.c @@ -95,7 +95,8 @@ intel_update(const char *dev, const char *path) void *fw_data; size_t data_size, total_size; cpuctl_msr_args_t msrargs = { - .msr = MSR_IA32_PLATFORM_ID, + .msr = MSR_BIOS_SIGN, + .data = 0, }; cpuctl_cpuid_args_t idargs = { .level = 1, /* Signature. */ @@ -115,12 +116,18 @@ intel_update(const char *dev, const char *path) WARN(0, "could not open %s for writing", dev); return; } + error = ioctl(devfd, CPUCTL_WRMSR, &msrargs); + if (error < 0) { + WARN(0, "ioctl(%s)", dev); + goto fail; + } error = ioctl(devfd, CPUCTL_CPUID, &idargs); if (error < 0) { WARN(0, "ioctl(%s)", dev); goto fail; } signature = idargs.data[0]; + msrargs.msr = MSR_IA32_PLATFORM_ID; error = ioctl(devfd, CPUCTL_RDMSR, &msrargs); if (error < 0) { WARN(0, "ioctl(%s)", dev); |