diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2017-04-16 16:01:22 +0000 |
---|---|---|
committer | Dimitry Andric <dim@FreeBSD.org> | 2017-04-16 16:01:22 +0000 |
commit | 71d5a2540a98c81f5bcaeb48805e0e2881f530ef (patch) | |
tree | 5343938942df402b49ec7300a1c25a2d4ccd5821 /test/CodeGen/AMDGPU/fadd.ll | |
parent | 31bbf64f3a4974a2d6c8b3b27ad2f519caf74057 (diff) | |
download | src-71d5a2540a98c81f5bcaeb48805e0e2881f530ef.tar.gz src-71d5a2540a98c81f5bcaeb48805e0e2881f530ef.zip |
Vendor import of llvm trunk r300422:vendor/llvm/llvm-trunk-r300422
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=317017
svn path=/vendor/llvm/llvm-trunk-r300422/; revision=317018; tag=vendor/llvm/llvm-trunk-r300422
Diffstat (limited to 'test/CodeGen/AMDGPU/fadd.ll')
-rw-r--r-- | test/CodeGen/AMDGPU/fadd.ll | 19 |
1 files changed, 15 insertions, 4 deletions
diff --git a/test/CodeGen/AMDGPU/fadd.ll b/test/CodeGen/AMDGPU/fadd.ll index 0f683f7bfa23..621a0de281db 100644 --- a/test/CodeGen/AMDGPU/fadd.ll +++ b/test/CodeGen/AMDGPU/fadd.ll @@ -5,7 +5,7 @@ ; FUNC-LABEL: {{^}}fadd_f32: ; R600: ADD {{\** *}}T{{[0-9]+\.[XYZW]}}, KC0[2].Z, KC0[2].W ; SI: v_add_f32 -define void @fadd_f32(float addrspace(1)* %out, float %a, float %b) { +define amdgpu_kernel void @fadd_f32(float addrspace(1)* %out, float %a, float %b) #0 { %add = fadd float %a, %b store float %add, float addrspace(1)* %out, align 4 ret void @@ -16,7 +16,7 @@ define void @fadd_f32(float addrspace(1)* %out, float %a, float %b) { ; R600-DAG: ADD {{\** *}}T{{[0-9]\.[XYZW]}}, KC0[2].W, KC0[3].Y ; SI: v_add_f32 ; SI: v_add_f32 -define void @fadd_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %a, <2 x float> %b) { +define amdgpu_kernel void @fadd_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %a, <2 x float> %b) #0 { %add = fadd <2 x float> %a, %b store <2 x float> %add, <2 x float> addrspace(1)* %out, align 8 ret void @@ -31,7 +31,7 @@ define void @fadd_v2f32(<2 x float> addrspace(1)* %out, <2 x float> %a, <2 x flo ; SI: v_add_f32 ; SI: v_add_f32 ; SI: v_add_f32 -define void @fadd_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) { +define amdgpu_kernel void @fadd_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1)* %in) #0 { %b_ptr = getelementptr <4 x float>, <4 x float> addrspace(1)* %in, i32 1 %a = load <4 x float>, <4 x float> addrspace(1)* %in, align 16 %b = load <4 x float>, <4 x float> addrspace(1)* %b_ptr, align 16 @@ -57,8 +57,19 @@ define void @fadd_v4f32(<4 x float> addrspace(1)* %out, <4 x float> addrspace(1) ; SI: v_add_f32 ; SI: v_add_f32 ; SI: v_add_f32 -define void @fadd_v8f32(<8 x float> addrspace(1)* %out, <8 x float> %a, <8 x float> %b) { +define amdgpu_kernel void @fadd_v8f32(<8 x float> addrspace(1)* %out, <8 x float> %a, <8 x float> %b) #0 { %add = fadd <8 x float> %a, %b store <8 x float> %add, <8 x float> addrspace(1)* %out, align 32 ret void } + +; FUNC-LABEL: {{^}}fadd_0_nsz_attr_f32: +; SI-NOT: v_add_f32 +define amdgpu_kernel void @fadd_0_nsz_attr_f32(float addrspace(1)* %out, float %a) #1 { + %add = fadd float %a, 0.0 + store float %add, float addrspace(1)* %out, align 4 + ret void +} + +attributes #0 = { nounwind } +attributes #1 = { nounwind "no-signed-zeros-fp-math"="true" }
\ No newline at end of file |