diff options
author | Doug Rabson <dfr@FreeBSD.org> | 2000-09-29 15:41:43 +0000 |
---|---|---|
committer | Doug Rabson <dfr@FreeBSD.org> | 2000-09-29 15:41:43 +0000 |
commit | b7da7f63eb3caab5a37f9faaa0114b7896db693e (patch) | |
tree | d447fe4f3736f333afaf8e051899a619d38d289b /sys | |
parent | 75f10fcd78f054056de9aa29ef1af0bc14eef6c8 (diff) | |
download | src-b7da7f63eb3caab5a37f9faaa0114b7896db693e.tar.gz src-b7da7f63eb3caab5a37f9faaa0114b7896db693e.zip |
Use write-back instead of write-combining for region 7.
Notes
Notes:
svn path=/head/; revision=66460
Diffstat (limited to 'sys')
-rw-r--r-- | sys/ia64/ia64/exception.S | 4 | ||||
-rw-r--r-- | sys/ia64/ia64/exception.s | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/sys/ia64/ia64/exception.S b/sys/ia64/ia64/exception.S index 0f06ef09703f..14a303e43925 100644 --- a/sys/ia64/ia64/exception.S +++ b/sys/ia64/ia64/exception.S @@ -203,7 +203,7 @@ ia64_vector_table: ;; cmp.eq p1,p2=7,r17 // RR7->p1, RR6->p2 ;; -(p1) movl r17=PTE_P+PTE_MA_WC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RX +(p1) movl r17=PTE_P+PTE_MA_WB+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RX (p2) movl r17=PTE_P+PTE_MA_UC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RX ;; dep r16=0,r16,50,14 // clear bits above PPN @@ -226,7 +226,7 @@ ia64_vector_table: ;; cmp.eq p1,p2=7,r17 // RR7->p1, RR6->p2 ;; -(p1) movl r17=PTE_P+PTE_MA_WC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RW +(p1) movl r17=PTE_P+PTE_MA_WB+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RW (p2) movl r17=PTE_P+PTE_MA_UC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RW ;; dep r16=0,r16,50,14 // clear bits above PPN diff --git a/sys/ia64/ia64/exception.s b/sys/ia64/ia64/exception.s index 0f06ef09703f..14a303e43925 100644 --- a/sys/ia64/ia64/exception.s +++ b/sys/ia64/ia64/exception.s @@ -203,7 +203,7 @@ ia64_vector_table: ;; cmp.eq p1,p2=7,r17 // RR7->p1, RR6->p2 ;; -(p1) movl r17=PTE_P+PTE_MA_WC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RX +(p1) movl r17=PTE_P+PTE_MA_WB+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RX (p2) movl r17=PTE_P+PTE_MA_UC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RX ;; dep r16=0,r16,50,14 // clear bits above PPN @@ -226,7 +226,7 @@ ia64_vector_table: ;; cmp.eq p1,p2=7,r17 // RR7->p1, RR6->p2 ;; -(p1) movl r17=PTE_P+PTE_MA_WC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RW +(p1) movl r17=PTE_P+PTE_MA_WB+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RW (p2) movl r17=PTE_P+PTE_MA_UC+PTE_A+PTE_D+PTE_PL_KERN+PTE_AR_RW ;; dep r16=0,r16,50,14 // clear bits above PPN |