diff options
author | Søren Schmidt <sos@FreeBSD.org> | 1996-06-03 19:37:38 +0000 |
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committer | Søren Schmidt <sos@FreeBSD.org> | 1996-06-03 19:37:38 +0000 |
commit | 70013b57390c2add9bb029d325171ecb3cff1b71 (patch) | |
tree | cf67a9bb983f45b4110427443a205b9cf79e53c5 /sys | |
parent | 588c92252f4485641de3f9f1fc84e97e43e825fa (diff) | |
download | src-70013b57390c2add9bb029d325171ecb3cff1b71.tar.gz src-70013b57390c2add9bb029d325171ecb3cff1b71.zip |
Added missing CR0_NW define for Cyrix 486DLC support. It's still not
stable on my hardware, but its better... *sigh*
Obtained from: NetBSD
Notes
Notes:
svn path=/head/; revision=16100
Diffstat (limited to 'sys')
-rw-r--r-- | sys/amd64/include/specialreg.h | 4 | ||||
-rw-r--r-- | sys/i386/include/specialreg.h | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/sys/amd64/include/specialreg.h b/sys/amd64/include/specialreg.h index c5035499ee0f..9c62438153b3 100644 --- a/sys/amd64/include/specialreg.h +++ b/sys/amd64/include/specialreg.h @@ -31,7 +31,7 @@ * SUCH DAMAGE. * * from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91 - * $Id: specialreg.h,v 1.7 1995/05/30 08:00:54 rgrimes Exp $ + * $Id: specialreg.h,v 1.8 1996/01/30 22:55:06 mpp Exp $ */ #ifndef _MACHINE_SPECIALREG_H_ @@ -57,6 +57,8 @@ #define CR0_NE 0x00000020 /* Numeric Error enable (EX16 vs IRQ13) */ #define CR0_WP 0x00010000 /* Write Protect (honor page protect in all modes) */ #define CR0_AM 0x00040000 /* Alignment Mask (set to enable AC flag) */ +#define CR0_NW 0x20000000 /* Not Write-through */ +#define CR0_CD 0x40000000 /* Cache Disable */ /* * Cyrix 486 DLC special registers, accessible as IO ports. diff --git a/sys/i386/include/specialreg.h b/sys/i386/include/specialreg.h index c5035499ee0f..9c62438153b3 100644 --- a/sys/i386/include/specialreg.h +++ b/sys/i386/include/specialreg.h @@ -31,7 +31,7 @@ * SUCH DAMAGE. * * from: @(#)specialreg.h 7.1 (Berkeley) 5/9/91 - * $Id: specialreg.h,v 1.7 1995/05/30 08:00:54 rgrimes Exp $ + * $Id: specialreg.h,v 1.8 1996/01/30 22:55:06 mpp Exp $ */ #ifndef _MACHINE_SPECIALREG_H_ @@ -57,6 +57,8 @@ #define CR0_NE 0x00000020 /* Numeric Error enable (EX16 vs IRQ13) */ #define CR0_WP 0x00010000 /* Write Protect (honor page protect in all modes) */ #define CR0_AM 0x00040000 /* Alignment Mask (set to enable AC flag) */ +#define CR0_NW 0x20000000 /* Not Write-through */ +#define CR0_CD 0x40000000 /* Cache Disable */ /* * Cyrix 486 DLC special registers, accessible as IO ports. |