A couple of chip errata work-arounds refined:

- When used on a 33MHz PCI BUS, the 53C1010-66 revision 0
  requires extra clocks to be inserted in data out phase.
  Revision 1 is fixed.
- The 53C1010-33 revision 1 requires internal cycles to be
  disabled due to possible contentions on IO registers.
  Revision 2 is fixed.
Fix:
- The probing of HVD from GPIO3 bit by the driver was reversed.
  The driver could misprobe the bus mode of a 825 or 875 chip
  that was not previously initialized (no BIOS for example).

1 files changed, 3 insertions, 3 deletions

diff --git a/sys/dev/sym/sym_hipd.c b/sys/dev/sym/sym_hipd.c
index fb7135985dcd..bd9d9dbcad9a 100644
--- a/sys/dev/sym/sym_hipd.c
+++ b/sys/dev/sym/sym_hipd.c
@@ -2071,7 +2071,7 @@ sym_fw2_patch(hcb_p np)
 	 *  they are not desirable. See `sym_fw2.h' for more details.
 	 */
 	if (!(np->device_id == PCI_ID_LSI53C1010_2 &&
-	      /* np->revision_id < 0xff */ 1 &&
+	      np->revision_id < 0x1 &&
 	      np->pciclk_khz < 60000)) {
 		scripta0->datao_phase[0] = cpu_to_scr(SCR_NO_OP);
 		scripta0->datao_phase[1] = cpu_to_scr(0);
@@ -2802,7 +2802,7 @@ static int sym_prepare_setting(hcb_p np, struct sym_nvram *nvram)
 	 *  are used. Disable internal cycles.
 	 */
 	if (np->device_id == PCI_ID_LSI53C1010 &&
-	    /* np->revision_id < 0xff */ 1)
+	    np->revision_id < 0x2)
 		np->rv_ccntl0	|=  DILS;
 
 	/*
@@ -2902,7 +2902,7 @@ static int sym_prepare_setting(hcb_p np, struct sym_nvram *nvram)
 					np->scsi_mode = SMODE_HVD;
 			}
 			else if (nvram->type == SYM_SYMBIOS_NVRAM) {
-				if (INB(nc_gpreg) & 0x08)
+				if (!(INB(nc_gpreg) & 0x08))
 					np->scsi_mode = SMODE_HVD;
 			}
 		}