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| author | Pyun YongHyeon <yongari@FreeBSD.org> | 2008-04-15 00:46:15 +0000 |
|---|---|---|
| committer | Pyun YongHyeon <yongari@FreeBSD.org> | 2008-04-15 00:46:15 +0000 |
| commit | 339a44fb62595ffeb01a0a2d2f2ca87942038fb4 (patch) | |
| tree | c4578b78a0a9b0df4e86b3261762ba71f1f15b93 /sys | |
| parent | 23080c0bd31b7b8b431ed18e2d10a3ad2af9490d (diff) | |
| download | src-339a44fb62595ffeb01a0a2d2f2ca87942038fb4.tar.gz src-339a44fb62595ffeb01a0a2d2f2ca87942038fb4.zip | |
Don't touch MSI enable bit in RL_CFG2 register. For unknown reason
clearing MSI enable bit for MSI capable hardwares resulted in Tx
problems. MSI enable bit is set only when MSI is requested from
user.
Tested by: remko
Notes
Notes:
svn path=/head/; revision=178207
Diffstat (limited to 'sys')
| -rw-r--r-- | sys/dev/re/if_re.c | 18 |
1 files changed, 6 insertions, 12 deletions
diff --git a/sys/dev/re/if_re.c b/sys/dev/re/if_re.c index d81e4d664437..2b0ef3a46503 100644 --- a/sys/dev/re/if_re.c +++ b/sys/dev/re/if_re.c @@ -1185,23 +1185,17 @@ re_attach(dev) device_printf(dev, "Using %d MSI messages\n", msic); sc->rl_msi = 1; + /* Explicitly set MSI enable bit. */ + CSR_WRITE_1(sc, RL_EECMD, RL_EE_MODE); + cfg = CSR_READ_1(sc, RL_CFG2); + cfg |= RL_CFG2_MSI; + CSR_WRITE_1(sc, RL_CFG2, cfg); + CSR_WRITE_1(sc, RL_EECMD, 0); } else pci_release_msi(dev); } } - /* For MSI capable hardwares, explicitily set/clear MSI enable bit. */ - if (msic != 0) { - CSR_WRITE_1(sc, RL_EECMD, RL_EE_MODE); - cfg = CSR_READ_1(sc, RL_CFG2); - if (sc->rl_msi != 0) - cfg |= RL_CFG2_MSI; - else - cfg &= ~RL_CFG2_MSI; - CSR_WRITE_1(sc, RL_CFG2, cfg); - CSR_WRITE_1(sc, RL_EECMD, 0); - } - /* Allocate interrupt */ if (sc->rl_msi == 0) { rid = 0; |