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authorMarcel Moolenaar <marcel@FreeBSD.org>2007-06-09 21:55:17 +0000
committerMarcel Moolenaar <marcel@FreeBSD.org>2007-06-09 21:55:17 +0000
commit01bd17cc99b1927537115fc76d3b332406a11b1d (patch)
treea56b45624c5012a67b32e122f42c41c6b2e7d8a4 /sys/sparc64/include/kdb.h
parenta1fe14bc333c7b2b9886a7cdd7d78677e0a01413 (diff)
downloadsrc-01bd17cc99b1927537115fc76d3b332406a11b1d.tar.gz
src-01bd17cc99b1927537115fc76d3b332406a11b1d.zip
Add kdb_cpu_sync_icache(), intended to synchronize instruction
caches with data caches after writing to memory. This typically is required to make breakpoints work on ia64 and powerpc. For those architectures the function is implemented.
Notes
Notes: svn path=/head/; revision=170473
Diffstat (limited to 'sys/sparc64/include/kdb.h')
-rw-r--r--sys/sparc64/include/kdb.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/sys/sparc64/include/kdb.h b/sys/sparc64/include/kdb.h
index 3e510e02c496..02ce4e703b1e 100644
--- a/sys/sparc64/include/kdb.h
+++ b/sys/sparc64/include/kdb.h
@@ -44,6 +44,11 @@ kdb_cpu_set_singlestep(void)
}
static __inline void
+kdb_cpu_sync_icache(unsigned char *addr, size_t size)
+{
+}
+
+static __inline void
kdb_cpu_trap(int vector, int _)
{
flushw();