Add support for symmetric multiprocessing (SMP).

Tested on Spike simulator with 2 and 16 cores (tlb enabled),
so set MAXCPU to 16 at this time.

This uses FDT data to get information about CPUs
(code based on arm64 mp_machdep).

Invalidate entire TLB cache as it is the only way yet.

Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5

5 files changed, 99 insertions, 12 deletions

diff --git a/sys/riscv/include/intr.h b/sys/riscv/include/intr.h
index 569f7c94a352..57d5e5db1b25 100644
--- a/sys/riscv/include/intr.h
+++ b/sys/riscv/include/intr.h
@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * Copyright (c) 2015-2016 Ruslan Bukin <br@bsdpad.com>
  * All rights reserved.
  *
  * Portions of this software were developed by SRI International and the
@@ -51,4 +51,16 @@ typedef unsigned long * riscv_intrcnt_t;
 riscv_intrcnt_t riscv_intrcnt_create(const char *);
 void riscv_intrcnt_setname(riscv_intrcnt_t, const char *);
 
+#ifdef SMP
+void riscv_setup_ipihandler(driver_filter_t *);
+void riscv_unmask_ipi(void);
+#endif
+
+enum {
+	IRQ_SOFTWARE,
+	IRQ_TIMER,
+	IRQ_HTIF,
+	NIRQS
+};
+
 #endif /* !_MACHINE_INTR_MACHDEP_H_ */
diff --git a/sys/riscv/include/param.h b/sys/riscv/include/param.h
index 2c80058a0a28..f22e747ffdcc 100644
--- a/sys/riscv/include/param.h
+++ b/sys/riscv/include/param.h
@@ -51,7 +51,7 @@
 
 #if defined(SMP) || defined(KLD_MODULE)
 #ifndef MAXCPU
-#define	MAXCPU		2
+#define	MAXCPU		16
 #endif
 #else
 #define	MAXCPU		1
diff --git a/sys/riscv/include/pcpu.h b/sys/riscv/include/pcpu.h
index 7dfe23d991bf..8dacc4a5f603 100644
--- a/sys/riscv/include/pcpu.h
+++ b/sys/riscv/include/pcpu.h
@@ -1,7 +1,16 @@
 /*-
  * Copyright (c) 1999 Luoqi Chen <luoqi@freebsd.org>
+ * Copyright (c) 2015-2016 Ruslan Bukin <br@bsdpad.com>
  * All rights reserved.
  *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
  * Redistribution and use in source and binary forms, with or without
  * modification, are permitted provided that the following conditions
  * are met:
@@ -36,7 +45,10 @@
 #define	ALT_STACK_SIZE	128
 
 #define	PCPU_MD_FIELDS							\
-	char __pad[129]
+	uint32_t pc_pending_ipis;	/* IPIs pending to this CPU */	\
+	uint64_t pc_sptbr;		/* L0 page table base (VA) */	\
+	uint64_t pc_reg;		/* CPU MMIO base (PA) */	\
+	char __pad[109]
 
 #ifdef _KERNEL
 
diff --git a/sys/riscv/include/riscvreg.h b/sys/riscv/include/riscvreg.h
index 3f93428bff8c..76cba49a746b 100644
--- a/sys/riscv/include/riscvreg.h
+++ b/sys/riscv/include/riscvreg.h
@@ -1,5 +1,5 @@
 /*-
- * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com>
+ * Copyright (c) 2015-2016 Ruslan Bukin <br@bsdpad.com>
  * All rights reserved.
  *
  * Portions of this software were developed by SRI International and the
@@ -38,12 +38,16 @@
 #define	_MACHINE_RISCVREG_H_
 
 /* Machine mode requests */
-#define	ECALL_MTIMECMP		0x1
-#define	ECALL_CLEAR_PENDING	0x2
-#define	ECALL_HTIF_CMD		0x3
-#define	ECALL_HTIF_GET_ENTRY	0x4
-#define	ECALL_MCPUID_GET	0x5
-#define	ECALL_MIMPID_GET	0x6
+#define	ECALL_MTIMECMP		0x01
+#define	ECALL_CLEAR_PENDING	0x02
+#define	ECALL_HTIF_CMD		0x03
+#define	ECALL_HTIF_GET_ENTRY	0x04
+#define	ECALL_MCPUID_GET	0x05
+#define	ECALL_MIMPID_GET	0x06
+#define	ECALL_SEND_IPI		0x07
+#define	ECALL_CLEAR_IPI		0x08
+#define	ECALL_HTIF_LOWPUTC	0x09
+#define	ECALL_MIE_SET		0x10
 
 #define	EXCP_SHIFT			0
 #define	EXCP_MASK			(0xf << EXCP_SHIFT)
@@ -109,9 +113,14 @@
 #define	SIE_SSIE	(1 << 1)
 #define	SIE_STIE	(1 << 5)
 
-/* Note: sip register is not yet implement in Spike simulator */
+/* Note: sip register has no SIP_STIP bit in Spike simulator */
+#define	SIP_SSIP	(1 << 1)
 #define	SIP_STIP	(1 << 5)
 
+#define	NCSRS	4096
+#define	CSR_IPI	0x783
+#define	XLEN	8
+
 #define	CSR_ZIMM(val)							\
 	(__builtin_constant_p(val) && ((u_long)(val) < 32))
 
diff --git a/sys/riscv/include/smp.h b/sys/riscv/include/smp.h
index da23dbe43a4f..52bdf64da27b 100644
--- a/sys/riscv/include/smp.h
+++ b/sys/riscv/include/smp.h
@@ -1 +1,55 @@
-/* $FreeBSD$ */
+/*-
+ * Copyright (c) 2016 Ruslan Bukin <br@bsdpad.com>
+ * All rights reserved.
+ *
+ * Portions of this software were developed by SRI International and the
+ * University of Cambridge Computer Laboratory under DARPA/AFRL contract
+ * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
+ *
+ * Portions of this software were developed by the University of Cambridge
+ * Computer Laboratory as part of the CTSRD Project, with support from the
+ * UK Higher Education Innovation Fund (HEIF).
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef	_MACHINE_SMP_H_
+#define	_MACHINE_SMP_H_
+
+#include <machine/pcb.h>
+
+#define	IPI_AST		(1 << 0)
+#define	IPI_PREEMPT	(1 << 1)
+#define	IPI_RENDEZVOUS	(1 << 2)
+#define	IPI_STOP	(1 << 3)
+#define	IPI_STOP_HARD	(1 << 4)
+#define	IPI_HARDCLOCK	(1 << 5)
+
+void ipi_all_but_self(u_int ipi);
+void ipi_cpu(int cpu, u_int ipi);
+void ipi_selected(cpuset_t cpus, u_int ipi);
+
+extern struct pcb stoppcbs[];
+
+#endif /* !_MACHINE_SMP_H_ */