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| author | Ruslan Bukin <br@FreeBSD.org> | 2016-04-26 12:56:44 +0000 |
|---|---|---|
| committer | Ruslan Bukin <br@FreeBSD.org> | 2016-04-26 12:56:44 +0000 |
| commit | 00106e52c24545fbf1efe4b7a9502e7e174c7f99 (patch) | |
| tree | 4643b8d83a59ac271772b8b83da170704390c5f2 /sys/riscv/include | |
| parent | 6c0d33bcb3ffffc59f82f3ae6e1c13322eb8a522 (diff) | |
| download | src-00106e52c24545fbf1efe4b7a9502e7e174c7f99.tar.gz src-00106e52c24545fbf1efe4b7a9502e7e174c7f99.zip | |
Add the non-standard "IO interrupt" vector used by lowRISC.
For now they provide UART irq only.
Sponsored by: DARPA, AFRL
Sponsored by: HEIF5
Notes
Notes:
svn path=/head/; revision=298636
Diffstat (limited to 'sys/riscv/include')
| -rw-r--r-- | sys/riscv/include/intr.h | 2 | ||||
| -rw-r--r-- | sys/riscv/include/riscvreg.h | 4 |
2 files changed, 5 insertions, 1 deletions
diff --git a/sys/riscv/include/intr.h b/sys/riscv/include/intr.h index 57d5e5db1b25..bc8c138ad01f 100644 --- a/sys/riscv/include/intr.h +++ b/sys/riscv/include/intr.h @@ -60,6 +60,8 @@ enum { IRQ_SOFTWARE, IRQ_TIMER, IRQ_HTIF, + IRQ_COP, /* lowRISC only */ + IRQ_UART, /* lowRISC only */ NIRQS }; diff --git a/sys/riscv/include/riscvreg.h b/sys/riscv/include/riscvreg.h index b411e1824f60..a71ee47e83fd 100644 --- a/sys/riscv/include/riscvreg.h +++ b/sys/riscv/include/riscvreg.h @@ -47,7 +47,8 @@ #define ECALL_SEND_IPI 0x07 #define ECALL_CLEAR_IPI 0x08 #define ECALL_HTIF_LOWPUTC 0x09 -#define ECALL_MIE_SET 0x10 +#define ECALL_MIE_SET 0x0a +#define ECALL_IO_IRQ_MASK 0x0b #define EXCP_SHIFT 0 #define EXCP_MASK (0xf << EXCP_SHIFT) @@ -119,6 +120,7 @@ #define NCSRS 4096 #define CSR_IPI 0x783 +#define CSR_IO_IRQ 0x7c0 /* lowRISC only? */ #define XLEN 8 #define INSN_SIZE 4 |