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author | Justin Hibbits <jhibbits@FreeBSD.org> | 2015-02-18 06:53:40 +0000 |
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committer | Justin Hibbits <jhibbits@FreeBSD.org> | 2015-02-18 06:53:40 +0000 |
commit | 5f41b3c1da509706f4b2f554d6e1f1eb26d08ed4 (patch) | |
tree | 833629411224c02ef1650d20e2e9fe3cd73c5b0b /sys/powerpc/powermac | |
parent | d8574f4f45ea255ec41416c726d1f90154d4985c (diff) | |
download | src-5f41b3c1da509706f4b2f554d6e1f1eb26d08ed4.tar.gz src-5f41b3c1da509706f4b2f554d6e1f1eb26d08ed4.zip |
Don't set the write bit if we're just reading.
Also fix a couple typos.
MFC after: 3 weeks
Notes
Notes:
svn path=/head/; revision=278943
Diffstat (limited to 'sys/powerpc/powermac')
-rw-r--r-- | sys/powerpc/powermac/atibl.c | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/sys/powerpc/powermac/atibl.c b/sys/powerpc/powermac/atibl.c index 6a12e2fc0b8c..5d441116167d 100644 --- a/sys/powerpc/powermac/atibl.c +++ b/sys/powerpc/powermac/atibl.c @@ -162,14 +162,13 @@ atibl_pll_rreg(struct atibl_softc *sc, uint32_t reg) { uint32_t data, save, tmp; - bus_write_1(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, - ((reg & 0x3f) | RADEON_PLL_WR_EN)); + bus_write_1(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, (reg & 0x3f)); (void)bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA); (void)bus_read_4(sc->sc_memr, RADEON_CRTC_GEN_CNTL); data = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA); - /* Only necessary on R300, bt won't hurt others. */ + /* Only necessary on R300, but won't hurt others. */ save = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX); tmp = save & (~0x3f | RADEON_PLL_WR_EN); bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, tmp); @@ -192,7 +191,7 @@ atibl_pll_wreg(struct atibl_softc *sc, uint32_t reg, uint32_t val) bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_DATA, val); DELAY(5000); - /* Only necessary on R300, bt won't hurt others. */ + /* Only necessary on R300, but won't hurt others. */ save = bus_read_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX); tmp = save & (~0x3f | RADEON_PLL_WR_EN); bus_write_4(sc->sc_memr, RADEON_CLOCK_CNTL_INDEX, tmp); |