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authorAttilio Rao <attilio@FreeBSD.org>2012-10-09 14:32:30 +0000
committerAttilio Rao <attilio@FreeBSD.org>2012-10-09 14:32:30 +0000
commit3a4730256a96ac1a229a7fe1f6171f669fb1d000 (patch)
tree18e9f31a3018a88b46e78d76a45d0953dea5276b /sys/mips
parent6a762eb23ea5f31e65cfa12602937f39a14e9b0c (diff)
downloadsrc-3a4730256a96ac1a229a7fe1f6171f669fb1d000.tar.gz
src-3a4730256a96ac1a229a7fe1f6171f669fb1d000.zip
Add an unified macro to deny ability from the compiler to reorder
instruction loads/stores at its will. The macro __compiler_membar() is currently supported for both gcc and clang, but kernel compilation will fail otherwise. Reviewed by: bde, kib Discussed with: dim, theraven MFC after: 2 weeks
Notes
Notes: svn path=/head/; revision=241374
Diffstat (limited to 'sys/mips')
-rw-r--r--sys/mips/include/cpufunc.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/mips/include/cpufunc.h b/sys/mips/include/cpufunc.h
index 513237f9e37a..3611d6e11604 100644
--- a/sys/mips/include/cpufunc.h
+++ b/sys/mips/include/cpufunc.h
@@ -70,7 +70,7 @@ static __inline void
mips_barrier(void)
{
#if defined(CPU_CNMIPS) || defined(CPU_RMI) || defined(CPU_NLM)
- __asm __volatile("" : : : "memory");
+ __compiler_membar();
#else
__asm __volatile (".set noreorder\n\t"
"nop\n\t"