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author | Neel Natu <neel@FreeBSD.org> | 2010-08-05 04:59:54 +0000 |
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committer | Neel Natu <neel@FreeBSD.org> | 2010-08-05 04:59:54 +0000 |
commit | f49fde7faf062469b63209e4e33858119e0ecf35 (patch) | |
tree | ca9890e2ed549337f4fc588e892e0e216b9b9f95 /sys/mips/sibyte | |
parent | 01e14bff35320d489c4647b89b4961433ba2e9e4 (diff) | |
download | src-f49fde7faf062469b63209e4e33858119e0ecf35.tar.gz src-f49fde7faf062469b63209e4e33858119e0ecf35.zip |
Fix a race between clock_intr() and tick_ticker() when updating
'counter_upper' and 'counter_lower_last'. The race exists because
interrupts are enabled even though tick_ticker() executes in a
critical section.
Fix a bug in clock_intr() in how it updates the cached values of
'counter_upper' and 'counter_lower_last'. They are updated only
when the COUNT register rolls over. More interestingly it will *never*
update the cached values if 'counter_lower_last' happens to be zero.
Get rid of superfluous critical section in clock_intr(). There is no
reason to do this because clock_intr() executes in hard interrupt
context.
Switch back to using 'tick_ticker()' as the cpu ticker for Sibyte.
Reviewed by: jmallett, mav
Notes
Notes:
svn path=/head/; revision=210854
Diffstat (limited to 'sys/mips/sibyte')
-rw-r--r-- | sys/mips/sibyte/sb_machdep.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/sys/mips/sibyte/sb_machdep.c b/sys/mips/sibyte/sb_machdep.c index e8fcaa51f094..9e83426f6396 100644 --- a/sys/mips/sibyte/sb_machdep.c +++ b/sys/mips/sibyte/sb_machdep.c @@ -454,6 +454,4 @@ platform_start(__register_t a0, __register_t a1, __register_t a2, mips_init(); mips_timer_init_params(sb_cpu_speed(), 0); - - set_cputicker(sb_zbbus_cycle_count, sb_cpu_speed() / 2, 1); } |