[ar71xx] add EARLY_PRINTF support for the rest of the non-AR933x SoCs.

Tested:

* AR934x SoC

2 files changed, 21 insertions, 0 deletions

diff --git a/sys/mips/atheros/ar71xxreg.h b/sys/mips/atheros/ar71xxreg.h
index e42d6a5c4ab2..95e36c04ba6f 100644
--- a/sys/mips/atheros/ar71xxreg.h
+++ b/sys/mips/atheros/ar71xxreg.h
@@ -111,6 +111,10 @@
 #define PCI_WINDOW7_CONF_ADDR		0x07000000
 
 #define	AR71XX_UART_ADDR		0x18020000
+#define		AR71XX_UART_THR		0x0
+#define		AR71XX_UART_LSR		0x14
+#define		AR71XX_UART_LSR_THRE	(1 << 5)
+#define		AR71XX_UART_LSR_TEMT	(1 << 6)
 
 #define	AR71XX_USB_CTRL_FLADJ		0x18030000
 #define		USB_CTRL_FLADJ_HOST_SHIFT	12
diff --git a/sys/mips/atheros/uart_bus_ar71xx.c b/sys/mips/atheros/uart_bus_ar71xx.c
index 73361521f1b0..fb2bd53b4a7e 100644
--- a/sys/mips/atheros/uart_bus_ar71xx.c
+++ b/sys/mips/atheros/uart_bus_ar71xx.c
@@ -86,4 +86,21 @@ uart_ar71xx_probe(device_t dev)
 	return (uart_bus_probe(dev, 2, freq, 0, 0));
 }
 
+#ifdef	EARLY_PRINTF
+static void
+ar71xx_early_putc(int c)
+{
+	int i;
+
+	for (i = 0; i < 1000; i++) {
+		if (ATH_READ_REG(AR71XX_UART_ADDR + AR71XX_UART_LSR)
+		    & AR71XX_UART_LSR_THRE)
+			break;
+	}
+
+	ATH_WRITE_REG(AR71XX_UART_ADDR + AR71XX_UART_THR, (c & 0xff));
+}
+early_putc_t *early_putc = ar71xx_early_putc;
+#endif
+
 DRIVER_MODULE(uart, apb, uart_ar71xx_driver, uart_devclass, 0, 0);