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| author | Tor Egge <tegge@FreeBSD.org> | 1998-09-06 22:41:42 +0000 |
|---|---|---|
| committer | Tor Egge <tegge@FreeBSD.org> | 1998-09-06 22:41:42 +0000 |
| commit | 572d053e1742f6434187ae06fa4b4336fe4439c6 (patch) | |
| tree | 4ee0e97285059739b3d564a6ba4e477013ca7093 /sys/i386/isa/apic_ipl.s | |
| parent | 6f47734fd7377b0497059287e4d55863f0858baf (diff) | |
| download | src-572d053e1742f6434187ae06fa4b4336fe4439c6.tar.gz src-572d053e1742f6434187ae06fa4b4336fe4439c6.zip | |
Maintain a mapping from irq number to (ioapic number, int pin) tuple,
and use this when masking/unmasking interrupts.
Maintain a mapping from (iopaic number, int pin) tuple to irq number,
and use this when configuring devices and programming the ioapics.
Previous code assumed that irq number was equal to int pin number, and
that the ioapic number was 0.
Don't let an AP enter _cpu_switch before all local apics are initialized.
Notes
Notes:
svn path=/head/; revision=38888
Diffstat (limited to 'sys/i386/isa/apic_ipl.s')
| -rw-r--r-- | sys/i386/isa/apic_ipl.s | 18 |
1 files changed, 7 insertions, 11 deletions
diff --git a/sys/i386/isa/apic_ipl.s b/sys/i386/isa/apic_ipl.s index 5bbdca65d6ee..8d9b9d835cc4 100644 --- a/sys/i386/isa/apic_ipl.s +++ b/sys/i386/isa/apic_ipl.s @@ -22,7 +22,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $Id: apic_ipl.s,v 1.20 1998/04/22 22:49:29 tegge Exp $ + * $Id: apic_ipl.s,v 1.21 1998/08/11 15:08:12 bde Exp $ */ @@ -227,7 +227,6 @@ bad_mask: .asciz "bad mask" #endif /* - * MULTIPLE_IOAPICSXXX: cannot assume apic #0 in the following function. * (soon to be) MP-safe function to clear ONE INT mask bit. * The passed arg is a 32bit u_int MASK. * It sets the associated bit in _apic_imen. @@ -244,10 +243,9 @@ ENTRY(INTREN) QUALIFY_MASK - leal 16(,%ecx,2), %ecx /* calculate register index */ - - movl $0, %edx /* XXX FIXME: APIC # */ - movl _ioapic(,%edx,4), %edx /* %edx holds APIC base address */ + shll $4, %ecx + movl CNAME(int_to_apicintpin) + 8(%ecx), %edx + movl CNAME(int_to_apicintpin) + 12(%ecx), %ecx movl %ecx, (%edx) /* write the target register index */ movl 16(%edx), %eax /* read the target register data */ @@ -259,7 +257,6 @@ ENTRY(INTREN) ret /* - * MULTIPLE_IOAPICSXXX: cannot assume apic #0 in the following function. * (soon to be) MP-safe function to set ONE INT mask bit. * The passed arg is a 32bit u_int MASK. * It clears the associated bit in _apic_imen. @@ -276,10 +273,9 @@ ENTRY(INTRDIS) QUALIFY_MASK - leal 16(,%ecx,2), %ecx /* calculate register index */ - - movl $0, %edx /* XXX FIXME: APIC # */ - movl _ioapic(,%edx,4), %edx /* %edx holds APIC base address */ + shll $4, %ecx + movl CNAME(int_to_apicintpin) + 8(%ecx), %edx + movl CNAME(int_to_apicintpin) + 12(%ecx), %ecx movl %ecx, (%edx) /* write the target register index */ movl 16(%edx), %eax /* read the target register data */ |