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author | John Baldwin <jhb@FreeBSD.org> | 2003-11-03 21:25:52 +0000 |
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committer | John Baldwin <jhb@FreeBSD.org> | 2003-11-03 21:25:52 +0000 |
commit | ecee5704ed500a18a49850acb275aa4ff463bdd3 (patch) | |
tree | bdc2c0ce1924654f98cab7e8a0ac5d1227ffce79 /sys/i386/include | |
parent | 5b02e68554464531d16f2db0aff07380cde2a674 (diff) | |
download | src-ecee5704ed500a18a49850acb275aa4ff463bdd3.tar.gz src-ecee5704ed500a18a49850acb275aa4ff463bdd3.zip |
New device interrupt code. This defines an interrupt source abstraction
that provides methods via a PIC driver to do things like mask a source,
unmask a source, enable it when the first interrupt handler is added, etc.
The interrupt code provides a table of interrupt sources indexed by IRQ
numbers, or vectors. These vectors are what new-bus uses for its IRQ
resources and for bus_setup_intr()/bus_teardown_intr(). The interrupt
code then maps that vector a given interrupt source object. When an
interrupt comes in, the low-level interrupt code looks up the interrupt
source for the source that triggered the interrupt and hands it off to
this code to execute the appropriate handlers.
By having an interrupt source abstraction, this allows us to have different
types of interrupt source providers within the shared IRQ address space.
For example, IRQ 0 may map to pin 0 of the master 8259A PIC, IRQs 1
through 60 may map to pins on various I/O APICs, and IRQs 120 through
128 may map to MSI interrupts for various PCI devices.
Notes
Notes:
svn path=/head/; revision=121982
Diffstat (limited to 'sys/i386/include')
-rw-r--r-- | sys/i386/include/intr_machdep.h | 91 |
1 files changed, 91 insertions, 0 deletions
diff --git a/sys/i386/include/intr_machdep.h b/sys/i386/include/intr_machdep.h new file mode 100644 index 000000000000..ed89186f2cbe --- /dev/null +++ b/sys/i386/include/intr_machdep.h @@ -0,0 +1,91 @@ +/*- + * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org> + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * $FreeBSD$ + */ + +#ifndef __MACHINE_INTR_MACHDEP_H__ +#define __MACHINE_INTR_MACHDEP_H__ + +#ifdef _KERNEL + +/* With I/O APIC's we can have up to 159 interrupts. */ +#define NUM_IO_INTS 159 +#define INTRCNT_COUNT (1 + NUM_IO_INTS * 2) + +#ifndef LOCORE + +typedef void inthand_t(u_int cs, u_int ef, u_int esp, u_int ss); + +#define IDTVEC(name) __CONCAT(X,name) + +struct intsrc; + +/* + * Methods that a PIC provides to mask/unmask a given interrupt source, + * "turn on" the interrupt on the CPU side by setting up an IDT entry, and + * return the vector associated with this source. + */ +struct pic { + void (*pic_enable_source)(struct intsrc *); + void (*pic_disable_source)(struct intsrc *); + void (*pic_eoi_source)(struct intsrc *); + void (*pic_enable_intr)(struct intsrc *); + int (*pic_vector)(struct intsrc *); + int (*pic_source_pending)(struct intsrc *); + void (*pic_suspend)(struct intsrc *); + void (*pic_resume)(struct intsrc *); +}; + +/* + * An interrupt source. The upper-layer code uses the PIC methods to + * control a given source. The lower-layer PIC drivers can store additional + * private data in a given interrupt source such as an interrupt pin number + * or an I/O APIC pointer. + */ +struct intsrc { + struct pic *is_pic; + struct ithd *is_ithread; + u_long *is_count; + u_long *is_straycount; + u_int is_index; +}; + +struct intrframe; + +extern struct mtx icu_lock; + +int intr_add_handler(const char *name, int vector, driver_intr_t handler, + void *arg, enum intr_type flags, void **cookiep); +void intr_execute_handlers(struct intsrc *isrc, struct intrframe *iframe); +struct intsrc *intr_lookup_source(int vector); +int intr_register_source(struct intsrc *isrc); +int intr_remove_handler(void *cookie); +void intr_resume(void); +void intr_suspend(void); + +#endif /* !LOCORE */ +#endif /* _KERNEL */ +#endif /* !__MACHINE_INTR_MACHDEP_H__ */ |