New i386 SMP code:

- The MP code no longer knows anything specific about an MP Table.
  Instead, the local APIC code adds CPUs via the cpu_add() function when
  a local APIC is enumerated by an APIC enumerator.
- Don't divide the argument to mp_bootaddress() by 1024 just so that we
  can turn around and mulitply it by 1024 again.
- We no longer panic if SMP is enabled but we are booted on a UP machine.
- init_secondary(), the asm code between init_secondary() and ap_init()
  in mpboot.s and ap_init() have all been merged together in C into
  init_secondary().
- We now use the cpuid feature bits to determine if we should enable
  PSE, PGE, or VME on each AP.
- Due to the change in the implementation of critical sections, acquire
  the SMP TLB mutex around a slightly larger chunk of code for TLB
  shootdowns.
- Remove some of the debug code from the original SMP implementation
  that is no longer used or no longer applies to the new APIC code.
- Use a temporary hack to disable the ACPI module until the SMP code has
  been further reorganized to allow ACPI to work as a module again.
- Add a DDB command to dump the interesting contents of the IDT.

2 files changed, 25 insertions, 132 deletions

diff --git a/sys/i386/include/smp.h b/sys/i386/include/smp.h
index 6467365cc8e0..329bb3a90202 100644
--- a/sys/i386/include/smp.h
+++ b/sys/i386/include/smp.h
@@ -15,17 +15,7 @@
 
 #ifdef _KERNEL
 
-#if defined(SMP) && defined(I386_CPU) && !defined(COMPILING_LINT)
-#error SMP not supported with I386_CPU
-#endif
-#if defined(SMP) && !defined(APIC_IO)
-# error APIC_IO required for SMP, add "options APIC_IO" to your config file.
-#endif /* SMP && !APIC_IO */
-#if defined(SMP) && defined(CPU_DISABLE_CMPXCHG) && !defined(COMPILING_LINT)
-#error SMP not supported with CPU_DISABLE_CMPXCHG
-#endif
-
-#if defined(SMP) || defined(APIC_IO)
+#ifdef SMP
 
 #ifndef LOCORE
 
@@ -43,25 +33,10 @@ extern int current_postcode;  /** XXX currently in mp_machdep.c */
 			current_postcode |= (((X) << 4) & 0xf0), \
 			outb(0x80, current_postcode)
 
-
-#include <sys/bus.h>	/* XXX */
-#include <machine/apic.h>
+#include <sys/bus.h>
 #include <machine/frame.h>
-#include <i386/isa/icu.h>
-#include <i386/isa/intr_machdep.h>
-
-/*
- * Interprocessor interrupts for SMP.
- */
-#define	IPI_INVLTLB		XINVLTLB_OFFSET
-#define	IPI_INVLPG		XINVLPG_OFFSET
-#define	IPI_INVLRNG		XINVLRNG_OFFSET
-#define	IPI_LAZYPMAP		XLAZYPMAP_OFFSET
-#define	IPI_RENDEZVOUS		XRENDEZVOUS_OFFSET
-#define	IPI_AST			XCPUAST_OFFSET
-#define	IPI_STOP		XCPUSTOP_OFFSET
-#define	IPI_HARDCLOCK		XHARDCLOCK_OFFSET
-#define	IPI_STATCLOCK		XSTATCLOCK_OFFSET
+#include <machine/intr_machdep.h>
+#include <machine/apicvar.h>
 
 /* global data in mpboot.s */
 extern int			bootMP_size;
@@ -70,61 +45,36 @@ extern int			bootMP_size;
 void	bootMP(void);
 
 /* global data in mp_machdep.c */
-extern int			bsp_apic_ready;
 extern int			mp_naps;
-extern int			mp_nbusses;
-extern int			mp_napics;
-extern int			mp_picmode;
 extern int			boot_cpu_id;
-extern vm_offset_t		cpu_apic_address;
-extern vm_offset_t		io_apic_address[];
-extern u_int32_t		cpu_apic_versions[];
-extern u_int32_t		*io_apic_versions;
-extern int			cpu_num_to_apic_id[];
-extern int			io_num_to_apic_id[];
-extern int			apic_id_to_logical[];
-#define APIC_INTMAPSIZE 32
-struct apic_intmapinfo {
-  	int ioapic;
-	int int_pin;
-	volatile void *apic_address;
-	int redirindex;
-};
-extern struct apic_intmapinfo	int_to_apicintpin[];
 extern struct pcb		stoppcbs[];
+extern struct mtx		smp_tlb_mtx;
+
+/* IPI handlers */
+inthand_t
+	IDTVEC(invltlb),	/* TLB shootdowns - global */
+	IDTVEC(invlpg),		/* TLB shootdowns - 1 page */
+	IDTVEC(invlrng),	/* TLB shootdowns - page range */
+	IDTVEC(hardclock),	/* Forward hardclock() */
+	IDTVEC(statclock),	/* Forward statclock() */
+	IDTVEC(cpuast),		/* Additional software trap on other cpu */ 
+	IDTVEC(cpustop),	/* CPU stops & waits to be restarted */
+	IDTVEC(rendezvous),	/* handle CPU rendezvous */
+	IDTVEC(lazypmap);	/* handle lazy pmap release */
 
 /* functions in mp_machdep.c */
-void	i386_mp_probe(void);
-u_int	mp_bootaddress(u_int);
-u_int	isa_apic_mask(u_int);
-int	isa_apic_irq(int);
-int	pci_apic_irq(int, int, int);
-int	apic_irq(int, int);
-int	next_apic_irq(int);
-int	undirect_isa_irq(int);
-int	undirect_pci_irq(int);
-int	apic_bus_type(int);
-int	apic_src_bus_id(int, int);
-int	apic_src_bus_irq(int, int);
-int	apic_int_type(int, int);
-int	apic_trigger(int, int);
-int	apic_polarity(int, int);
-int	mp_grab_cpu_hlt(void);
-void	assign_apic_irq(int apic, int intpin, int irq);
-void	revoke_apic_irq(int irq);
-void	bsp_apic_configure(void);
+void	cpu_add(u_int apic_id, char boot_cpu);
 void	init_secondary(void);
-void	forward_statclock(void);
-void	forwarded_statclock(struct clockframe frame);
-void	forward_hardclock(void);
-void	forwarded_hardclock(struct clockframe frame);
 void	ipi_selected(u_int cpus, u_int ipi);
 void	ipi_all(u_int ipi);
 void	ipi_all_but_self(u_int ipi);
 void	ipi_self(u_int ipi);
-#ifdef	APIC_INTR_REORDER
-void	set_lapic_isrloc(int, int);
-#endif /* APIC_INTR_REORDER */
+void	forward_statclock(void);
+void	forwarded_statclock(struct clockframe frame);
+void	forward_hardclock(void);
+void	forwarded_hardclock(struct clockframe frame);
+u_int	mp_bootaddress(u_int);
+int	mp_grab_cpu_hlt(void);
 void	smp_invlpg(vm_offset_t addr);
 void	smp_masked_invlpg(u_int mask, vm_offset_t addr);
 void	smp_invlpg_range(vm_offset_t startva, vm_offset_t endva);
@@ -133,30 +83,8 @@ void	smp_masked_invlpg_range(u_int mask, vm_offset_t startva,
 void	smp_invltlb(void);
 void	smp_masked_invltlb(u_int mask);
 
-/* global data in mpapic.c */
-extern volatile lapic_t		lapic;
-extern volatile ioapic_t	**ioapic;
-
-/* functions in mpapic.c */
-void	apic_dump(char*);
-void	apic_initialize(void);
-void	imen_dump(void);
-int	apic_ipi(int, int, int);
-int	selected_apic_ipi(u_int, int, int);
-int	io_apic_setup(int);
-void	io_apic_setup_intpin(int, int);
-void	io_apic_set_id(int, int);
-int	io_apic_get_id(int);
-int	ext_int_setup(int, int);
-
-void	set_apic_timer(int);
-int	read_apic_timer(void);
-void	u_sleep(int);
-u_int	io_apic_read(int, int);
-void	io_apic_write(int, int, u_int);
-
 #endif /* !LOCORE */
-#endif /* SMP && !APIC_IO */
+#endif /* SMP */
 
 #endif /* _KERNEL */
 #endif /* _MACHINE_SMP_H_ */
diff --git a/sys/i386/include/smptests.h b/sys/i386/include/smptests.h
index 9f11abf97c56..ca0fc6ac9156 100644
--- a/sys/i386/include/smptests.h
+++ b/sys/i386/include/smptests.h
@@ -33,14 +33,6 @@
  * Various 'tests in progress' and configuration parameters.
  */
 
-
-/*
- * Put FAST_INTR() ISRs at an APIC priority above the regular INTs.
- * Allow the mp_lock() routines to handle FAST interrupts while spinning.
- */
-#define FAST_HI
-
-
 /*
  * These defines enable critical region locking of areas that were
  * protected via cli/sti in the UP kernel.
@@ -59,39 +51,12 @@
  */
 #define CPUSTOP_ON_DDBBREAK
 
-
-#ifdef APIC_IO
-/*
- * Don't assume that slow interrupt handler X is called from vector
- * X + ICU_OFFSET.
- */
-#define APIC_INTR_REORDER
-
-#endif /* APIC_IO */
-
 /*
  * Misc. counters.
  *
 #define COUNT_XINVLTLB_HITS
  */
 
-
-/**
- * Hack to "fake-out" kernel into thinking it is running on a 'default config'.
- *
- * value == default type
-#define TEST_DEFAULT_CONFIG	6
- */
-
-
-/*
- * Simple test code for IPI interaction, save for future...
- *
-#define TEST_TEST1
-#define IPI_TARGET_TEST1	1
- */
-
-
 /*
  * Address of POST hardware port.
  * Defining this enables POSTCODE macros.