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authorJustin Hibbits <jhibbits@FreeBSD.org>2018-05-30 22:39:41 +0000
committerJustin Hibbits <jhibbits@FreeBSD.org>2018-05-30 22:39:41 +0000
commit5502348d9a238c9f13dc10e0bdd00db21a0eeaa6 (patch)
treedee5a4806aa37f816b4e057d2a5a18cffec6f7e7 /sys/dev
parent56226f5673d999b80ef62055ea9914f80f60b2fd (diff)
downloadsrc-5502348d9a238c9f13dc10e0bdd00db21a0eeaa6.tar.gz
src-5502348d9a238c9f13dc10e0bdd00db21a0eeaa6.zip
Only conform to PCIe spec of 1 device per bus on !x86
bhyve's root PCI complex shows up as PCIe, but behaves as traditional PCI. Until that is special cased in a root complex driver, leave x86 as it was. Requested by: grehan
Notes
Notes: svn path=/head/; revision=334407
Diffstat (limited to 'sys/dev')
-rw-r--r--sys/dev/pci/pci_pci.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/sys/dev/pci/pci_pci.c b/sys/dev/pci/pci_pci.c
index f181eed30727..a61d8c2fb2e5 100644
--- a/sys/dev/pci/pci_pci.c
+++ b/sys/dev/pci/pci_pci.c
@@ -2545,6 +2545,7 @@ pcib_enable_ari(struct pcib_softc *sc, uint32_t pcie_pos)
int
pcib_maxslots(device_t dev)
{
+#if !defined(__amd64__) && !defined(__i386__)
uint32_t pcie_pos;
uint16_t val;
@@ -2559,6 +2560,7 @@ pcib_maxslots(device_t dev)
val == PCIEM_TYPE_DOWNSTREAM_PORT)
return (0);
}
+#endif
return (PCI_SLOTMAX);
}