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| author | Søren Schmidt <sos@FreeBSD.org> | 2022-08-16 12:24:44 +0000 |
|---|---|---|
| committer | Ganbold Tsagaankhuu <ganbold@FreeBSD.org> | 2022-08-16 12:24:44 +0000 |
| commit | 1331c0f44b6a3b6dec1fbd638103fa15bffac5d8 (patch) | |
| tree | 7ee7d5665b216cbd7f2a4cba7204c854d5188411 /sys/dev/usb | |
| parent | 84a0be4a239bc3ed08a3cb5a74b1d768d705b8d7 (diff) | |
| download | src-1331c0f44b6a3b6dec1fbd638103fa15bffac5d8.tar.gz src-1331c0f44b6a3b6dec1fbd638103fa15bffac5d8.zip | |
Add support for RockChip RK356X to DWC3 driver.
For RK356x platform, we can set bit 26 of DWC3_GUCTL1 register
for usb 2.0 device.
Reviewed by: manu
Differential Revision: https://reviews.freebsd.org/D36211
Diffstat (limited to 'sys/dev/usb')
| -rw-r--r-- | sys/dev/usb/controller/dwc3.c | 9 | ||||
| -rw-r--r-- | sys/dev/usb/controller/dwc3.h | 1 |
2 files changed, 9 insertions, 1 deletions
diff --git a/sys/dev/usb/controller/dwc3.c b/sys/dev/usb/controller/dwc3.c index 19237ef4c11d..2e8f868bc47b 100644 --- a/sys/dev/usb/controller/dwc3.c +++ b/sys/dev/usb/controller/dwc3.c @@ -366,6 +366,7 @@ snps_dwc3_common_attach(device_t dev, bool is_fdt) #ifdef FDT phandle_t node; phy_t usb2_phy, usb3_phy; + uint32_t reg; #endif int error, rid; @@ -403,7 +404,13 @@ snps_dwc3_common_attach(device_t dev, bool is_fdt) error = phy_get_by_ofw_name(dev, node, "usb3-phy", &usb3_phy); if (error == 0 && usb3_phy != NULL) phy_enable(usb3_phy); - + else { + reg = DWC3_READ(sc, DWC3_GUCTL1); + if (bootverbose) + device_printf(dev, "Forcing USB2 clock only\n"); + reg |= DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK; + DWC3_WRITE(sc, DWC3_GUCTL1, reg); + } snps_dwc3_configure_phy(sc, node); skip_phys: #endif diff --git a/sys/dev/usb/controller/dwc3.h b/sys/dev/usb/controller/dwc3.h index 83951d327c8c..21a87a1917ee 100644 --- a/sys/dev/usb/controller/dwc3.h +++ b/sys/dev/usb/controller/dwc3.h @@ -49,6 +49,7 @@ #define DWC3_GUCTL1 0xc11c #define DWC3_GUCTL1_TX_IPGAP_LINECHECK_DIS (1 << 28) +#define DWC3_GUCTL1_DEV_FORCE_20_CLK_FOR_30_CLK (1 << 26) #define DWC3_GSNPSID 0xc120 #define DWC3_GGPIO 0xc124 |