diff options
author | Warner Losh <imp@FreeBSD.org> | 2002-07-26 08:05:25 +0000 |
---|---|---|
committer | Warner Losh <imp@FreeBSD.org> | 2002-07-26 08:05:25 +0000 |
commit | e4188e915d76c3f2a7b2cffc4fbc026d0ea23f1c (patch) | |
tree | 5cf050e58972455d38a7e1e990cc300ca3706d3e /sys/dev/pccbb | |
parent | 6dfd31d46085958a0acefda87ee7285ad6e1ce27 (diff) | |
download | src-e4188e915d76c3f2a7b2cffc4fbc026d0ea23f1c.tar.gz src-e4188e915d76c3f2a7b2cffc4fbc026d0ea23f1c.zip |
MFp4:
o Rename the insanely long PCIC bridge ids.
o Add my copyright to pccbb.c
o Add support for the TI-1510, TI-1520 and TI-4510 series of upcoming
bridges.
o Init MFUNC if it is zero and the TI part has a MFUNC register
at offset 0x8c (1030, 1130 and 1131 don't have anything there, the
1250,1251,1251B and 1450 have a different thing there. The rest
have it. TI is likely to only do MFUNC from now on. The IRQMUX
in the 1250 series of chips needs no tweaks.
o Adjust to new exca interface.
o Add comments about TI chips that I learned in talking to an
engineer at TI.
o Add register definitions for MFUNC.
o Create CB_TI125X chipset type.
Notes
Notes:
svn path=/head/; revision=100704
Diffstat (limited to 'sys/dev/pccbb')
-rw-r--r-- | sys/dev/pccbb/pccbb.c | 154 | ||||
-rw-r--r-- | sys/dev/pccbb/pccbbdevid.h | 93 | ||||
-rw-r--r-- | sys/dev/pccbb/pccbbreg.h | 23 | ||||
-rw-r--r-- | sys/dev/pccbb/pccbbvar.h | 13 |
4 files changed, 156 insertions, 127 deletions
diff --git a/sys/dev/pccbb/pccbb.c b/sys/dev/pccbb/pccbb.c index f9a8cebe44b4..8e9bc38c610f 100644 --- a/sys/dev/pccbb/pccbb.c +++ b/sys/dev/pccbb/pccbb.c @@ -1,4 +1,5 @@ /* + * Copyright (c) 2002 M. Warner Losh. * Copyright (c) 2000,2001 Jonathan Chen. * All rights reserved. * @@ -125,74 +126,58 @@ struct yenta_chipinfo { int yc_chiptype; } yc_chipsets[] = { /* Texas Instruments chips */ - {PCI_DEVICE_ID_PCIC_TI1031, "TI1031 PCI-PC Card Bridge", CB_TI113X}, - {PCI_DEVICE_ID_PCIC_TI1130, "TI1130 PCI-CardBus Bridge", CB_TI113X}, - {PCI_DEVICE_ID_PCIC_TI1131, "TI1131 PCI-CardBus Bridge", CB_TI113X}, - - {PCI_DEVICE_ID_PCIC_TI1210, "TI1210 PCI-CardBus Bridge", CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI1211, "TI1211 PCI-CardBus Bridge", CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI1220, "TI1220 PCI-CardBus Bridge", CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI1221, "TI1221 PCI-CardBus Bridge", CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI1225, "TI1225 PCI-CardBus Bridge", CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI1250, "TI1250 PCI-CardBus Bridge", CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI1251, "TI1251 PCI-CardBus Bridge", CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI1251B,"TI1251B PCI-CardBus Bridge",CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI1260, "TI1260 PCI-CardBus Bridge", CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI1260B,"TI1260B PCI-CardBus Bridge",CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI1410, "TI1410 PCI-CardBus Bridge", CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI1420, "TI1420 PCI-CardBus Bridge", CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI1421, "TI1421 PCI-CardBus Bridge", CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI1450, "TI1450 PCI-CardBus Bridge", CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI1451, "TI1451 PCI-CardBus Bridge", CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI4410, "TI4410 PCI-CardBus Bridge", CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI4450, "TI4450 PCI-CardBus Bridge", CB_TI12XX}, - {PCI_DEVICE_ID_PCIC_TI4451, "TI4451 PCI-CardBus Bridge", CB_TI12XX}, + {PCIC_ID_TI1031, "TI1031 PCI-PC Card Bridge", CB_TI113X}, + {PCIC_ID_TI1130, "TI1130 PCI-CardBus Bridge", CB_TI113X}, + {PCIC_ID_TI1131, "TI1131 PCI-CardBus Bridge", CB_TI113X}, + + {PCIC_ID_TI1210, "TI1210 PCI-CardBus Bridge", CB_TI12XX}, + {PCIC_ID_TI1211, "TI1211 PCI-CardBus Bridge", CB_TI12XX}, + {PCIC_ID_TI1220, "TI1220 PCI-CardBus Bridge", CB_TI12XX}, + {PCIC_ID_TI1221, "TI1221 PCI-CardBus Bridge", CB_TI12XX}, + {PCIC_ID_TI1225, "TI1225 PCI-CardBus Bridge", CB_TI12XX}, + {PCIC_ID_TI1250, "TI1250 PCI-CardBus Bridge", CB_TI125X}, + {PCIC_ID_TI1251, "TI1251 PCI-CardBus Bridge", CB_TI125X}, + {PCIC_ID_TI1251B,"TI1251B PCI-CardBus Bridge",CB_TI125X}, + {PCIC_ID_TI1260, "TI1260 PCI-CardBus Bridge", CB_TI12XX}, + {PCIC_ID_TI1260B,"TI1260B PCI-CardBus Bridge",CB_TI12XX}, + {PCIC_ID_TI1410, "TI1410 PCI-CardBus Bridge", CB_TI12XX}, + {PCIC_ID_TI1420, "TI1420 PCI-CardBus Bridge", CB_TI12XX}, + {PCIC_ID_TI1421, "TI1421 PCI-CardBus Bridge", CB_TI12XX}, + {PCIC_ID_TI1450, "TI1450 PCI-CardBus Bridge", CB_TI125X}, + {PCIC_ID_TI1451, "TI1451 PCI-CardBus Bridge", CB_TI12XX}, + {PCIC_ID_TI1510, "TI1510 PCI-CardBus Bridge", CB_TI12XX}, + {PCIC_ID_TI1520, "TI1520 PCI-CardBus Bridge", CB_TI12XX}, + {PCIC_ID_TI4410, "TI4410 PCI-CardBus Bridge", CB_TI12XX}, + {PCIC_ID_TI4450, "TI4450 PCI-CardBus Bridge", CB_TI12XX}, + {PCIC_ID_TI4451, "TI4451 PCI-CardBus Bridge", CB_TI12XX}, + {PCIC_ID_TI4510, "TI4510 PCI-CardBus Bridge", CB_TI12XX}, /* Ricoh chips */ - {PCI_DEVICE_ID_RICOH_RL5C465, "RF5C465 PCI-CardBus Bridge", - CB_RF5C46X}, - {PCI_DEVICE_ID_RICOH_RL5C466, "RF5C466 PCI-CardBus Bridge", - CB_RF5C46X}, - {PCI_DEVICE_ID_RICOH_RL5C475, "RF5C475 PCI-CardBus Bridge", - CB_RF5C47X}, - {PCI_DEVICE_ID_RICOH_RL5C476, "RF5C476 PCI-CardBus Bridge", - CB_RF5C47X}, - {PCI_DEVICE_ID_RICOH_RL5C477, "RF5C477 PCI-CardBus Bridge", - CB_RF5C47X}, - {PCI_DEVICE_ID_RICOH_RL5C478, "RF5C478 PCI-CardBus Bridge", - CB_RF5C47X}, + {PCIC_ID_RICOH_RL5C465, "RF5C465 PCI-CardBus Bridge", CB_RF5C46X}, + {PCIC_ID_RICOH_RL5C466, "RF5C466 PCI-CardBus Bridge", CB_RF5C46X}, + {PCIC_ID_RICOH_RL5C475, "RF5C475 PCI-CardBus Bridge", CB_RF5C47X}, + {PCIC_ID_RICOH_RL5C476, "RF5C476 PCI-CardBus Bridge", CB_RF5C47X}, + {PCIC_ID_RICOH_RL5C477, "RF5C477 PCI-CardBus Bridge", CB_RF5C47X}, + {PCIC_ID_RICOH_RL5C478, "RF5C478 PCI-CardBus Bridge", CB_RF5C47X}, /* Toshiba products */ - {PCI_DEVICE_ID_TOSHIBA_TOPIC95, "ToPIC95 PCI-CardBus Bridge", - CB_TOPIC95}, - {PCI_DEVICE_ID_TOSHIBA_TOPIC95B, "ToPIC95B PCI-CardBus Bridge", - CB_TOPIC95}, - {PCI_DEVICE_ID_TOSHIBA_TOPIC97, "ToPIC97 PCI-CardBus Bridge", - CB_TOPIC97}, - {PCI_DEVICE_ID_TOSHIBA_TOPIC100, "ToPIC100 PCI-CardBus Bridge", - CB_TOPIC97}, + {PCIC_ID_TOPIC95, "ToPIC95 PCI-CardBus Bridge", CB_TOPIC95}, + {PCIC_ID_TOPIC95B, "ToPIC95B PCI-CardBus Bridge", CB_TOPIC95}, + {PCIC_ID_TOPIC97, "ToPIC97 PCI-CardBus Bridge", CB_TOPIC97}, + {PCIC_ID_TOPIC100, "ToPIC100 PCI-CardBus Bridge", CB_TOPIC97}, /* Cirrus Logic */ - {PCI_DEVICE_ID_PCIC_CLPD6832, "CLPD6832 PCI-CardBus Bridge", - CB_CIRRUS}, - {PCI_DEVICE_ID_PCIC_CLPD6833, "CLPD6833 PCI-CardBus Bridge", - CB_CIRRUS}, - {PCI_DEVICE_ID_PCIC_CLPD6834, "CLPD6834 PCI-CardBus Bridge", - CB_CIRRUS}, + {PCIC_ID_CLPD6832, "CLPD6832 PCI-CardBus Bridge", CB_CIRRUS}, + {PCIC_ID_CLPD6833, "CLPD6833 PCI-CardBus Bridge", CB_CIRRUS}, + {PCIC_ID_CLPD6834, "CLPD6834 PCI-CardBus Bridge", CB_CIRRUS}, /* 02Micro */ - {PCI_DEVICE_ID_PCIC_OZ6832, "O2Mirco OZ6832/6833 PCI-CardBus Bridge", - CB_CIRRUS}, - {PCI_DEVICE_ID_PCIC_OZ6860, "O2Mirco OZ6836/6860 PCI-CardBus Bridge", - CB_CIRRUS}, - {PCI_DEVICE_ID_PCIC_OZ6872, "O2Mirco OZ6812/6872 PCI-CardBus Bridge", - CB_CIRRUS}, - {PCI_DEVICE_ID_PCIC_OZ6912, "O2Mirco OZ6912/6972 PCI-CardBus Bridge", - CB_CIRRUS}, - {PCI_DEVICE_ID_PCIC_OZ6922, "O2Mirco OZ6822 PCI-CardBus Bridge", - CB_CIRRUS}, - {PCI_DEVICE_ID_PCIC_OZ6933, "O2Mirco OZ6833 PCI-CardBus Bridge", - CB_CIRRUS}, + {PCIC_ID_OZ6832, "O2Mirco OZ6832/6833 PCI-CardBus Bridge", CB_CIRRUS}, + {PCIC_ID_OZ6860, "O2Mirco OZ6836/6860 PCI-CardBus Bridge", CB_CIRRUS}, + {PCIC_ID_OZ6872, "O2Mirco OZ6812/6872 PCI-CardBus Bridge", CB_CIRRUS}, + {PCIC_ID_OZ6912, "O2Mirco OZ6912/6972 PCI-CardBus Bridge", CB_CIRRUS}, + {PCIC_ID_OZ6922, "O2Mirco OZ6822 PCI-CardBus Bridge", CB_CIRRUS}, + {PCIC_ID_OZ6933, "O2Mirco OZ6833 PCI-CardBus Bridge", CB_CIRRUS}, /* sentinel */ {0 /* null id */, "unknown", CB_UNKNOWN}, @@ -306,18 +291,6 @@ pccbb_clrb(struct pccbb_softc *sc, uint32_t reg, uint32_t bits) pccbb_set(sc, reg, pccbb_get(sc, reg) & ~bits); } -static __inline uint8_t -pccbb_pcic_read(struct exca_softc *sc, int reg) -{ - return (bus_space_read_1(sc->bst, sc->bsh, sc->offset + reg)); -} - -static __inline void -pccbb_pcic_write(struct exca_softc *sc, int reg, uint8_t val) -{ - return (bus_space_write_1(sc->bst, sc->bsh, sc->offset + reg, val)); -} - static void pccbb_remove_res(struct pccbb_softc *sc, struct resource *res) { @@ -430,6 +403,8 @@ pccbb_probe(device_t brdev) static void pccbb_chipinit(struct pccbb_softc *sc) { + uint32_t mux, sysctrl; + /* Set CardBus latency timer */ if (pci_read_config(sc->dev, PCIR_SECLAT_1, 1) < 0x20) pci_write_config(sc->dev, PCIR_SECLAT_1, 0x20, 1); @@ -484,6 +459,35 @@ pccbb_chipinit(struct pccbb_softc *sc) & ~(CBBM_DEVCTRL_INT_SERIAL | CBBM_DEVCTRL_INT_PCI), 1); break; + case CB_TI12XX: + /* + * Some TI 12xx (and [14][45]xx) based pci cards + * sometimes have issues with the MFUNC register not + * being initialized due to a bad EEPROM on board. + * Laptops that this matters on have this register + * properly initialized. + * + * The TI125X parts have a different register. + */ + mux = pci_read_config(sc->dev, CBBR_MFUNC, 4); + sysctrl = pci_read_config(sc->dev, CBBR_SYSCTRL, 4); + if (mux == 0) { + mux = (mux & ~CBBM_MFUNC_PIN0) | + CBBM_MFUNC_PIN0_INTA; + if ((sysctrl & CBBM_SYSCTRL_INTRTIE) == 0) + mux = (mux & ~CBBM_MFUNC_PIN1) | + CBBM_MFUNC_PIN1_INTB; + pci_write_config(sc->dev, CBBR_MFUNC, mux, 4); + } + /*FALLTHROUGH*/ + case CB_TI125X: + /* + * Disable zoom video. Some machines initialize this + * improperly and exerpience has shown that this helps + * on some machines. + */ + pci_write_config(sc->dev, CBBR_MMCTRL, 0, 4); + break; case CB_TOPIC97: /* * Disable Zoom Video, ToPIC 97, 100. @@ -557,7 +561,6 @@ pccbb_attach(device_t brdev) { struct pccbb_softc *sc = (struct pccbb_softc *)device_get_softc(brdev); int rid; - uint32_t sockbase; mtx_init(&sc->mtx, device_get_nameunit(brdev), "pccbb", MTX_DEF); cv_init(&sc->cv, "pccbb cv"); @@ -615,12 +618,13 @@ pccbb_attach(device_t brdev) cv_destroy(&sc->cv); return (ENOMEM); } +#endif } sc->bst = rman_get_bustag(sc->base_res); sc->bsh = rman_get_bushandle(sc->base_res); - exca_init(&sc->exca, brdev, &pccbb_pcic_write, &pccbb_pcic_read, - sc->bst, sc->bsh, 0x800); + exca_init(&sc->exca, brdev, sc->bst, sc->bsh, CBB_EXCA_OFFSET); + sc->exca.flags |= EXCA_HAS_MEMREG_WIN; pccbb_chipinit(sc); /* attach children */ diff --git a/sys/dev/pccbb/pccbbdevid.h b/sys/dev/pccbb/pccbbdevid.h index 8cca68b8d943..2c1534815201 100644 --- a/sys/dev/pccbb/pccbbdevid.h +++ b/sys/dev/pccbb/pccbbdevid.h @@ -27,51 +27,54 @@ */ /* Vendor/Device IDs */ -#define PCI_DEVICE_ID_INTEL_82092AA 0x12218086ul /* 16bit I/O */ -#define PCI_DEVICE_ID_PCIC_CLPD6729 0x11001013ul /* 16bit I/O */ -#define PCI_DEVICE_ID_PCIC_CLPD6832 0x11101013ul -#define PCI_DEVICE_ID_PCIC_CLPD6833 0x11131013ul -#define PCI_DEVICE_ID_PCIC_CLPD6834 0x11121013ul -#define PCI_DEVICE_ID_PCIC_OZ6729 0x67291217ul -#define PCI_DEVICE_ID_PCIC_OZ6730 0x673A1217ul -#define PCI_DEVICE_ID_PCIC_OZ6832 0x68321217ul /* Also 6833 */ -#define PCI_DEVICE_ID_PCIC_OZ6860 0x68361217ul /* Also 6836 */ -#define PCI_DEVICE_ID_PCIC_OZ6872 0x68721217ul /* Also 6812 */ -#define PCI_DEVICE_ID_PCIC_OZ6912 0x69721217ul /* Also 6972? */ -#define PCI_DEVICE_ID_PCIC_OZ6922 0x69251217ul -#define PCI_DEVICE_ID_PCIC_OZ6933 0x69331217ul -#define PCI_DEVICE_ID_RICOH_RL5C465 0x04651180ul -#define PCI_DEVICE_ID_RICOH_RL5C466 0x04661180ul -#define PCI_DEVICE_ID_RICOH_RL5C475 0x04751180ul -#define PCI_DEVICE_ID_RICOH_RL5C476 0x04761180ul -#define PCI_DEVICE_ID_RICOH_RL5C477 0x04771180ul -#define PCI_DEVICE_ID_RICOH_RL5C478 0x04781180ul -#define PCI_DEVICE_ID_OMEGA_82C094 0x1221119bul /* 16bit I/O */ -#define PCI_DEVICE_ID_PCIC_TI1031 0xac13104cul -#define PCI_DEVICE_ID_PCIC_TI1130 0xac12104cul -#define PCI_DEVICE_ID_PCIC_TI1131 0xac15104cul -#define PCI_DEVICE_ID_PCIC_TI1210 0xac1a104cul -#define PCI_DEVICE_ID_PCIC_TI1211 0xac1e104cul -#define PCI_DEVICE_ID_PCIC_TI1220 0xac17104cul -#define PCI_DEVICE_ID_PCIC_TI1221 0xac19104cul -#define PCI_DEVICE_ID_PCIC_TI1225 0xac1c104cul -#define PCI_DEVICE_ID_PCIC_TI1250 0xac16104cul -#define PCI_DEVICE_ID_PCIC_TI1251 0xac1d104cul -#define PCI_DEVICE_ID_PCIC_TI1251B 0xac1f104cul -#define PCI_DEVICE_ID_PCIC_TI1260 0xac18104cul -#define PCI_DEVICE_ID_PCIC_TI1260B 0xac30104cul -#define PCI_DEVICE_ID_PCIC_TI1410 0xac50104cul -#define PCI_DEVICE_ID_PCIC_TI1420 0xac51104cul -#define PCI_DEVICE_ID_PCIC_TI1421 0xac53104cul -#define PCI_DEVICE_ID_PCIC_TI1450 0xac1b104cul -#define PCI_DEVICE_ID_PCIC_TI1451 0xac52104cul -#define PCI_DEVICE_ID_PCIC_TI4410 0xac41104cul -#define PCI_DEVICE_ID_PCIC_TI4450 0xac40104cul -#define PCI_DEVICE_ID_PCIC_TI4451 0xac42104cul -#define PCI_DEVICE_ID_TOSHIBA_TOPIC95 0x06031179ul -#define PCI_DEVICE_ID_TOSHIBA_TOPIC95B 0x060a1179ul -#define PCI_DEVICE_ID_TOSHIBA_TOPIC97 0x060f1179ul -#define PCI_DEVICE_ID_TOSHIBA_TOPIC100 0x06171179ul +#define PCIC_ID_INTEL_82092AA 0x12218086ul /* 16bit I/O */ +#define PCIC_ID_CLPD6729 0x11001013ul /* 16bit I/O */ +#define PCIC_ID_CLPD6832 0x11101013ul +#define PCIC_ID_CLPD6833 0x11131013ul +#define PCIC_ID_CLPD6834 0x11121013ul +#define PCIC_ID_OMEGA_82C094 0x1221119bul /* 16bit I/O */ +#define PCIC_ID_OZ6729 0x67291217ul +#define PCIC_ID_OZ6730 0x673A1217ul +#define PCIC_ID_OZ6832 0x68321217ul /* Also 6833 */ +#define PCIC_ID_OZ6860 0x68361217ul /* Also 6836 */ +#define PCIC_ID_OZ6872 0x68721217ul /* Also 6812 */ +#define PCIC_ID_OZ6912 0x69721217ul /* Also 6972? */ +#define PCIC_ID_OZ6922 0x69251217ul +#define PCIC_ID_OZ6933 0x69331217ul +#define PCIC_ID_RICOH_RL5C465 0x04651180ul +#define PCIC_ID_RICOH_RL5C466 0x04661180ul +#define PCIC_ID_RICOH_RL5C475 0x04751180ul +#define PCIC_ID_RICOH_RL5C476 0x04761180ul +#define PCIC_ID_RICOH_RL5C477 0x04771180ul +#define PCIC_ID_RICOH_RL5C478 0x04781180ul +#define PCIC_ID_TI1031 0xac13104cul +#define PCIC_ID_TI1130 0xac12104cul +#define PCIC_ID_TI1131 0xac15104cul +#define PCIC_ID_TI1210 0xac1a104cul +#define PCIC_ID_TI1211 0xac1e104cul +#define PCIC_ID_TI1220 0xac17104cul +#define PCIC_ID_TI1221 0xac19104cul /* never sold */ +#define PCIC_ID_TI1225 0xac1c104cul +#define PCIC_ID_TI1250 0xac16104cul /* Rare */ +#define PCIC_ID_TI1251 0xac1d104cul +#define PCIC_ID_TI1251B 0xac1f104cul +#define PCIC_ID_TI1260 0xac18104cul /* never sold */ +#define PCIC_ID_TI1260B 0xac30104cul /* never sold */ +#define PCIC_ID_TI1410 0xac50104cul +#define PCIC_ID_TI1420 0xac51104cul +#define PCIC_ID_TI1421 0xac53104cul /* never sold */ +#define PCIC_ID_TI1450 0xac1b104cul +#define PCIC_ID_TI1451 0xac52104cul +#define PCIC_ID_TI1510 0xac56104cul +#define PCIC_ID_TI1520 0xac55104cul +#define PCIC_ID_TI4410 0xac41104cul +#define PCIC_ID_TI4450 0xac40104cul +#define PCIC_ID_TI4451 0xac42104cul +#define PCIC_ID_TI4510 0xac44104cul +#define PCIC_ID_TOPIC95 0x06031179ul +#define PCIC_ID_TOPIC95B 0x060a1179ul +#define PCIC_ID_TOPIC97 0x060f1179ul +#define PCIC_ID_TOPIC100 0x06171179ul /* * Other ID, from sources too vague to be reliable diff --git a/sys/dev/pccbb/pccbbreg.h b/sys/dev/pccbb/pccbbreg.h index 66096d9b4cbf..6dc29c99d1ec 100644 --- a/sys/dev/pccbb/pccbbreg.h +++ b/sys/dev/pccbb/pccbbreg.h @@ -92,6 +92,25 @@ #define CBBR_LEGACY 0x44 /* len=4 */ +/* TI * */ +#define CBBR_SYSCTRL 0x80 /* len=4 */ +# define CBBM_SYSCTRL_INTRTIE 0x20000000u + +/* TI [14][245]xx */ +#define CBBR_MMCTRL 0x84 /* len=4 */ + +/* TI 12xx/14xx/15xx (except 1250/1251/1251B/1450) */ +#define CBBR_MFUNC 0x8c /* len=4 */ +# define CBBM_MFUNC_PIN0 0x0000000f +# define CBBM_MFUNC_PIN0_INTA 0x02 +# define CBBM_MFUNC_PIN1 0x000000f0 +# define CBBM_MFUNC_PIN1_INTB 0x20 +# define CBBM_MFUNC_PIN2 0x00000f00 +# define CBBM_MFUNC_PIN3 0x0000f000 +# define CBBM_MFUNC_PIN4 0x000f0000 +# define CBBM_MFUNC_PIN5 0x00f00000 +# define CBBM_MFUNC_PIN6 0x0f000000 + #define CBBR_CBCTRL 0x91 /* len=1 */ /* bits for TI 113X */ # define CBBM_CBCTRL_113X_RI_EN 0x80 @@ -102,7 +121,7 @@ # define CBBM_CBCTRL_113X_PCI_CSC_D 0x04 # define CBBM_CBCTRL_113X_SPEAKER_EN 0x02 # define CBBM_CBCTRL_113X_INTR_DET 0x01 - /* bits for TI 12XX */ + /* TI [14][245]xx */ # define CBBM_CBCTRL_12XX_RI_EN 0x80 # define CBBM_CBCTRL_12XX_ZV_EN 0x40 # define CBBM_CBCTRL_12XX_AUD2MUX 0x04 @@ -210,3 +229,5 @@ #define CBB_SOCKET_FORCE 0x0c #define CBB_SOCKET_CONTROL 0x10 #define CBB_SOCKET_POWER 0x14 + +#define CBB_EXCA_OFFSET 0x800 /* offset for exca regs */ diff --git a/sys/dev/pccbb/pccbbvar.h b/sys/dev/pccbb/pccbbvar.h index fcc4fd11cd8f..a7ca49df5317 100644 --- a/sys/dev/pccbb/pccbbvar.h +++ b/sys/dev/pccbb/pccbbvar.h @@ -71,12 +71,13 @@ struct pccbb_softc { int chipset; /* chipset id */ #define CB_UNKNOWN 0 /* NOT Cardbus-PCI bridge */ #define CB_TI113X 1 /* TI PCI1130/1131 */ -#define CB_TI12XX 2 /* TI PCI1250/1220 */ -#define CB_RF5C47X 3 /* RICOH RF5C475/476/477 */ -#define CB_RF5C46X 4 /* RICOH RF5C465/466/467 */ -#define CB_CIRRUS 5 /* Cirrus Logic CLPD683x */ -#define CB_TOPIC95 6 /* Toshiba ToPIC95 */ -#define CB_TOPIC97 7 /* Toshiba ToPIC97/100 */ +#define CB_TI12XX 2 /* TI PCI12xx/14xx/44xx/15xx/45xx */ +#define CB_TI125X 3 /* TI PCI1250/1251(B)/1450 */ +#define CB_RF5C47X 4 /* RICOH RF5C475/476/477 */ +#define CB_RF5C46X 5 /* RICOH RF5C465/466/467 */ +#define CB_CIRRUS 6 /* Cirrus Logic CLPD683x */ +#define CB_TOPIC95 7 /* Toshiba ToPIC95 */ +#define CB_TOPIC97 8 /* Toshiba ToPIC97/100 */ SLIST_HEAD(, pccbb_reslist) rl; device_t cbdev; |