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author | Noriaki Mitsunaga <non@FreeBSD.org> | 2001-02-25 12:40:30 +0000 |
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committer | Noriaki Mitsunaga <non@FreeBSD.org> | 2001-02-25 12:40:30 +0000 |
commit | a4539b3e5695e35c1265dc19fd0061a5932ea289 (patch) | |
tree | fd8bd613c75a70e694f2ee4f5ad2439f0dcd690c /sys/dev/ncv/ncr53c500var.h | |
parent | 7a6ac3e0871749dc82d66caec562e55b5f6107cc (diff) | |
download | src-a4539b3e5695e35c1265dc19fd0061a5932ea289.tar.gz src-a4539b3e5695e35c1265dc19fd0061a5932ea289.zip |
o Support AUTO SENSE correctly.
o Offset and period in synch messages and width negotiation should be
done for per target not per lun. Move these from *lun_info to
*targ_info.
o Change in handling XPT_RESET_DEV and XPT_GET_TRAN_SETTINGS .
o Change CAM_* xpt_done return values.
o Busy loop did not timeout. Change this to timeout as original NetBSD/pc98.
Reviewed by: bsd-nomads ML
Notes
Notes:
svn path=/head/; revision=73025
Diffstat (limited to 'sys/dev/ncv/ncr53c500var.h')
-rw-r--r-- | sys/dev/ncv/ncr53c500var.h | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/sys/dev/ncv/ncr53c500var.h b/sys/dev/ncv/ncr53c500var.h index 07e85f8b3cd1..c01bc851d44e 100644 --- a/sys/dev/ncv/ncr53c500var.h +++ b/sys/dev/ncv/ncr53c500var.h @@ -47,6 +47,7 @@ struct ncv_softc { bus_space_handle_t sc_ioh; void *sc_ih; + int sc_wc; /* weight counter */ int sc_selstop; /* sel atn stop asserted */ int sc_compseq; /* completion seq cmd asserted */ int sc_tdatalen; /* temp xfer data len */ @@ -64,14 +65,14 @@ struct ncv_softc { }; /***************************************************************** - * Lun information + * Target information *****************************************************************/ -struct ncv_lun_info { - struct lun_info nli_li; +struct ncv_targ_info { + struct targ_info nti_ti; - u_int8_t nli_reg_cfg3; /* cfg3 images per lun */ - u_int8_t nli_reg_offset; /* synch offset register per lun */ - u_int8_t nli_reg_period; /* synch period register per lun */ + u_int8_t nti_reg_cfg3; /* cfg3 images per target */ + u_int8_t nti_reg_offset; /* synch offset register per target */ + u_int8_t nti_reg_period; /* synch period register per target */ }; /***************************************************************** |