diff options
author | Pedro F. Giffuni <pfg@FreeBSD.org> | 2016-05-03 03:41:25 +0000 |
---|---|---|
committer | Pedro F. Giffuni <pfg@FreeBSD.org> | 2016-05-03 03:41:25 +0000 |
commit | 453130d9bfc1c6d68b366dfcb041689d69f81295 (patch) | |
tree | fe36ef227324b313676d43aef9a4d97c9a09675a /sys/dev/drm | |
parent | 7860c0c3843dbb1cf8f4f2c20ee526e8dd2661da (diff) | |
download | src-453130d9bfc1c6d68b366dfcb041689d69f81295.tar.gz src-453130d9bfc1c6d68b366dfcb041689d69f81295.zip |
sys/dev: minor spelling fixes.
Most affect comments, very few have user-visible effects.
Notes
Notes:
svn path=/head/; revision=298955
Diffstat (limited to 'sys/dev/drm')
-rw-r--r-- | sys/dev/drm/drm.h | 2 | ||||
-rw-r--r-- | sys/dev/drm/drm_bufs.c | 2 | ||||
-rw-r--r-- | sys/dev/drm/drm_vm.c | 2 | ||||
-rw-r--r-- | sys/dev/drm/i915_drv.h | 2 | ||||
-rw-r--r-- | sys/dev/drm/mach64_state.c | 4 | ||||
-rw-r--r-- | sys/dev/drm/mga_dma.c | 2 | ||||
-rw-r--r-- | sys/dev/drm/mga_drm.h | 2 | ||||
-rw-r--r-- | sys/dev/drm/radeon_cp.c | 2 | ||||
-rw-r--r-- | sys/dev/drm/radeon_drm.h | 2 | ||||
-rw-r--r-- | sys/dev/drm/radeon_drv.h | 2 | ||||
-rw-r--r-- | sys/dev/drm/radeon_state.c | 4 | ||||
-rw-r--r-- | sys/dev/drm/savage_bci.c | 2 | ||||
-rw-r--r-- | sys/dev/drm/savage_drm.h | 2 |
13 files changed, 15 insertions, 15 deletions
diff --git a/sys/dev/drm/drm.h b/sys/dev/drm/drm.h index e579a16604ad..a2612049bb0d 100644 --- a/sys/dev/drm/drm.h +++ b/sys/dev/drm/drm.h @@ -812,7 +812,7 @@ struct drm_fence_arg { */ #define DRM_BO_HINT_WAIT_LAZY 0x00000008 /* - * The client has compute relocations refering to this buffer using the + * The client has compute relocations referring to this buffer using the * offset in the presumed_offset field. If that offset ends up matching * where this buffer lands, the kernel is free to skip executing those * relocations diff --git a/sys/dev/drm/drm_bufs.c b/sys/dev/drm/drm_bufs.c index b685a591c01f..1ee0ffa6da36 100644 --- a/sys/dev/drm/drm_bufs.c +++ b/sys/dev/drm/drm_bufs.c @@ -668,7 +668,7 @@ static int drm_do_addbufs_pci(struct drm_device *dev, struct drm_buf_desc *reque dma->buflist[i + dma->buf_count] = &entry->buflist[i]; } - /* No allocations failed, so now we can replace the orginal pagelist + /* No allocations failed, so now we can replace the original pagelist * with the new one. */ free(dma->pagelist, DRM_MEM_PAGES); diff --git a/sys/dev/drm/drm_vm.c b/sys/dev/drm/drm_vm.c index 798685607af2..4810343b3a07 100644 --- a/sys/dev/drm/drm_vm.c +++ b/sys/dev/drm/drm_vm.c @@ -43,7 +43,7 @@ int drm_mmap(struct cdev *kdev, vm_ooffset_t offset, vm_paddr_t *paddr, /* d_mmap gets called twice, we can only reference file_priv during * the first call. We need to assume that if error is EBADF the - * call was succesful and the client is authenticated. + * call was successful and the client is authenticated. */ error = devfs_get_cdevpriv((void **)&file_priv); if (error == ENOENT) { diff --git a/sys/dev/drm/i915_drv.h b/sys/dev/drm/i915_drv.h index 3896732b32ec..07af14700a6d 100644 --- a/sys/dev/drm/i915_drv.h +++ b/sys/dev/drm/i915_drv.h @@ -307,7 +307,7 @@ typedef struct drm_i915_private { * Flag if the hardware appears to be wedged. * * This is set when attempts to idle the device timeout. - * It prevents command submission from occuring and makes + * It prevents command submission from occurring and makes * every pending request fail */ int wedged; diff --git a/sys/dev/drm/mach64_state.c b/sys/dev/drm/mach64_state.c index 16848c23ac14..a72244fb1fd9 100644 --- a/sys/dev/drm/mach64_state.c +++ b/sys/dev/drm/mach64_state.c @@ -709,10 +709,10 @@ static int mach64_dma_dispatch_blit(struct drm_device * dev, * XXX: This is overkill. The most efficient solution would be having * two sets of buffers (one set private for vertex data, the other set * client-writable for blits). However that would bring more complexity - * and would break backward compatability. The solution currently + * and would break backward compatibility. The solution currently * implemented is keeping all buffers private, allowing to secure the * driver, without increasing complexity at the expense of some speed - * transfering data. + * transferring data. */ verify_ret = copy_from_user_blit(GETBUFPTR(copy_buf), blit->buf, used); diff --git a/sys/dev/drm/mga_dma.c b/sys/dev/drm/mga_dma.c index 71775b65b193..b3a7a98a5d07 100644 --- a/sys/dev/drm/mga_dma.c +++ b/sys/dev/drm/mga_dma.c @@ -433,7 +433,7 @@ int mga_driver_load(struct drm_device *dev, unsigned long flags) * Bootstrap the driver for AGP DMA. * * \todo - * Investigate whether there is any benifit to storing the WARP microcode in + * Investigate whether there is any benefit to storing the WARP microcode in * AGP memory. If not, the microcode may as well always be put in PCI * memory. * diff --git a/sys/dev/drm/mga_drm.h b/sys/dev/drm/mga_drm.h index 16e89909ae99..2754c934413a 100644 --- a/sys/dev/drm/mga_drm.h +++ b/sys/dev/drm/mga_drm.h @@ -108,7 +108,7 @@ __FBSDID("$FreeBSD$"); */ #define MGA_NR_SAREA_CLIPRECTS 8 -/* 2 heaps (1 for card, 1 for agp), each divided into upto 128 +/* 2 heaps (1 for card, 1 for agp), each divided into up to 128 * regions, subject to a minimum region size of (1<<16) == 64k. * * Clients may subdivide regions internally, but when sharing between diff --git a/sys/dev/drm/radeon_cp.c b/sys/dev/drm/radeon_cp.c index 5d2f4c71623c..be839366d2ac 100644 --- a/sys/dev/drm/radeon_cp.c +++ b/sys/dev/drm/radeon_cp.c @@ -231,7 +231,7 @@ void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base) u32 agp_base_lo = agp_base & 0xffffffff; u32 r6xx_agp_base = (agp_base >> 22) & 0x3ffff; - /* R6xx/R7xx must be aligned to a 4MB boundry */ + /* R6xx/R7xx must be aligned to a 4MB boundary */ if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) RADEON_WRITE(R700_MC_VM_AGP_BASE, r6xx_agp_base); else if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) diff --git a/sys/dev/drm/radeon_drm.h b/sys/dev/drm/radeon_drm.h index 11f2fcb8d8ad..2287ef509c3f 100644 --- a/sys/dev/drm/radeon_drm.h +++ b/sys/dev/drm/radeon_drm.h @@ -618,7 +618,7 @@ typedef struct drm_radeon_vertex2 { } drm_radeon_vertex2_t; /* v1.3 - obsoletes drm_radeon_vertex2 - * - allows arbitarily large cliprect list + * - allows arbitrarily large cliprect list * - allows updating of tcl packet, vector and scalar state * - allows memory-efficient description of state updates * - allows state to be emitted without a primitive diff --git a/sys/dev/drm/radeon_drv.h b/sys/dev/drm/radeon_drv.h index e830a83f8054..b4785e0be9eb 100644 --- a/sys/dev/drm/radeon_drv.h +++ b/sys/dev/drm/radeon_drv.h @@ -365,7 +365,7 @@ typedef struct drm_radeon_private { u32 scratch_ages[5]; - /* starting from here on, data is preserved accross an open */ + /* starting from here on, data is preserved across an open */ uint32_t flags; /* see radeon_chip_flags */ unsigned long fb_aper_offset; diff --git a/sys/dev/drm/radeon_state.c b/sys/dev/drm/radeon_state.c index b334a885b284..718c7e118641 100644 --- a/sys/dev/drm/radeon_state.c +++ b/sys/dev/drm/radeon_state.c @@ -950,7 +950,7 @@ static void radeon_cp_dispatch_clear(struct drm_device * dev, } /* hyper z clear */ - /* no docs available, based on reverse engeneering by Stephane Marchesin */ + /* no docs available, based on reverse engineering by Stephane Marchesin */ if ((flags & (RADEON_DEPTH | RADEON_STENCIL)) && (flags & RADEON_CLEAR_FASTZ)) { @@ -1064,7 +1064,7 @@ static void radeon_cp_dispatch_clear(struct drm_device * dev, /* judging by the first tile offset needed, could possibly directly address/clear 4x4 tiles instead of 8x2 * 4x4 macro tiles, though would still need clear mask for - right/bottom if truely 4x4 granularity is desired ? */ + right/bottom if truly 4x4 granularity is desired ? */ OUT_RING(tileoffset * 16); /* the number of tiles to clear */ OUT_RING(nrtilesx + 1); diff --git a/sys/dev/drm/savage_bci.c b/sys/dev/drm/savage_bci.c index 0f8d66e12898..173993e9f99a 100644 --- a/sys/dev/drm/savage_bci.c +++ b/sys/dev/drm/savage_bci.c @@ -555,7 +555,7 @@ int savage_driver_load(struct drm_device *dev, unsigned long chipset) } /* - * Initalize mappings. On Savage4 and SavageIX the alignment + * Initialize mappings. On Savage4 and SavageIX the alignment * and size of the aperture is not suitable for automatic MTRR setup * in drm_addmap. Therefore we add them manually before the maps are * initialized, and tear them down on last close. diff --git a/sys/dev/drm/savage_drm.h b/sys/dev/drm/savage_drm.h index c54d2d4cc881..3655b5ec4ebc 100644 --- a/sys/dev/drm/savage_drm.h +++ b/sys/dev/drm/savage_drm.h @@ -32,7 +32,7 @@ __FBSDID("$FreeBSD$"); #ifndef __SAVAGE_SAREA_DEFINES__ #define __SAVAGE_SAREA_DEFINES__ -/* 2 heaps (1 for card, 1 for agp), each divided into upto 128 +/* 2 heaps (1 for card, 1 for agp), each divided into up to 128 * regions, subject to a minimum region size of (1<<16) == 64k. * * Clients may subdivide regions internally, but when sharing between |