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author | Warner Losh <imp@FreeBSD.org> | 2005-04-18 03:31:29 +0000 |
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committer | Warner Losh <imp@FreeBSD.org> | 2005-04-18 03:31:29 +0000 |
commit | 6d431b17c9349761e0ba1c479d5bf3e5b65f4b5e (patch) | |
tree | c0c07e9521590d37b797103c9b1d9779fcdb5038 /sys/dev/dc | |
parent | 528d3f795513567ee9eac9357d9ea533b28336ab (diff) | |
download | src-6d431b17c9349761e0ba1c479d5bf3e5b65f4b5e.tar.gz src-6d431b17c9349761e0ba1c479d5bf3e5b65f4b5e.zip |
Fix newer Xircom CBE2-100 cards that were reporting
dc0: MII without any PHY!
We have to enable the connection to the MII first. Doing so fixes the
problem cards without breaking the older, working cards.
Bad card provided by: deischen
Notes
Notes:
svn path=/head/; revision=145219
Diffstat (limited to 'sys/dev/dc')
-rw-r--r-- | sys/dev/dc/if_dc.c | 27 |
1 files changed, 14 insertions, 13 deletions
diff --git a/sys/dev/dc/if_dc.c b/sys/dev/dc/if_dc.c index dc9583562689..4fe664d1c8cb 100644 --- a/sys/dev/dc/if_dc.c +++ b/sys/dev/dc/if_dc.c @@ -2212,6 +2212,20 @@ dc_attach(device_t dev) sc->dc_pmode = DC_PMODE_MII; } + /* + * Setup General Purpose port mode and data so the tulip can talk + * to the MII. This needs to be done before mii_phy_probe so that + * we can actually see them. + */ + if (DC_IS_XIRCOM(sc)) { + CSR_WRITE_4(sc, DC_SIAGP, DC_SIAGP_WRITE_EN | DC_SIAGP_INT1_EN | + DC_SIAGP_MD_GP2_OUTPUT | DC_SIAGP_MD_GP0_OUTPUT); + DELAY(10); + CSR_WRITE_4(sc, DC_SIAGP, DC_SIAGP_INT1_EN | + DC_SIAGP_MD_GP2_OUTPUT | DC_SIAGP_MD_GP0_OUTPUT); + DELAY(10); + } + error = mii_phy_probe(dev, &sc->dc_miibus, dc_ifmedia_upd, dc_ifmedia_sts); @@ -2239,19 +2253,6 @@ dc_attach(device_t dev) goto fail; } - if (DC_IS_XIRCOM(sc)) { - /* - * setup General Purpose Port mode and data so the tulip - * can talk to the MII. - */ - CSR_WRITE_4(sc, DC_SIAGP, DC_SIAGP_WRITE_EN | DC_SIAGP_INT1_EN | - DC_SIAGP_MD_GP2_OUTPUT | DC_SIAGP_MD_GP0_OUTPUT); - DELAY(10); - CSR_WRITE_4(sc, DC_SIAGP, DC_SIAGP_INT1_EN | - DC_SIAGP_MD_GP2_OUTPUT | DC_SIAGP_MD_GP0_OUTPUT); - DELAY(10); - } - if (DC_IS_ADMTEK(sc)) { /* * Set automatic TX underrun recovery for the ADMtek chips |