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| author | Robert Watson <rwatson@FreeBSD.org> | 2012-08-25 08:31:21 +0000 |
|---|---|---|
| committer | Robert Watson <rwatson@FreeBSD.org> | 2012-08-25 08:31:21 +0000 |
| commit | c9790125b56bc115843b55dc77c51fc26de449e9 (patch) | |
| tree | f31c577d7bafb381d92843a56b97d971474925d5 /sys/conf/options.mips | |
| parent | 8122a592ee1f7b59c3acf87d50fc5eec98c4732c (diff) | |
| download | src-c9790125b56bc115843b55dc77c51fc26de449e9.tar.gz src-c9790125b56bc115843b55dc77c51fc26de449e9.zip | |
Add preliminary support for the SRI International / University of Cambridge
Bluespec Extensible RISC Implementation (BERI) processor. BERI is a 64-bit
MIPS ISA soft CPU core that can be synthesised to Altera and Xilinx FPGAs,
and is being used for CPU and OS research at several institutions.
Sponsored by: DARPA, AFRL
Notes
Notes:
svn path=/head/; revision=239671
Diffstat (limited to 'sys/conf/options.mips')
| -rw-r--r-- | sys/conf/options.mips | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sys/conf/options.mips b/sys/conf/options.mips index 51b8b998e026..7dfa0e45709f 100644 --- a/sys/conf/options.mips +++ b/sys/conf/options.mips @@ -37,6 +37,7 @@ CPU_SB1 opt_global.h CPU_CNMIPS opt_global.h CPU_RMI opt_global.h CPU_NLM opt_global.h +CPU_BERI opt_global.h COMPAT_FREEBSD32 opt_compat.h |