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author | Andrew Turner <andrew@FreeBSD.org> | 2016-05-13 16:03:50 +0000 |
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committer | Andrew Turner <andrew@FreeBSD.org> | 2016-05-13 16:03:50 +0000 |
commit | 5db4448f069f6ea0b5c91d19ea34d8800f6bc1b4 (patch) | |
tree | 5ce7a60841aa41d109eecc6370779e86768c4603 /sys/arm64/include | |
parent | 48235fe344156b05e836d9b963232bd13149069d (diff) | |
download | src-5db4448f069f6ea0b5c91d19ea34d8800f6bc1b4.tar.gz src-5db4448f069f6ea0b5c91d19ea34d8800f6bc1b4.zip |
Add support to the arm64 busdma to handle the cache. For now this is
disabled, however when we enable it it will default to assume memory is
not cache-coherent, unless either the tag was created or the parent was
marked as cache-coherent.
Obtained from: ABT Systems Ltd
Relnotes: yes
Sponsored by: The FreeBSD Foundation
Notes
Notes:
svn path=/head/; revision=299683
Diffstat (limited to 'sys/arm64/include')
-rw-r--r-- | sys/arm64/include/cpufunc.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/sys/arm64/include/cpufunc.h b/sys/arm64/include/cpufunc.h index 56f1acff7264..905d22270fe0 100644 --- a/sys/arm64/include/cpufunc.h +++ b/sys/arm64/include/cpufunc.h @@ -119,6 +119,11 @@ clrex(void) __asm __volatile("clrex" : : : "memory"); } +extern int64_t dcache_line_size; +extern int64_t icache_line_size; +extern int64_t idcache_line_size; +extern int64_t dczva_line_size; + #define cpu_nullop() arm64_nullop() #define cpufunc_nullop() arm64_nullop() #define cpu_setttb(a) arm64_setttb(a) |