diff options
author | Mike Smith <msmith@FreeBSD.org> | 2000-12-08 22:11:23 +0000 |
---|---|---|
committer | Mike Smith <msmith@FreeBSD.org> | 2000-12-08 22:11:23 +0000 |
commit | bb0d0a8efc748ae3a7a6f639d373bac067cf8ba1 (patch) | |
tree | 01265cfe73a67ec16238af8006ee338101dac771 /sys/amd64 | |
parent | baeb94c70d24a4761ea13e094e0ea6de9ffc7192 (diff) | |
download | src-bb0d0a8efc748ae3a7a6f639d373bac067cf8ba1.tar.gz src-bb0d0a8efc748ae3a7a6f639d373bac067cf8ba1.zip |
Next phase in the PCI subsystem cleanup.
- Move PCI core code to dev/pci.
- Split bridge code out into separate modules.
- Remove the descriptive strings from the bridge drivers. If you
want to know what a device is, use pciconf. Add support for
broadly identifying devices based on class/subclass, and for
parsing a preloaded device identification database so that if
you want to waste the memory, you can identify *anything* we know
about.
- Remove machine-dependant code from the core PCI code. APIC interrupt
mapping is performed by shadowing the intline register in machine-
dependant code.
- Bring interrupt routing support to the Alpha
(although many platforms don't yet support routing or mapping
interrupts entirely correctly). This resulted in spamming
<sys/bus.h> into more places than it really should have gone.
- Put sys/dev on the kernel/modules include path. This avoids
having to change *all* the pci*.h includes.
Notes
Notes:
svn path=/head/; revision=69783
Diffstat (limited to 'sys/amd64')
-rw-r--r-- | sys/amd64/pci/pci_bus.c | 4 | ||||
-rw-r--r-- | sys/amd64/pci/pci_cfgreg.c | 54 |
2 files changed, 54 insertions, 4 deletions
diff --git a/sys/amd64/pci/pci_bus.c b/sys/amd64/pci/pci_bus.c index c1a0599579af..dfd496797ff2 100644 --- a/sys/amd64/pci/pci_bus.c +++ b/sys/amd64/pci/pci_bus.c @@ -71,9 +71,9 @@ nexus_pcib_write_config(device_t dev, int bus, int slot, int func, /* route interrupt */ static int -nexus_pcib_route_interrupt(device_t bus, int device, int pin) +nexus_pcib_route_interrupt(device_t pcib, device_t dev, int pin) { - return(pci_cfgintr(nexus_get_pcibus(bus), device, pin)); + return(pci_cfgintr(pci_get_bus(dev), pci_get_slot(dev), pin)); } static devclass_t pcib_devclass; diff --git a/sys/amd64/pci/pci_cfgreg.c b/sys/amd64/pci/pci_cfgreg.c index d83591a8c27e..ef5f65bed51a 100644 --- a/sys/amd64/pci/pci_cfgreg.c +++ b/sys/amd64/pci/pci_cfgreg.c @@ -46,6 +46,10 @@ #include <machine/segments.h> #include <machine/pc/bios.h> +#ifdef APIC_IO +#include <machine/smp.h> +#endif /* APIC_IO */ + #include "pcib_if.h" static int cfgmech; @@ -112,16 +116,62 @@ pci_cfgregopen(void) } /* - * Read configuration space register + * Read configuration space register */ u_int32_t -pci_cfgregread(int bus, int slot, int func, int reg, int bytes) +pci_do_cfgregread(int bus, int slot, int func, int reg, int bytes) { return(usebios ? pcibios_cfgread(bus, slot, func, reg, bytes) : pcireg_cfgread(bus, slot, func, reg, bytes)); } +u_int32_t +pci_cfgregread(int bus, int slot, int func, int reg, int bytes) +{ +#ifdef APIC_IO + /* + * If we are using the APIC, the contents of the intline register will probably + * be wrong (since they are set up for use with the PIC. + * Rather than rewrite these registers (maybe that would be smarter) we trap + * attempts to read them and translate to our private vector numbers. + */ + if ((reg == PCIR_INTLINE) && (bytes == 1)) { + int pin, line, airq; + + pin = pci_do_cfgregread(bus, slot, func, PCIR_INTPIN, 1); + line = pci_do_cfgregread(bus, slot, func, PCIR_INTLINE, 1); + + if (pin != 0) { + int airq; + + airq = pci_apic_irq(bus, slot, pin); + if (airq >= 0) { + /* PCI specific entry found in MP table */ + if (airq != line) + undirect_pci_irq(line); + return(airq); + } else { + /* + * PCI interrupts might be redirected to the + * ISA bus according to some MP tables. Use the + * same methods as used by the ISA devices + * devices to find the proper IOAPIC int pin. + */ + airq = isa_apic_irq(line); + if ((airq >= 0) && (airq != line)) { + /* XXX: undirect_pci_irq() ? */ + undirect_isa_irq(line); + return(airq); + } + } + } + return(line); + } +#endif /* APIC_IO */ + return(pci_do_cfgregread(bus, slot, func, reg, bytes)); +} + /* * Write configuration space register */ |