diff options
author | Dimitry Andric <dim@FreeBSD.org> | 2020-07-26 19:36:28 +0000 |
---|---|---|
committer | Dimitry Andric <dim@FreeBSD.org> | 2020-07-26 19:36:28 +0000 |
commit | cfca06d7963fa0909f90483b42a6d7d194d01e08 (patch) | |
tree | 209fb2a2d68f8f277793fc8df46c753d31bc853b /llvm/lib/Target/X86/X86ScheduleZnver1.td | |
parent | 706b4fc47bbc608932d3b491ae19a3b9cde9497b (diff) | |
download | src-cfca06d7963fa0909f90483b42a6d7d194d01e08.tar.gz src-cfca06d7963fa0909f90483b42a6d7d194d01e08.zip |
Vendor import of llvm-project master 2e10b7a39b9, the last commit beforevendor/llvm-project/llvmorg-11-init-20887-g2e10b7a39b9vendor/llvm-project/master
the llvmorg-12-init tag, from which release/11.x was branched.
Notes
Notes:
svn path=/vendor/llvm-project/master/; revision=363578
svn path=/vendor/llvm-project/llvmorg-11-init-20887-g2e10b7a39b9/; revision=363579; tag=vendor/llvm-project/llvmorg-11-init-20887-g2e10b7a39b9
Diffstat (limited to 'llvm/lib/Target/X86/X86ScheduleZnver1.td')
-rw-r--r-- | llvm/lib/Target/X86/X86ScheduleZnver1.td | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ScheduleZnver1.td b/llvm/lib/Target/X86/X86ScheduleZnver1.td index 06201f4a3a84..fe09d6f85221 100644 --- a/llvm/lib/Target/X86/X86ScheduleZnver1.td +++ b/llvm/lib/Target/X86/X86ScheduleZnver1.td @@ -295,6 +295,7 @@ defm : ZnWriteResFpuPair<WriteFCmp64X, [ZnFPU0], 3>; defm : ZnWriteResFpuPair<WriteFCmp64Y, [ZnFPU0], 3>; defm : X86WriteResPairUnsupported<WriteFCmp64Z>; defm : ZnWriteResFpuPair<WriteFCom, [ZnFPU0], 3>; +defm : ZnWriteResFpuPair<WriteFComX, [ZnFPU0], 3>; defm : ZnWriteResFpuPair<WriteFBlend, [ZnFPU01], 1>; defm : ZnWriteResFpuPair<WriteFBlendY, [ZnFPU01], 1>; defm : X86WriteResPairUnsupported<WriteFBlendZ>; @@ -387,8 +388,10 @@ defm : X86WriteRes<WriteVecStoreX, [ZnAGU], 1, [1], 1>; defm : X86WriteRes<WriteVecStoreY, [ZnAGU], 1, [1], 1>; defm : X86WriteRes<WriteVecStoreNT, [ZnAGU], 1, [1], 1>; defm : X86WriteRes<WriteVecStoreNTY, [ZnAGU], 1, [1], 1>; -defm : X86WriteRes<WriteVecMaskedStore, [ZnAGU,ZnFPU01], 4, [1,1], 1>; -defm : X86WriteRes<WriteVecMaskedStoreY, [ZnAGU,ZnFPU01], 5, [1,2], 2>; +defm : X86WriteRes<WriteVecMaskedStore32, [ZnAGU,ZnFPU01], 4, [1,1], 1>; +defm : X86WriteRes<WriteVecMaskedStore32Y, [ZnAGU,ZnFPU01], 5, [1,2], 2>; +defm : X86WriteRes<WriteVecMaskedStore64, [ZnAGU,ZnFPU01], 4, [1,1], 1>; +defm : X86WriteRes<WriteVecMaskedStore64Y, [ZnAGU,ZnFPU01], 5, [1,2], 2>; defm : X86WriteRes<WriteVecMove, [ZnFPU], 1, [1], 1>; defm : X86WriteRes<WriteVecMoveX, [ZnFPU], 1, [1], 1>; defm : X86WriteRes<WriteVecMoveY, [ZnFPU], 2, [1], 2>; |