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| author | Dimitry Andric <dim@FreeBSD.org> | 2020-01-17 20:45:01 +0000 |
|---|---|---|
| committer | Dimitry Andric <dim@FreeBSD.org> | 2020-01-17 20:45:01 +0000 |
| commit | 706b4fc47bbc608932d3b491ae19a3b9cde9497b (patch) | |
| tree | 4adf86a776049cbf7f69a1929c4babcbbef925eb /llvm/lib/Target/Mips/MipsCondMov.td | |
| parent | 7cc9cf2bf09f069cb2dd947ead05d0b54301fb71 (diff) | |
| download | src-706b4fc47bbc608932d3b491ae19a3b9cde9497b.tar.gz src-706b4fc47bbc608932d3b491ae19a3b9cde9497b.zip | |
Vendor import of llvm-project master e26a78e70, the last commit beforevendor/llvm-project/llvmorg-10-init-17466-ge26a78e7085
the llvmorg-11-init tag, from which release/10.x was branched.
Notes
Notes:
svn path=/vendor/llvm-project/master/; revision=356843
svn path=/vendor/llvm-project/llvmorg-10-init-17466-ge26a78e7085/; revision=356844; tag=vendor/llvm-project/llvmorg-10-init-17466-ge26a78e7085
Diffstat (limited to 'llvm/lib/Target/Mips/MipsCondMov.td')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsCondMov.td | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/Target/Mips/MipsCondMov.td b/llvm/lib/Target/Mips/MipsCondMov.td index 5affbcbc2101..e9e09a188bf5 100644 --- a/llvm/lib/Target/Mips/MipsCondMov.td +++ b/llvm/lib/Target/Mips/MipsCondMov.td @@ -116,8 +116,8 @@ let AdditionalPredicates = [NotInMicroMips] in { ADD_FM<0, 0xa>, INSN_MIPS4_32_NOT_32R6_64R6, GPR_64; } - def MOVN_I_I : MMRel, CMov_I_I_FT<"movn", GPR32Opnd, GPR32Opnd, II_MOVN>, - ADD_FM<0, 0xb>, INSN_MIPS4_32_NOT_32R6_64R6; + def MOVN_I_I : MMRel, CMov_I_I_FT<"movn", GPR32Opnd, GPR32Opnd, II_MOVN>, + ADD_FM<0, 0xb>, INSN_MIPS4_32_NOT_32R6_64R6; let isCodeGenOnly = 1 in { def MOVN_I_I64 : CMov_I_I_FT<"movn", GPR32Opnd, GPR64Opnd, II_MOVN>, @@ -226,8 +226,8 @@ let AdditionalPredicates = [NotInMicroMips] in { GPR_64; defm : MovnPats<GPR64, GPR32, MOVN_I64_I, XOR64>, INSN_MIPS4_32_NOT_32R6_64R6, GPR_64; - defm : MovnPats<GPR64, GPR64, MOVN_I64_I64, XOR64>, INSN_MIPS4_32_NOT_32R6_64R6, - GPR_64; + defm : MovnPats<GPR64, GPR64, MOVN_I64_I64, XOR64>, + INSN_MIPS4_32_NOT_32R6_64R6, GPR_64; defm : MovzPats0<GPR32, FGR32, MOVZ_I_S, SLT, SLTu, SLTi, SLTiu>, INSN_MIPS4_32_NOT_32R6_64R6; @@ -236,8 +236,8 @@ let AdditionalPredicates = [NotInMicroMips] in { defm : MovzPats0<GPR64, FGR32, MOVZ_I_S, SLT64, SLTu64, SLTi64, SLTiu64>, INSN_MIPS4_32_NOT_32R6_64R6, GPR_64; - defm : MovzPats1<GPR64, FGR32, MOVZ_I64_S, XOR64>, INSN_MIPS4_32_NOT_32R6_64R6, - GPR_64; + defm : MovzPats1<GPR64, FGR32, MOVZ_I64_S, XOR64>, + INSN_MIPS4_32_NOT_32R6_64R6, GPR_64; defm : MovnPats<GPR64, FGR32, MOVN_I64_S, XOR64>, INSN_MIPS4_32_NOT_32R6_64R6, GPR_64; @@ -258,8 +258,8 @@ let AdditionalPredicates = [NotInMicroMips] in { INSN_MIPS4_32_NOT_32R6_64R6, FGR_64; defm : MovnPats<GPR32, FGR64, MOVN_I_D64, XOR>, INSN_MIPS4_32_NOT_32R6_64R6, FGR_64; - defm : MovnPats<GPR64, FGR64, MOVN_I64_D64, XOR64>, INSN_MIPS4_32_NOT_32R6_64R6, - FGR_64; + defm : MovnPats<GPR64, FGR64, MOVN_I64_D64, XOR64>, + INSN_MIPS4_32_NOT_32R6_64R6, FGR_64; } // For targets that don't have conditional-move instructions // we have to match SELECT nodes with pseudo instructions. |