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author | Dimitry Andric <dim@FreeBSD.org> | 2021-02-16 20:13:02 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2021-02-16 20:13:02 +0000 |
commit | b60736ec1405bb0a8dd40989f67ef4c93da068ab (patch) | |
tree | 5c43fbb7c9fc45f0f87e0e6795a86267dbd12f9d /llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | |
parent | cfca06d7963fa0909f90483b42a6d7d194d01e08 (diff) | |
download | src-b60736ec1405bb0a8dd40989f67ef4c93da068ab.tar.gz src-b60736ec1405bb0a8dd40989f67ef4c93da068ab.zip |
Vendor import of llvm-project main 8e464dd76bef, the last commit beforevendor/llvm-project/llvmorg-12-init-17869-g8e464dd76bef
the upstream release/12.x branch was created.
Diffstat (limited to 'llvm/lib/Target/AMDGPU/R600InstrInfo.cpp')
-rw-r--r-- | llvm/lib/Target/AMDGPU/R600InstrInfo.cpp | 44 |
1 files changed, 11 insertions, 33 deletions
diff --git a/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp b/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp index 088cf16d8ed2..7a623f3e304e 100644 --- a/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp +++ b/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp @@ -13,33 +13,10 @@ #include "R600InstrInfo.h" #include "AMDGPU.h" -#include "AMDGPUInstrInfo.h" -#include "AMDGPUSubtarget.h" -#include "R600Defines.h" -#include "R600FrameLowering.h" -#include "R600RegisterInfo.h" #include "MCTargetDesc/AMDGPUMCTargetDesc.h" -#include "Utils/AMDGPUBaseInfo.h" -#include "llvm/ADT/BitVector.h" +#include "R600Defines.h" +#include "R600Subtarget.h" #include "llvm/ADT/SmallSet.h" -#include "llvm/ADT/SmallVector.h" -#include "llvm/CodeGen/MachineBasicBlock.h" -#include "llvm/CodeGen/MachineFrameInfo.h" -#include "llvm/CodeGen/MachineFunction.h" -#include "llvm/CodeGen/MachineInstr.h" -#include "llvm/CodeGen/MachineInstrBuilder.h" -#include "llvm/CodeGen/MachineOperand.h" -#include "llvm/CodeGen/MachineRegisterInfo.h" -#include "llvm/CodeGen/TargetRegisterInfo.h" -#include "llvm/CodeGen/TargetSubtargetInfo.h" -#include "llvm/Support/ErrorHandling.h" -#include <algorithm> -#include <cassert> -#include <cstdint> -#include <cstring> -#include <iterator> -#include <utility> -#include <vector> using namespace llvm; @@ -97,7 +74,7 @@ bool R600InstrInfo::isLegalToSplitMBBAt(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI) const { for (MachineInstr::const_mop_iterator I = MBBI->operands_begin(), E = MBBI->operands_end(); I != E; ++I) { - if (I->isReg() && !Register::isVirtualRegister(I->getReg()) && I->isUse() && + if (I->isReg() && !I->getReg().isVirtual() && I->isUse() && RI.isPhysRegLiveAcrossClauses(I->getReg())) return false; } @@ -242,7 +219,7 @@ bool R600InstrInfo::readsLDSSrcReg(const MachineInstr &MI) const { for (MachineInstr::const_mop_iterator I = MI.operands_begin(), E = MI.operands_end(); I != E; ++I) { - if (!I->isReg() || !I->isUse() || Register::isVirtualRegister(I->getReg())) + if (!I->isReg() || !I->isUse() || I->getReg().isVirtual()) continue; if (R600::R600_LDS_SRC_REGRegClass.contains(I->getReg())) @@ -963,8 +940,9 @@ R600InstrInfo::reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) con return false; } -bool R600InstrInfo::DefinesPredicate(MachineInstr &MI, - std::vector<MachineOperand> &Pred) const { +bool R600InstrInfo::ClobbersPredicate(MachineInstr &MI, + std::vector<MachineOperand> &Pred, + bool SkipDead) const { return isPredicateSetter(MI.getOpcode()); } @@ -1191,15 +1169,15 @@ int R600InstrInfo::getIndirectIndexBegin(const MachineFunction &MF) const { const TargetRegisterClass *IndirectRC = getIndirectAddrRegClass(); for (std::pair<unsigned, unsigned> LI : MRI.liveins()) { - unsigned Reg = LI.first; - if (Register::isVirtualRegister(Reg) || !IndirectRC->contains(Reg)) + Register Reg = LI.first; + if (Reg.isVirtual() || !IndirectRC->contains(Reg)) continue; unsigned RegIndex; unsigned RegEnd; for (RegIndex = 0, RegEnd = IndirectRC->getNumRegs(); RegIndex != RegEnd; ++RegIndex) { - if (IndirectRC->getRegister(RegIndex) == Reg) + if (IndirectRC->getRegister(RegIndex) == (unsigned)Reg) break; } Offset = std::max(Offset, (int)RegIndex); @@ -1225,7 +1203,7 @@ int R600InstrInfo::getIndirectIndexEnd(const MachineFunction &MF) const { const R600FrameLowering *TFL = ST.getFrameLowering(); Register IgnoredFrameReg; - Offset = TFL->getFrameIndexReference(MF, -1, IgnoredFrameReg); + Offset = TFL->getFrameIndexReference(MF, -1, IgnoredFrameReg).getFixed(); return getIndirectIndexBegin(MF) + Offset; } |