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author | Dimitry Andric <dim@FreeBSD.org> | 2022-07-03 14:10:23 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2022-07-03 14:10:23 +0000 |
commit | 145449b1e420787bb99721a429341fa6be3adfb6 (patch) | |
tree | 1d56ae694a6de602e348dd80165cf881a36600ed /llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | |
parent | ecbca9f5fb7d7613d2b94982c4825eb0d33d6842 (diff) | |
download | src-145449b1e420787bb99721a429341fa6be3adfb6.tar.gz src-145449b1e420787bb99721a429341fa6be3adfb6.zip |
Vendor import of llvm-project main llvmorg-15-init-15358-g53dc0f107877.vendor/llvm-project/llvmorg-15-init-15358-g53dc0f107877
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp')
-rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp | 158 |
1 files changed, 9 insertions, 149 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp index e82f9232b114..77816a783630 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp @@ -50,11 +50,6 @@ static cl::opt<bool> EnableVGPRIndexMode( cl::desc("Use GPR indexing mode instead of movrel for vector indexing"), cl::init(false)); -static cl::opt<bool> EnableFlatScratch( - "amdgpu-enable-flat-scratch", - cl::desc("Use flat scratch instructions"), - cl::init(false)); - static cl::opt<bool> UseAA("amdgpu-use-aa-in-codegen", cl::desc("Enable the use of AA during codegen."), cl::init(true)); @@ -159,26 +154,7 @@ GCNSubtarget::initializeSubtargetDependencies(const Triple &TT, return *this; } -AMDGPUSubtarget::AMDGPUSubtarget(const Triple &TT) : - TargetTriple(TT), - GCN3Encoding(false), - Has16BitInsts(false), - HasMadMixInsts(false), - HasMadMacF32Insts(false), - HasDsSrc2Insts(false), - HasSDWA(false), - HasVOP3PInsts(false), - HasMulI24(true), - HasMulU24(true), - HasSMulHi(false), - HasInv2PiInlineImm(false), - HasFminFmaxLegacy(true), - EnablePromoteAlloca(false), - HasTrigReducedRange(false), - MaxWavesPerEU(10), - LocalMemorySize(0), - WavefrontSizeLog2(0) - { } +AMDGPUSubtarget::AMDGPUSubtarget(const Triple &TT) : TargetTriple(TT) {} GCNSubtarget::GCNSubtarget(const Triple &TT, StringRef GPU, StringRef FS, const GCNTargetMachine &TM) @@ -187,120 +163,7 @@ GCNSubtarget::GCNSubtarget(const Triple &TT, StringRef GPU, StringRef FS, AMDGPUSubtarget(TT), TargetTriple(TT), TargetID(*this), - Gen(INVALID), InstrItins(getInstrItineraryForCPU(GPU)), - LDSBankCount(0), - MaxPrivateElementSize(0), - - FastFMAF32(false), - FastDenormalF32(false), - HalfRate64Ops(false), - FullRate64Ops(false), - - FlatForGlobal(false), - AutoWaitcntBeforeBarrier(false), - UnalignedScratchAccess(false), - UnalignedAccessMode(false), - - HasApertureRegs(false), - SupportsXNACK(false), - EnableXNACK(false), - EnableTgSplit(false), - EnableCuMode(false), - TrapHandler(false), - - EnableLoadStoreOpt(false), - EnableUnsafeDSOffsetFolding(false), - EnableSIScheduler(false), - EnableDS128(false), - EnablePRTStrictNull(false), - DumpCode(false), - - FP64(false), - CIInsts(false), - GFX8Insts(false), - GFX9Insts(false), - GFX90AInsts(false), - GFX10Insts(false), - GFX10_3Insts(false), - GFX7GFX8GFX9Insts(false), - SGPRInitBug(false), - NegativeScratchOffsetBug(false), - NegativeUnalignedScratchOffsetBug(false), - HasSMemRealTime(false), - HasIntClamp(false), - HasFmaMixInsts(false), - HasMovrel(false), - HasVGPRIndexMode(false), - HasScalarStores(false), - HasScalarAtomics(false), - HasSDWAOmod(false), - HasSDWAScalar(false), - HasSDWASdst(false), - HasSDWAMac(false), - HasSDWAOutModsVOPC(false), - HasDPP(false), - HasDPP8(false), - Has64BitDPP(false), - HasPackedFP32Ops(false), - HasExtendedImageInsts(false), - HasR128A16(false), - HasGFX10A16(false), - HasG16(false), - HasNSAEncoding(false), - NSAMaxSize(0), - GFX10_AEncoding(false), - GFX10_BEncoding(false), - HasDLInsts(false), - HasDot1Insts(false), - HasDot2Insts(false), - HasDot3Insts(false), - HasDot4Insts(false), - HasDot5Insts(false), - HasDot6Insts(false), - HasDot7Insts(false), - HasMAIInsts(false), - HasPkFmacF16Inst(false), - HasAtomicFaddInsts(false), - SupportsSRAMECC(false), - EnableSRAMECC(false), - HasNoSdstCMPX(false), - HasVscnt(false), - HasGetWaveIdInst(false), - HasSMemTimeInst(false), - HasShaderCyclesRegister(false), - HasVOP3Literal(false), - HasNoDataDepHazard(false), - FlatAddressSpace(false), - FlatInstOffsets(false), - FlatGlobalInsts(false), - FlatScratchInsts(false), - ScalarFlatScratchInsts(false), - HasArchitectedFlatScratch(false), - AddNoCarryInsts(false), - HasUnpackedD16VMem(false), - LDSMisalignedBug(false), - HasMFMAInlineLiteralBug(false), - UnalignedBufferAccess(false), - UnalignedDSAccess(false), - HasPackedTID(false), - - ScalarizeGlobal(false), - - HasVcmpxPermlaneHazard(false), - HasVMEMtoScalarWriteHazard(false), - HasSMEMtoVectorWriteHazard(false), - HasInstFwdPrefetchBug(false), - HasVcmpxExecWARHazard(false), - HasLdsBranchVmemWARHazard(false), - HasNSAtoVMEMBug(false), - HasNSAClauseBug(false), - HasOffset3fBug(false), - HasFlatSegmentOffsetBug(false), - HasImageStoreD16Bug(false), - HasImageGather4D16Bug(false), - - FeatureDisable(false), InstrInfo(initializeSubtargetDependencies(TT, GPU, FS)), TLInfo(TM, *this), FrameLowering(TargetFrameLowering::StackGrowsUp, getStackAlignment(), 0) { @@ -314,11 +177,6 @@ GCNSubtarget::GCNSubtarget(const Triple &TT, StringRef GPU, StringRef FS, *this, *static_cast<AMDGPURegisterBankInfo *>(RegBankInfo.get()), TM)); } -bool GCNSubtarget::enableFlatScratch() const { - return flatScratchIsArchitected() || - (EnableFlatScratch && hasFlatScratchInsts()); -} - unsigned GCNSubtarget::getConstantBusLimit(unsigned Opcode) const { if (getGeneration() < GFX10) return 1; @@ -326,12 +184,15 @@ unsigned GCNSubtarget::getConstantBusLimit(unsigned Opcode) const { switch (Opcode) { case AMDGPU::V_LSHLREV_B64_e64: case AMDGPU::V_LSHLREV_B64_gfx10: + case AMDGPU::V_LSHLREV_B64_e64_gfx11: case AMDGPU::V_LSHL_B64_e64: case AMDGPU::V_LSHRREV_B64_e64: case AMDGPU::V_LSHRREV_B64_gfx10: + case AMDGPU::V_LSHRREV_B64_e64_gfx11: case AMDGPU::V_LSHR_B64_e64: case AMDGPU::V_ASHRREV_I64_e64: case AMDGPU::V_ASHRREV_I64_gfx10: + case AMDGPU::V_ASHRREV_I64_e64_gfx11: case AMDGPU::V_ASHR_I64_e64: return 1; } @@ -658,7 +519,8 @@ unsigned AMDGPUSubtarget::getImplicitArgNumBytes(const Function &F) const { return 16; // Assume all implicit inputs are used by default - return AMDGPU::getIntegerAttribute(F, "amdgpu-implicitarg-num-bytes", 56); + unsigned NBytes = (AMDGPU::getAmdhsaCodeObjectVersion() >= 5) ? 256 : 56; + return AMDGPU::getIntegerAttribute(F, "amdgpu-implicitarg-num-bytes", NBytes); } uint64_t AMDGPUSubtarget::getExplicitKernArgSize(const Function &F, @@ -673,13 +535,11 @@ uint64_t AMDGPUSubtarget::getExplicitKernArgSize(const Function &F, for (const Argument &Arg : F.args()) { const bool IsByRef = Arg.hasByRefAttr(); Type *ArgTy = IsByRef ? Arg.getParamByRefType() : Arg.getType(); - MaybeAlign Alignment = IsByRef ? Arg.getParamAlign() : None; - if (!Alignment) - Alignment = DL.getABITypeAlign(ArgTy); - + Align Alignment = DL.getValueOrABITypeAlignment( + IsByRef ? Arg.getParamAlign() : None, ArgTy); uint64_t AllocSize = DL.getTypeAllocSize(ArgTy); ExplicitArgBytes = alignTo(ExplicitArgBytes, Alignment) + AllocSize; - MaxAlign = max(MaxAlign, Alignment); + MaxAlign = std::max(MaxAlign, Alignment); } return ExplicitArgBytes; |