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author | Eitan Adler <eadler@FreeBSD.org> | 2013-11-30 22:17:27 +0000 |
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committer | Eitan Adler <eadler@FreeBSD.org> | 2013-11-30 22:17:27 +0000 |
commit | 7a22215c5346c9009d1dfa4d3c118ff99f89d184 (patch) | |
tree | 050fb3b68519f6ef7d59051550fa29cdd79d6dac /lib | |
parent | c8aef31d309ac3f874c461619248fee9c1d74c2f (diff) | |
download | src-7a22215c5346c9009d1dfa4d3c118ff99f89d184.tar.gz src-7a22215c5346c9009d1dfa4d3c118ff99f89d184.zip |
Fix undefined behavior: (1 << 31) is not defined as 1 is an int and this
shifts into the sign bit. Instead use (1U << 31) which gets the
expected result.
This fix is not ideal as it assumes a 32 bit int, but does fix the issue
for most cases.
A similar change was made in OpenBSD.
Discussed with: -arch, rdivacky
Reviewed by: cperciva
Notes
Notes:
svn path=/head/; revision=258780
Diffstat (limited to 'lib')
-rw-r--r-- | lib/libc/sparc64/fpu/fpu.c | 6 | ||||
-rw-r--r-- | lib/libc/sparc64/fpu/fpu_sqrt.c | 2 | ||||
-rw-r--r-- | lib/libc/xdr/xdr_rec.c | 2 |
3 files changed, 5 insertions, 5 deletions
diff --git a/lib/libc/sparc64/fpu/fpu.c b/lib/libc/sparc64/fpu/fpu.c index 4e92788114d5..431207f8a585 100644 --- a/lib/libc/sparc64/fpu/fpu.c +++ b/lib/libc/sparc64/fpu/fpu.c @@ -202,7 +202,7 @@ static const int opmask[] = {0, 0, 1, 3, 1}; * Implement a move operation for all supported operand types. The additional * nand and xor parameters will be applied to the upper 32 bit word of the * source operand. This allows to implement fabs and fneg (for fp operands - * only!) using this functions, too, by passing (1 << 31) for one of the + * only!) using this functions, too, by passing (1U << 31) for one of the * parameters, and 0 for the other. */ static void @@ -358,10 +358,10 @@ __fpu_execute(struct utrapframe *uf, struct fpemu *fe, u_int32_t insn, __fpu_mov(fe, type, rd, rs2, 0, 0); return (0); case FOP(INS2_FPop1, INSFP1_FNEG): - __fpu_mov(fe, type, rd, rs2, 0, (1 << 31)); + __fpu_mov(fe, type, rd, rs2, 0, (1U << 31)); return (0); case FOP(INS2_FPop1, INSFP1_FABS): - __fpu_mov(fe, type, rd, rs2, (1 << 31), 0); + __fpu_mov(fe, type, rd, rs2, (1U << 31), 0); return (0); case FOP(INS2_FPop1, INSFP1_FSQRT): __fpu_explode(fe, &fe->fe_f1, type, rs2); diff --git a/lib/libc/sparc64/fpu/fpu_sqrt.c b/lib/libc/sparc64/fpu/fpu_sqrt.c index 364384b41f69..52290f2b90c4 100644 --- a/lib/libc/sparc64/fpu/fpu_sqrt.c +++ b/lib/libc/sparc64/fpu/fpu_sqrt.c @@ -257,7 +257,7 @@ __fpu_sqrt(fe) * double x correctly while doing the `known q=1.0'. * * We do this one mantissa-word at a time, as noted above, to - * save work. To avoid `(1 << 31) << 1', we also do the top bit + * save work. To avoid `(1U << 31) << 1', we also do the top bit * outside of each per-word loop. * * The calculation `t = y + bit' breaks down into `t0 = y0, ..., diff --git a/lib/libc/xdr/xdr_rec.c b/lib/libc/xdr/xdr_rec.c index dc4aa18f14bf..4c94acbd61a8 100644 --- a/lib/libc/xdr/xdr_rec.c +++ b/lib/libc/xdr/xdr_rec.c @@ -106,7 +106,7 @@ static const struct xdr_ops xdrrec_ops = { * meet the needs of xdr and rpc based on tcp. */ -#define LAST_FRAG ((u_int32_t)(1 << 31)) +#define LAST_FRAG ((u_int32_t)(1U << 31)) typedef struct rec_strm { char *tcp_handle; |