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| author | David Schultz <das@FreeBSD.org> | 2005-01-14 07:09:23 +0000 |
|---|---|---|
| committer | David Schultz <das@FreeBSD.org> | 2005-01-14 07:09:23 +0000 |
| commit | f365db00e515ef3f259a968aa46af64507907ade (patch) | |
| tree | 778e40f1835a14db783dd55f64577070b85926a2 /lib/msun/powerpc | |
| parent | f66b04788834ced9e397f0b704c78e7dd048c31f (diff) | |
| download | src-f365db00e515ef3f259a968aa46af64507907ade.tar.gz src-f365db00e515ef3f259a968aa46af64507907ade.zip | |
Mark all inline asms that read the floating-point control or status
registers as volatile. Instructions that *wrote* to FP state were
already marked volatile, but apparently gcc has license to move
non-volatile asms past volatile asms. This broke amd64's feupdateenv
at -O2 due to a WAR conflict between fnstsw and fldenv there.
Notes
Notes:
svn path=/head/; revision=140219
Diffstat (limited to 'lib/msun/powerpc')
| -rw-r--r-- | lib/msun/powerpc/fenv.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/lib/msun/powerpc/fenv.h b/lib/msun/powerpc/fenv.h index ece436ca4c76..ed9d935aa1dd 100644 --- a/lib/msun/powerpc/fenv.h +++ b/lib/msun/powerpc/fenv.h @@ -82,7 +82,7 @@ extern const fenv_t __fe_dfl_env; #define _ENABLE_MASK ((FE_DIVBYZERO | FE_INEXACT | FE_INVALID | \ FE_OVERFLOW | FE_UNDERFLOW) >> _FPUSW_SHIFT) -#define __mffs(__env) __asm("mffs %0" : "=f" (*(__env))) +#define __mffs(__env) __asm __volatile("mffs %0" : "=f" (*(__env))) #define __mtfsf(__env) __asm __volatile("mtfsf 255,%0" : : "f" (__env)) union __fpscr { |