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| author | Thomas Moestl <tmm@FreeBSD.org> | 2002-03-11 03:18:17 +0000 |
|---|---|---|
| committer | Thomas Moestl <tmm@FreeBSD.org> | 2002-03-11 03:18:17 +0000 |
| commit | d095bc220d2e453035f7607352ab7e5a732cb0d1 (patch) | |
| tree | 030517175f5f142fc9fd099096c5c1603614a5a6 /lib/libc/sparc64/fpu/fpu.c | |
| parent | 61de6bb54c5a8f1bf2839394e1fadd1bff1c626e (diff) | |
| download | src-d095bc220d2e453035f7607352ab7e5a732cb0d1.tar.gz src-d095bc220d2e453035f7607352ab7e5a732cb0d1.zip | |
Fix some bugs that would prevent %fsr to be set correctly, and add
support for fcmp and fcmpe instructions with a condition code
specification other than %fcc0.
This (primarily the first part) seems to fix a lot of problems that
people were seeing, e.g. perl and gawk failures.
Reported and analyzed by: wollman
Notes
Notes:
svn path=/head/; revision=92055
Diffstat (limited to 'lib/libc/sparc64/fpu/fpu.c')
| -rw-r--r-- | lib/libc/sparc64/fpu/fpu.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/lib/libc/sparc64/fpu/fpu.c b/lib/libc/sparc64/fpu/fpu.c index c026f867bd0c..2c454e319283 100644 --- a/lib/libc/sparc64/fpu/fpu.c +++ b/lib/libc/sparc64/fpu/fpu.c @@ -187,7 +187,7 @@ __fpu_exception(struct utrapframe *uf) goto fatal; } - fe.fe_fsr = fsr; + fe.fe_fsr = fsr & ~FSR_FTT_MASK; insn = *(u_int32_t *)uf->uf_pc; if (IF_OP(insn) != IOP_MISC || (IF_F3_OP3(insn) != INS2_FPop1 && IF_F3_OP3(insn) != INS2_FPop2)) @@ -268,7 +268,8 @@ __fpu_ccmov(struct fpemu *fe, int type, int rd, int rs1, int rs2, static int __fpu_cmpck(struct fpemu *fe) { - int cx, fsr; + u_long fsr; + int cx; /* * The only possible exception here is NV; catch it @@ -391,12 +392,12 @@ __fpu_execute(struct utrapframe *uf, struct fpemu *fe, u_int32_t insn, u_long ts case FOP(INS2_FPop2, INSFP2_FCMP): __fpu_explode(fe, &fe->fe_f1, type, rs1); __fpu_explode(fe, &fe->fe_f2, type, rs2); - __fpu_compare(fe, 0); + __fpu_compare(fe, 0, IF_F3_CC(insn)); return (__fpu_cmpck(fe)); case FOP(INS2_FPop2, INSFP2_FCMPE): __fpu_explode(fe, &fe->fe_f1, type, rs1); __fpu_explode(fe, &fe->fe_f2, type, rs2); - __fpu_compare(fe, 1); + __fpu_compare(fe, 1, IF_F3_CC(insn)); return (__fpu_cmpck(fe)); case FOP(INS2_FPop1, INSFP1_FMOV): /* these should all be pretty obvious */ __fpu_mov(fe, type, rd, __fpu_getreg(rs2), rs2); |