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author | Dimitry Andric <dim@FreeBSD.org> | 2013-12-22 00:04:03 +0000 |
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committer | Dimitry Andric <dim@FreeBSD.org> | 2013-12-22 00:04:03 +0000 |
commit | f8af5cf600354830d4ccf59732403f0f073eccb9 (patch) | |
tree | 2ba0398b4c42ad4f55561327538044fd2c925a8b /lib/Target/Mips/MipsInstrFormats.td | |
parent | 59d6cff90eecf31cb3dd860c4e786674cfdd42eb (diff) | |
download | src-f8af5cf600354830d4ccf59732403f0f073eccb9.tar.gz src-f8af5cf600354830d4ccf59732403f0f073eccb9.zip |
Vendor import of llvm release_34 branch r197841 (effectively, 3.4 RC3):vendor/llvm/llvm-release_34-r197841
Notes
Notes:
svn path=/vendor/llvm/dist/; revision=259698
svn path=/vendor/llvm/llvm-release_34-r197841/; revision=259700; tag=vendor/llvm/llvm-release_34-r197841
Diffstat (limited to 'lib/Target/Mips/MipsInstrFormats.td')
-rw-r--r-- | lib/Target/Mips/MipsInstrFormats.td | 143 |
1 files changed, 106 insertions, 37 deletions
diff --git a/lib/Target/Mips/MipsInstrFormats.td b/lib/Target/Mips/MipsInstrFormats.td index ea0737222125..737a018c67af 100644 --- a/lib/Target/Mips/MipsInstrFormats.td +++ b/lib/Target/Mips/MipsInstrFormats.td @@ -183,7 +183,7 @@ class BranchBase<bits<6> op, dag outs, dag ins, string asmstr, // Format J instruction class in Mips : <|opcode|address|> //===----------------------------------------------------------------------===// -class FJ<bits<6> op> +class FJ<bits<6> op> : StdArch { bits<26> target; @@ -272,7 +272,7 @@ class SRLV_FM<bits<6> funct, bit rotate> : StdArch { let Inst{5-0} = funct; } -class BEQ_FM<bits<6> op> { +class BEQ_FM<bits<6> op> : StdArch { bits<5> rs; bits<5> rt; bits<16> offset; @@ -285,7 +285,7 @@ class BEQ_FM<bits<6> op> { let Inst{15-0} = offset; } -class BGEZ_FM<bits<6> op, bits<5> funct> { +class BGEZ_FM<bits<6> op, bits<5> funct> : StdArch { bits<5> rs; bits<16> offset; @@ -297,17 +297,6 @@ class BGEZ_FM<bits<6> op, bits<5> funct> { let Inst{15-0} = offset; } -class B_FM { - bits<16> offset; - - bits<32> Inst; - - let Inst{31-26} = 4; - let Inst{25-21} = 0; - let Inst{20-16} = 0; - let Inst{15-0} = offset; -} - class SLTI_FM<bits<6> op> : StdArch { bits<5> rt; bits<5> rs; @@ -321,7 +310,7 @@ class SLTI_FM<bits<6> op> : StdArch { let Inst{15-0} = imm16; } -class MFLO_FM<bits<6> funct> { +class MFLO_FM<bits<6> funct> : StdArch { bits<5> rd; bits<32> Inst; @@ -333,7 +322,7 @@ class MFLO_FM<bits<6> funct> { let Inst{5-0} = funct; } -class MTLO_FM<bits<6> funct> { +class MTLO_FM<bits<6> funct> : StdArch { bits<5> rs; bits<32> Inst; @@ -344,7 +333,7 @@ class MTLO_FM<bits<6> funct> { let Inst{5-0} = funct; } -class SEB_FM<bits<5> funct, bits<6> funct2> { +class SEB_FM<bits<5> funct, bits<6> funct2> : StdArch { bits<5> rd; bits<5> rt; @@ -358,7 +347,7 @@ class SEB_FM<bits<5> funct, bits<6> funct2> { let Inst{5-0} = funct2; } -class CLO_FM<bits<6> funct> { +class CLO_FM<bits<6> funct> : StdArch { bits<5> rd; bits<5> rs; bits<5> rt; @@ -374,7 +363,7 @@ class CLO_FM<bits<6> funct> { let rt = rd; } -class LUI_FM { +class LUI_FM : StdArch { bits<5> rt; bits<16> imm16; @@ -386,7 +375,7 @@ class LUI_FM { let Inst{15-0} = imm16; } -class JALR_FM { +class JALR_FM : StdArch { bits<5> rd; bits<5> rs; @@ -400,18 +389,7 @@ class JALR_FM { let Inst{5-0} = 9; } -class BAL_FM { - bits<16> offset; - - bits<32> Inst; - - let Inst{31-26} = 1; - let Inst{25-21} = 0; - let Inst{20-16} = 0x11; - let Inst{15-0} = offset; -} - -class BGEZAL_FM<bits<5> funct> { +class BGEZAL_FM<bits<5> funct> : StdArch { bits<5> rs; bits<16> offset; @@ -446,7 +424,7 @@ class MULT_FM<bits<6> op, bits<6> funct> : StdArch { let Inst{5-0} = funct; } -class EXT_FM<bits<6> funct> { +class EXT_FM<bits<6> funct> : StdArch { bits<5> rt; bits<5> rs; bits<5> pos; @@ -476,6 +454,90 @@ class RDHWR_FM { let Inst{5-0} = 0x3b; } +class TEQ_FM<bits<6> funct> : StdArch { + bits<5> rs; + bits<5> rt; + bits<10> code_; + + bits<32> Inst; + + let Inst{31-26} = 0; + let Inst{25-21} = rs; + let Inst{20-16} = rt; + let Inst{15-6} = code_; + let Inst{5-0} = funct; +} + +class TEQI_FM<bits<5> funct> : StdArch { + bits<5> rs; + bits<16> imm16; + + bits<32> Inst; + + let Inst{31-26} = 1; + let Inst{25-21} = rs; + let Inst{20-16} = funct; + let Inst{15-0} = imm16; +} +//===----------------------------------------------------------------------===// +// System calls format <op|code_|funct> +//===----------------------------------------------------------------------===// + +class SYS_FM<bits<6> funct> +{ + bits<20> code_; + bits<32> Inst; + let Inst{31-26} = 0x0; + let Inst{25-6} = code_; + let Inst{5-0} = funct; +} + +//===----------------------------------------------------------------------===// +// Break instruction format <op|code_1|funct> +//===----------------------------------------------------------------------===// + +class BRK_FM<bits<6> funct> +{ + bits<10> code_1; + bits<10> code_2; + bits<32> Inst; + let Inst{31-26} = 0x0; + let Inst{25-16} = code_1; + let Inst{15-6} = code_2; + let Inst{5-0} = funct; +} + +//===----------------------------------------------------------------------===// +// Exception return format <Cop0|1|0|funct> +//===----------------------------------------------------------------------===// + +class ER_FM<bits<6> funct> +{ + bits<32> Inst; + let Inst{31-26} = 0x10; + let Inst{25} = 1; + let Inst{24-6} = 0; + let Inst{5-0} = funct; +} + + +//===----------------------------------------------------------------------===// +// Enable/disable interrupt instruction format <Cop0|MFMC0|rt|12|0|sc|0|0> +//===----------------------------------------------------------------------===// + +class EI_FM<bits<1> sc> +{ + bits<32> Inst; + bits<5> rt; + let Inst{31-26} = 0x10; + let Inst{25-21} = 0xb; + let Inst{20-16} = rt; + let Inst{15-11} = 0xc; + let Inst{10-6} = 0; + let Inst{5} = sc; + let Inst{4-0} = 0; +} + //===----------------------------------------------------------------------===// // // FLOATING POINT INSTRUCTION FORMATS @@ -609,13 +671,14 @@ class SWXC1_FM<bits<6> funct> { } class BC1F_FM<bit nd, bit tf> { + bits<3> fcc; bits<16> offset; bits<32> Inst; let Inst{31-26} = 0x11; let Inst{25-21} = 0x8; - let Inst{20-18} = 0; // cc + let Inst{20-18} = fcc; let Inst{17} = nd; let Inst{16} = tf; let Inst{15-0} = offset; @@ -637,6 +700,10 @@ class CEQS_FM<bits<5> fmt> { let Inst{3-0} = cond; } +class C_COND_FM<bits<5> fmt, bits<4> c> : CEQS_FM<fmt> { + let cond = c; +} + class CMov_I_F_FM<bits<6> funct, bits<5> fmt> { bits<5> fd; bits<5> fs; @@ -652,15 +719,16 @@ class CMov_I_F_FM<bits<6> funct, bits<5> fmt> { let Inst{5-0} = funct; } -class CMov_F_I_FM<bit tf> { +class CMov_F_I_FM<bit tf> : StdArch { bits<5> rd; bits<5> rs; + bits<3> fcc; bits<32> Inst; let Inst{31-26} = 0; let Inst{25-21} = rs; - let Inst{20-18} = 0; // cc + let Inst{20-18} = fcc; let Inst{17} = 0; let Inst{16} = tf; let Inst{15-11} = rd; @@ -671,12 +739,13 @@ class CMov_F_I_FM<bit tf> { class CMov_F_F_FM<bits<5> fmt, bit tf> { bits<5> fd; bits<5> fs; + bits<3> fcc; bits<32> Inst; let Inst{31-26} = 0x11; let Inst{25-21} = fmt; - let Inst{20-18} = 0; // cc + let Inst{20-18} = fcc; let Inst{17} = 0; let Inst{16} = tf; let Inst{15-11} = fs; |