aboutsummaryrefslogtreecommitdiff
path: root/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
diff options
context:
space:
mode:
authorRoman Divacky <rdivacky@FreeBSD.org>2009-11-18 14:58:34 +0000
committerRoman Divacky <rdivacky@FreeBSD.org>2009-11-18 14:58:34 +0000
commit907da171cc911d701da02a5cab898a9c49dd7724 (patch)
tree6a111e552c75afc66228e3d8f19b6731e4013f10 /lib/CodeGen/SelectionDAG/CallingConvLower.cpp
parent72cc50852bec44580ee7efe1aa2076273008a6ae (diff)
downloadsrc-907da171cc911d701da02a5cab898a9c49dd7724.tar.gz
src-907da171cc911d701da02a5cab898a9c49dd7724.zip
Update LLVM to r89205.
Notes
Notes: svn path=/vendor/llvm/dist/; revision=199481
Diffstat (limited to 'lib/CodeGen/SelectionDAG/CallingConvLower.cpp')
-rw-r--r--lib/CodeGen/SelectionDAG/CallingConvLower.cpp15
1 files changed, 15 insertions, 0 deletions
diff --git a/lib/CodeGen/SelectionDAG/CallingConvLower.cpp b/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
index fbe40b678639..38839c44131a 100644
--- a/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
+++ b/lib/CodeGen/SelectionDAG/CallingConvLower.cpp
@@ -77,6 +77,21 @@ CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
}
}
+/// CheckReturn - Analyze the return values of a function, returning true if
+/// the return can be performed without sret-demotion, and false otherwise.
+bool CCState::CheckReturn(const SmallVectorImpl<EVT> &OutTys,
+ const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags,
+ CCAssignFn Fn) {
+ // Determine which register each value should be copied into.
+ for (unsigned i = 0, e = OutTys.size(); i != e; ++i) {
+ EVT VT = OutTys[i];
+ ISD::ArgFlagsTy ArgFlags = ArgsFlags[i];
+ if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
+ return false;
+ }
+ return true;
+}
+
/// AnalyzeReturn - Analyze the returned values of a return,
/// incorporating info about the result values into this state.
void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,