Merge ^/head r277719 through 277776.

5 files changed, 150 insertions, 3 deletions

diff --git a/contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp b/contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
index d734d436add7..99ebcf338fcb 100644
--- a/contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
+++ b/contrib/llvm/lib/Target/AArch64/AArch64RegisterInfo.cpp
@@ -33,6 +33,10 @@ using namespace llvm;
 #define GET_REGINFO_TARGET_DESC
 #include "AArch64GenRegisterInfo.inc"
 
+static cl::opt<bool>
+ReserveX18("aarch64-reserve-x18", cl::Hidden,
+          cl::desc("Reserve X18, making it unavailable as GPR"));
+
 AArch64RegisterInfo::AArch64RegisterInfo(const AArch64InstrInfo *tii,
                                          const AArch64Subtarget *sti)
     : AArch64GenRegisterInfo(AArch64::LR), TII(tii), STI(sti) {}
@@ -90,7 +94,7 @@ AArch64RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
     Reserved.set(AArch64::W29);
   }
 
-  if (STI->isTargetDarwin()) {
+  if (STI->isTargetDarwin() || ReserveX18) {
     Reserved.set(AArch64::X18); // Platform register
     Reserved.set(AArch64::W18);
   }
@@ -117,7 +121,7 @@ bool AArch64RegisterInfo::isReservedReg(const MachineFunction &MF,
     return true;
   case AArch64::X18:
   case AArch64::W18:
-    return STI->isTargetDarwin();
+    return STI->isTargetDarwin() || ReserveX18;
   case AArch64::FP:
   case AArch64::W29:
     return TFI->hasFP(MF) || STI->isTargetDarwin();
@@ -379,7 +383,7 @@ unsigned AArch64RegisterInfo::getRegPressureLimit(const TargetRegisterClass *RC,
   case AArch64::GPR64commonRegClassID:
     return 32 - 1                                      // XZR/SP
            - (TFI->hasFP(MF) || STI->isTargetDarwin()) // FP
-           - STI->isTargetDarwin() // X18 reserved as platform register
+           - (STI->isTargetDarwin() || ReserveX18) // X18 reserved as platform register
            - hasBasePointer(MF);   // X19
   case AArch64::FPR8RegClassID:
   case AArch64::FPR16RegClassID:
diff --git a/contrib/llvm/patches/patch-06-llvm-r226664-aarch64-x18.diff b/contrib/llvm/patches/patch-06-llvm-r226664-aarch64-x18.diff
new file mode 100644
index 000000000000..887d3aa08ed2
--- /dev/null
+++ b/contrib/llvm/patches/patch-06-llvm-r226664-aarch64-x18.diff
@@ -0,0 +1,83 @@
+Pull in r226664 from upstream llvm trunk (by Tim Northover):
+
+  AArch64: add backend option to reserve x18 (platform register)
+
+  AAPCS64 says that it's up to the platform to specify whether x18 is
+  reserved, and a first step on that way is to add a flag controlling
+  it.
+
+  From: Andrew Turner <andrew@fubar.geek.nz>
+
+Introduced here: http://svnweb.freebsd.org/changeset/base/277774
+
+Index: lib/Target/AArch64/AArch64RegisterInfo.cpp
+===================================================================
+--- lib/Target/AArch64/AArch64RegisterInfo.cpp
++++ lib/Target/AArch64/AArch64RegisterInfo.cpp
+@@ -33,6 +33,10 @@ using namespace llvm;
+ #define GET_REGINFO_TARGET_DESC
+ #include "AArch64GenRegisterInfo.inc"
+ 
++static cl::opt<bool>
++ReserveX18("aarch64-reserve-x18", cl::Hidden,
++          cl::desc("Reserve X18, making it unavailable as GPR"));
++
+ AArch64RegisterInfo::AArch64RegisterInfo(const AArch64InstrInfo *tii,
+                                          const AArch64Subtarget *sti)
+     : AArch64GenRegisterInfo(AArch64::LR), TII(tii), STI(sti) {}
+@@ -90,7 +94,7 @@ AArch64RegisterInfo::getReservedRegs(const Machine
+     Reserved.set(AArch64::W29);
+   }
+ 
+-  if (STI->isTargetDarwin()) {
++  if (STI->isTargetDarwin() || ReserveX18) {
+     Reserved.set(AArch64::X18); // Platform register
+     Reserved.set(AArch64::W18);
+   }
+@@ -117,7 +121,7 @@ bool AArch64RegisterInfo::isReservedReg(const Mach
+     return true;
+   case AArch64::X18:
+   case AArch64::W18:
+-    return STI->isTargetDarwin();
++    return STI->isTargetDarwin() || ReserveX18;
+   case AArch64::FP:
+   case AArch64::W29:
+     return TFI->hasFP(MF) || STI->isTargetDarwin();
+@@ -379,7 +383,7 @@ unsigned AArch64RegisterInfo::getRegPressureLimit(
+   case AArch64::GPR64commonRegClassID:
+     return 32 - 1                                      // XZR/SP
+            - (TFI->hasFP(MF) || STI->isTargetDarwin()) // FP
+-           - STI->isTargetDarwin() // X18 reserved as platform register
++           - (STI->isTargetDarwin() || ReserveX18) // X18 reserved as platform register
+            - hasBasePointer(MF);   // X19
+   case AArch64::FPR8RegClassID:
+   case AArch64::FPR16RegClassID:
+Index: test/CodeGen/AArch64/arm64-platform-reg.ll
+===================================================================
+--- test/CodeGen/AArch64/arm64-platform-reg.ll
++++ test/CodeGen/AArch64/arm64-platform-reg.ll
+@@ -1,4 +1,5 @@
+-; RUN: llc -mtriple=arm64-apple-ios -o - %s | FileCheck %s --check-prefix=CHECK-DARWIN
++; RUN: llc -mtriple=arm64-apple-ios -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18
++; RUN: llc -mtriple=arm64-freebsd-gnu -aarch64-reserve-x18 -o - %s | FileCheck %s --check-prefix=CHECK-RESERVE-X18
+ ; RUN: llc -mtriple=arm64-linux-gnu -o - %s | FileCheck %s
+ 
+ ; x18 is reserved as a platform register on Darwin but not on other
+@@ -16,11 +17,11 @@ define void @keep_live() {
+ ; CHECK: ldr x18
+ ; CHECK: str x18
+ 
+-; CHECK-DARWIN-NOT: ldr fp
+-; CHECK-DARWIN-NOT: ldr x18
+-; CHECK-DARWIN: Spill
+-; CHECK-DARWIN-NOT: ldr fp
+-; CHECK-DARWIN-NOT: ldr x18
+-; CHECK-DARWIN: ret
++; CHECK-RESERVE-X18-NOT: ldr fp
++; CHECK-RESERVE-X18-NOT: ldr x18
++; CHECK-RESERVE-X18: Spill
++; CHECK-RESERVE-X18-NOT: ldr fp
++; CHECK-RESERVE-X18-NOT: ldr x18
++; CHECK-RESERVE-X18: ret
+   ret void
+ }
diff --git a/contrib/llvm/patches/patch-07-clang-r227062-fixes-x18.diff b/contrib/llvm/patches/patch-07-clang-r227062-fixes-x18.diff
new file mode 100644
index 000000000000..9316f5df8b8e
--- /dev/null
+++ b/contrib/llvm/patches/patch-07-clang-r227062-fixes-x18.diff
@@ -0,0 +1,53 @@
+Pull in r227062 from upstream clang trunk (by Renato Golin):
+
+  Allows Clang to use LLVM's fixes-x18 option
+
+  This patch allows clang to have llvm reserve the x18
+  platform register on AArch64. FreeBSD will use this in the kernel for
+  per-cpu data but has no need to reserve this register in userland so
+  will need this flag to reserve it.
+
+  This uses llvm r226664 to allow this register to be reserved.
+
+  Patch by Andrew Turner.
+
+Introduced here: http://svnweb.freebsd.org/changeset/base/277775
+
+Index: tools/clang/include/clang/Driver/Options.td
+===================================================================
+--- tools/clang/include/clang/Driver/Options.td
++++ tools/clang/include/clang/Driver/Options.td
+@@ -1209,6 +1209,8 @@ def mfix_cortex_a53_835769 : Flag<["-"], "mfix-cor
+ def mno_fix_cortex_a53_835769 : Flag<["-"], "mno-fix-cortex-a53-835769">,
+   Group<m_aarch64_Features_Group>,
+   HelpText<"Don't workaround Cortex-A53 erratum 835769 (AArch64 only)">;
++def ffixed_x18 : Flag<["-"], "ffixed-x18">, Group<m_aarch64_Features_Group>,
++  HelpText<"Reserve the x18 register (AArch64 only)">;
+ 
+ def mvsx : Flag<["-"], "mvsx">, Group<m_ppc_Features_Group>;
+ def mno_vsx : Flag<["-"], "mno-vsx">, Group<m_ppc_Features_Group>;
+Index: tools/clang/lib/Driver/Tools.cpp
+===================================================================
+--- tools/clang/lib/Driver/Tools.cpp
++++ tools/clang/lib/Driver/Tools.cpp
+@@ -958,6 +958,11 @@ void Clang::AddAArch64TargetArgs(const ArgList &Ar
+     if (A->getOption().matches(options::OPT_mno_global_merge))
+       CmdArgs.push_back("-mno-global-merge");
+   }
++
++  if (Args.hasArg(options::OPT_ffixed_x18)) {
++    CmdArgs.push_back("-backend-option");
++    CmdArgs.push_back("-aarch64-reserve-x18");
++  }
+ }
+ 
+ // Get CPU and ABI names. They are not independent
+Index: tools/clang/test/Driver/aarch64-fixed-x18.c
+===================================================================
+--- tools/clang/test/Driver/aarch64-fixed-x18.c
++++ tools/clang/test/Driver/aarch64-fixed-x18.c
+@@ -0,0 +1,4 @@
++// RUN: %clang -target aarch64-none-gnu -ffixed-x18 -### %s 2> %t
++// RUN: FileCheck --check-prefix=CHECK-FIXED-X18 < %t %s
++
++// CHECK-FIXED-X18: "-backend-option" "-aarch64-reserve-x18"
diff --git a/contrib/llvm/tools/clang/include/clang/Driver/Options.td b/contrib/llvm/tools/clang/include/clang/Driver/Options.td
index 4daddba332d7..b68a46bad84b 100644
--- a/contrib/llvm/tools/clang/include/clang/Driver/Options.td
+++ b/contrib/llvm/tools/clang/include/clang/Driver/Options.td
@@ -1209,6 +1209,8 @@ def mfix_cortex_a53_835769 : Flag<["-"], "mfix-cortex-a53-835769">,
 def mno_fix_cortex_a53_835769 : Flag<["-"], "mno-fix-cortex-a53-835769">,
   Group<m_aarch64_Features_Group>,
   HelpText<"Don't workaround Cortex-A53 erratum 835769 (AArch64 only)">;
+def ffixed_x18 : Flag<["-"], "ffixed-x18">, Group<m_aarch64_Features_Group>,
+  HelpText<"Reserve the x18 register (AArch64 only)">;
 
 def mvsx : Flag<["-"], "mvsx">, Group<m_ppc_Features_Group>;
 def mno_vsx : Flag<["-"], "mno-vsx">, Group<m_ppc_Features_Group>;
diff --git a/contrib/llvm/tools/clang/lib/Driver/Tools.cpp b/contrib/llvm/tools/clang/lib/Driver/Tools.cpp
index 86c6ac156419..daa581ec496d 100644
--- a/contrib/llvm/tools/clang/lib/Driver/Tools.cpp
+++ b/contrib/llvm/tools/clang/lib/Driver/Tools.cpp
@@ -958,6 +958,11 @@ void Clang::AddAArch64TargetArgs(const ArgList &Args,
     if (A->getOption().matches(options::OPT_mno_global_merge))
       CmdArgs.push_back("-mno-global-merge");
   }
+
+  if (Args.hasArg(options::OPT_ffixed_x18)) {
+    CmdArgs.push_back("-backend-option");
+    CmdArgs.push_back("-aarch64-reserve-x18");
+  }
 }
 
 // Get CPU and ABI names. They are not independent