Merge clang trunk r351319, resolve conflicts, and update FREEBSD-Xlist.

22 files changed, 472 insertions, 475 deletions

diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/AArch64.cpp b/contrib/llvm/tools/clang/lib/Basic/Targets/AArch64.cpp
index 3444591ac593..62919a02dcb9 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/AArch64.cpp
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/AArch64.cpp
@@ -37,11 +37,11 @@ const Builtin::Info AArch64TargetInfo::BuiltinInfo[] = {
 AArch64TargetInfo::AArch64TargetInfo(const llvm::Triple &Triple,
                                      const TargetOptions &Opts)
     : TargetInfo(Triple), ABI("aapcs") {
-  if (getTriple().getOS() == llvm::Triple::OpenBSD) {
+  if (getTriple().isOSOpenBSD()) {
     Int64Type = SignedLongLong;
     IntMaxType = SignedLongLong;
   } else {
-    if (!getTriple().isOSDarwin() && getTriple().getOS() != llvm::Triple::NetBSD)
+    if (!getTriple().isOSDarwin() && !getTriple().isOSNetBSD())
       WCharType = UnsignedInt;
 
     Int64Type = SignedLong;
@@ -122,10 +122,9 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts,
                                          MacroBuilder &Builder) const {
   // Target identification.
   Builder.defineMacro("__aarch64__");
-  // For bare-metal none-eabi.
+  // For bare-metal.
   if (getTriple().getOS() == llvm::Triple::UnknownOS &&
-      (getTriple().getEnvironment() == llvm::Triple::EABI ||
-       getTriple().getEnvironment() == llvm::Triple::EABIHF))
+      getTriple().isOSBinFormatELF())
     Builder.defineMacro("__ELF__");
 
   // Target properties.
@@ -195,6 +194,9 @@ void AArch64TargetInfo::getTargetDefines(const LangOptions &Opts,
   if (HasDotProd)
     Builder.defineMacro("__ARM_FEATURE_DOTPROD", "1");
 
+  if ((FPU & NeonMode) && HasFP16FML)
+    Builder.defineMacro("__ARM_FEATURE_FP16FML", "1");
+
   switch (ArchKind) {
   default:
     break;
@@ -232,6 +234,7 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
   Unaligned = 1;
   HasFullFP16 = 0;
   HasDotProd = 0;
+  HasFP16FML = 0;
   ArchKind = llvm::AArch64::ArchKind::ARMV8A;
 
   for (const auto &Feature : Features) {
@@ -253,6 +256,8 @@ bool AArch64TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
       HasFullFP16 = 1;
     if (Feature == "+dotprod")
       HasDotProd = 1;
+    if (Feature == "+fp16fml")
+      HasFP16FML = 1;
   }
 
   setDataLayout();
@@ -268,6 +273,7 @@ AArch64TargetInfo::checkCallingConvention(CallingConv CC) const {
   case CC_PreserveMost:
   case CC_PreserveAll:
   case CC_OpenCLKernel:
+  case CC_AArch64VectorCall:
   case CC_Win64:
     return CCCR_OK;
   default:
@@ -508,6 +514,7 @@ WindowsARM64TargetInfo::checkCallingConvention(CallingConv CC) const {
   case CC_OpenCLKernel:
   case CC_PreserveMost:
   case CC_PreserveAll:
+  case CC_Swift:
   case CC_Win64:
     return CCCR_OK;
   default:
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/AArch64.h b/contrib/llvm/tools/clang/lib/Basic/Targets/AArch64.h
index a9df895e4dad..d7f767abd4d1 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/AArch64.h
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/AArch64.h
@@ -34,6 +34,7 @@ class LLVM_LIBRARY_VISIBILITY AArch64TargetInfo : public TargetInfo {
   unsigned Unaligned;
   unsigned HasFullFP16;
   unsigned HasDotProd;
+  unsigned HasFP16FML;
   llvm::AArch64::ArchKind ArchKind;
 
   static const Builtin::Info BuiltinInfo[];
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/AMDGPU.cpp b/contrib/llvm/tools/clang/lib/Basic/Targets/AMDGPU.cpp
index b6b9aa2f1244..7313a692f46b 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/AMDGPU.cpp
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/AMDGPU.cpp
@@ -13,10 +13,10 @@
 
 #include "AMDGPU.h"
 #include "clang/Basic/Builtins.h"
+#include "clang/Basic/CodeGenOptions.h"
 #include "clang/Basic/LangOptions.h"
 #include "clang/Basic/MacroBuilder.h"
 #include "clang/Basic/TargetBuiltins.h"
-#include "clang/Frontend/CodeGenOptions.h"
 #include "llvm/ADT/StringSwitch.h"
 
 using namespace clang;
@@ -127,15 +127,19 @@ bool AMDGPUTargetInfo::initFeatureMap(
     llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
     const std::vector<std::string> &FeatureVec) const {
 
+  using namespace llvm::AMDGPU;
+
   // XXX - What does the member GPU mean if device name string passed here?
   if (isAMDGCN(getTriple())) {
     if (CPU.empty())
       CPU = "gfx600";
 
-    switch (parseAMDGCNName(CPU).Kind) {
+    switch (llvm::AMDGPU::parseArchAMDGCN(CPU)) {
     case GK_GFX906:
       Features["dl-insts"] = true;
+      Features["dot-insts"] = true;
       LLVM_FALLTHROUGH;
+    case GK_GFX909:
     case GK_GFX904:
     case GK_GFX902:
     case GK_GFX900:
@@ -145,15 +149,18 @@ bool AMDGPUTargetInfo::initFeatureMap(
     case GK_GFX803:
     case GK_GFX802:
     case GK_GFX801:
+      Features["vi-insts"] = true;
       Features["16-bit-insts"] = true;
       Features["dpp"] = true;
       Features["s-memrealtime"] = true;
-      break;
+      LLVM_FALLTHROUGH;
     case GK_GFX704:
     case GK_GFX703:
     case GK_GFX702:
     case GK_GFX701:
     case GK_GFX700:
+      Features["ci-insts"] = true;
+      LLVM_FALLTHROUGH;
     case GK_GFX601:
     case GK_GFX600:
       break;
@@ -166,7 +173,7 @@ bool AMDGPUTargetInfo::initFeatureMap(
     if (CPU.empty())
       CPU = "r600";
 
-    switch (parseR600Name(CPU).Kind) {
+    switch (llvm::AMDGPU::parseArchR600(CPU)) {
     case GK_CAYMAN:
     case GK_CYPRESS:
     case GK_RV770:
@@ -198,7 +205,7 @@ void AMDGPUTargetInfo::adjustTargetOptions(const CodeGenOptions &CGOpts,
                                            TargetOptions &TargetOpts) const {
   bool hasFP32Denormals = false;
   bool hasFP64Denormals = false;
-  GPUInfo CGOptsGPU = parseGPUName(TargetOpts.CPU);
+
   for (auto &I : TargetOpts.FeaturesAsWritten) {
     if (I == "+fp32-denormals" || I == "-fp32-denormals")
       hasFP32Denormals = true;
@@ -207,53 +214,20 @@ void AMDGPUTargetInfo::adjustTargetOptions(const CodeGenOptions &CGOpts,
   }
   if (!hasFP32Denormals)
     TargetOpts.Features.push_back(
-        (Twine(CGOptsGPU.HasFastFMAF && !CGOpts.FlushDenorm
-                   ? '+'
-                   : '-') +
-         Twine("fp32-denormals"))
+      (Twine(hasFastFMAF() && hasFullRateDenormalsF32() && !CGOpts.FlushDenorm
+             ? '+' : '-') + Twine("fp32-denormals"))
             .str());
   // Always do not flush fp64 or fp16 denorms.
-  if (!hasFP64Denormals && CGOptsGPU.HasFP64)
+  if (!hasFP64Denormals && hasFP64())
     TargetOpts.Features.push_back("+fp64-fp16-denormals");
 }
 
-constexpr AMDGPUTargetInfo::GPUInfo AMDGPUTargetInfo::InvalidGPU;
-constexpr AMDGPUTargetInfo::GPUInfo AMDGPUTargetInfo::R600GPUs[];
-constexpr AMDGPUTargetInfo::GPUInfo AMDGPUTargetInfo::AMDGCNGPUs[];
-
-AMDGPUTargetInfo::GPUInfo AMDGPUTargetInfo::parseR600Name(StringRef Name) {
-  const auto *Result = llvm::find_if(
-      R600GPUs, [Name](const GPUInfo &GPU) { return GPU.Name == Name; });
-
-  if (Result == std::end(R600GPUs))
-    return InvalidGPU;
-  return *Result;
-}
-
-AMDGPUTargetInfo::GPUInfo AMDGPUTargetInfo::parseAMDGCNName(StringRef Name) {
-  const auto *Result = llvm::find_if(
-      AMDGCNGPUs, [Name](const GPUInfo &GPU) { return GPU.Name == Name; });
-
-  if (Result == std::end(AMDGCNGPUs))
-    return InvalidGPU;
-  return *Result;
-}
-
-AMDGPUTargetInfo::GPUInfo AMDGPUTargetInfo::parseGPUName(StringRef Name) const {
-  if (isAMDGCN(getTriple()))
-    return parseAMDGCNName(Name);
-  else
-    return parseR600Name(Name);
-}
-
 void AMDGPUTargetInfo::fillValidCPUList(
     SmallVectorImpl<StringRef> &Values) const {
   if (isAMDGCN(getTriple()))
-    llvm::for_each(AMDGCNGPUs, [&Values](const GPUInfo &GPU) {
-                   Values.emplace_back(GPU.Name);});
+    llvm::AMDGPU::fillValidArchListAMDGCN(Values);
   else
-    llvm::for_each(R600GPUs, [&Values](const GPUInfo &GPU) {
-                   Values.emplace_back(GPU.Name);});
+    llvm::AMDGPU::fillValidArchListR600(Values);
 }
 
 void AMDGPUTargetInfo::setAddressSpaceMap(bool DefaultIsPrivate) {
@@ -263,7 +237,12 @@ void AMDGPUTargetInfo::setAddressSpaceMap(bool DefaultIsPrivate) {
 AMDGPUTargetInfo::AMDGPUTargetInfo(const llvm::Triple &Triple,
                                    const TargetOptions &Opts)
     : TargetInfo(Triple),
-      GPU(isAMDGCN(Triple) ? AMDGCNGPUs[0] : parseR600Name(Opts.CPU)) {
+      GPUKind(isAMDGCN(Triple) ?
+              llvm::AMDGPU::parseArchAMDGCN(Opts.CPU) :
+              llvm::AMDGPU::parseArchR600(Opts.CPU)),
+      GPUFeatures(isAMDGCN(Triple) ?
+                  llvm::AMDGPU::getArchAttrAMDGCN(GPUKind) :
+                  llvm::AMDGPU::getArchAttrR600(GPUKind)) {
   resetDataLayout(isAMDGCN(getTriple()) ? DataLayoutStringAMDGCN
                                         : DataLayoutStringR600);
   assert(DataLayout->getAllocaAddrSpace() == Private);
@@ -308,19 +287,22 @@ void AMDGPUTargetInfo::getTargetDefines(const LangOptions &Opts,
   else
     Builder.defineMacro("__R600__");
 
-  if (GPU.Kind != GK_NONE)
-    Builder.defineMacro(Twine("__") + Twine(GPU.CanonicalName) + Twine("__"));
+  if (GPUKind != llvm::AMDGPU::GK_NONE) {
+    StringRef CanonName = isAMDGCN(getTriple()) ?
+      getArchNameAMDGCN(GPUKind) : getArchNameR600(GPUKind);
+    Builder.defineMacro(Twine("__") + Twine(CanonName) + Twine("__"));
+  }
 
   // TODO: __HAS_FMAF__, __HAS_LDEXPF__, __HAS_FP64__ are deprecated and will be
   // removed in the near future.
-  if (GPU.HasFMAF)
+  if (hasFMAF())
     Builder.defineMacro("__HAS_FMAF__");
-  if (GPU.HasFastFMAF)
+  if (hasFastFMAF())
     Builder.defineMacro("FP_FAST_FMAF");
-  if (GPU.HasLDEXPF)
+  if (hasLDEXPF())
     Builder.defineMacro("__HAS_LDEXPF__");
-  if (GPU.HasFP64)
+  if (hasFP64())
     Builder.defineMacro("__HAS_FP64__");
-  if (GPU.HasFastFMA)
+  if (hasFastFMA())
     Builder.defineMacro("FP_FAST_FMA");
 }
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/AMDGPU.h b/contrib/llvm/tools/clang/lib/Basic/Targets/AMDGPU.h
index b0221031addf..926772809aa7 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/AMDGPU.h
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/AMDGPU.h
@@ -19,6 +19,7 @@
 #include "llvm/ADT/StringSet.h"
 #include "llvm/ADT/Triple.h"
 #include "llvm/Support/Compiler.h"
+#include "llvm/Support/TargetParser.h"
 
 namespace clang {
 namespace targets {
@@ -38,147 +39,47 @@ class LLVM_LIBRARY_VISIBILITY AMDGPUTargetInfo final : public TargetInfo {
   static const LangASMap AMDGPUDefIsGenMap;
   static const LangASMap AMDGPUDefIsPrivMap;
 
-  /// GPU kinds supported by the AMDGPU target.
-  enum GPUKind : uint32_t {
-    // Not specified processor.
-    GK_NONE = 0,
-
-    // R600-based processors.
-    GK_R600,
-    GK_R630,
-    GK_RS880,
-    GK_RV670,
-    GK_RV710,
-    GK_RV730,
-    GK_RV770,
-    GK_CEDAR,
-    GK_CYPRESS,
-    GK_JUNIPER,
-    GK_REDWOOD,
-    GK_SUMO,
-    GK_BARTS,
-    GK_CAICOS,
-    GK_CAYMAN,
-    GK_TURKS,
-
-    GK_R600_FIRST = GK_R600,
-    GK_R600_LAST = GK_TURKS,
-
-    // AMDGCN-based processors.
-    GK_GFX600,
-    GK_GFX601,
-    GK_GFX700,
-    GK_GFX701,
-    GK_GFX702,
-    GK_GFX703,
-    GK_GFX704,
-    GK_GFX801,
-    GK_GFX802,
-    GK_GFX803,
-    GK_GFX810,
-    GK_GFX900,
-    GK_GFX902,
-    GK_GFX904,
-    GK_GFX906,
-
-    GK_AMDGCN_FIRST = GK_GFX600,
-    GK_AMDGCN_LAST = GK_GFX906,
-  };
+  llvm::AMDGPU::GPUKind GPUKind;
+  unsigned GPUFeatures;
 
-  struct GPUInfo {
-    llvm::StringLiteral Name;
-    llvm::StringLiteral CanonicalName;
-    AMDGPUTargetInfo::GPUKind Kind;
-    bool HasFMAF;
-    bool HasFastFMAF;
-    bool HasLDEXPF;
-    bool HasFP64;
-    bool HasFastFMA;
-  };
 
-  static constexpr GPUInfo InvalidGPU =
-    {{""}, {""}, GK_NONE, false, false, false, false, false};
-  static constexpr GPUInfo R600GPUs[26] = {
-  // Name         Canonical    Kind        Has    Has    Has    Has    Has
-  //              Name                     FMAF   Fast   LDEXPF FP64   Fast
-  //                                              FMAF                 FMA
-    {{"r600"},    {"r600"},    GK_R600,    false, false, false, false, false},
-    {{"rv630"},   {"r600"},    GK_R600,    false, false, false, false, false},
-    {{"rv635"},   {"r600"},    GK_R600,    false, false, false, false, false},
-    {{"r630"},    {"r630"},    GK_R630,    false, false, false, false, false},
-    {{"rs780"},   {"rs880"},   GK_RS880,   false, false, false, false, false},
-    {{"rs880"},   {"rs880"},   GK_RS880,   false, false, false, false, false},
-    {{"rv610"},   {"rs880"},   GK_RS880,   false, false, false, false, false},
-    {{"rv620"},   {"rs880"},   GK_RS880,   false, false, false, false, false},
-    {{"rv670"},   {"rv670"},   GK_RV670,   false, false, false, false, false},
-    {{"rv710"},   {"rv710"},   GK_RV710,   false, false, false, false, false},
-    {{"rv730"},   {"rv730"},   GK_RV730,   false, false, false, false, false},
-    {{"rv740"},   {"rv770"},   GK_RV770,   false, false, false, false, false},
-    {{"rv770"},   {"rv770"},   GK_RV770,   false, false, false, false, false},
-    {{"cedar"},   {"cedar"},   GK_CEDAR,   false, false, false, false, false},
-    {{"palm"},    {"cedar"},   GK_CEDAR,   false, false, false, false, false},
-    {{"cypress"}, {"cypress"}, GK_CYPRESS, true,  false, false, false, false},
-    {{"hemlock"}, {"cypress"}, GK_CYPRESS, true,  false, false, false, false},
-    {{"juniper"}, {"juniper"}, GK_JUNIPER, false, false, false, false, false},
-    {{"redwood"}, {"redwood"}, GK_REDWOOD, false, false, false, false, false},
-    {{"sumo"},    {"sumo"},    GK_SUMO,    false, false, false, false, false},
-    {{"sumo2"},   {"sumo"},    GK_SUMO,    false, false, false, false, false},
-    {{"barts"},   {"barts"},   GK_BARTS,   false, false, false, false, false},
-    {{"caicos"},  {"caicos"},  GK_BARTS,   false, false, false, false, false},
-    {{"aruba"},   {"cayman"},  GK_CAYMAN,  true,  false, false, false, false},
-    {{"cayman"},  {"cayman"},  GK_CAYMAN,  true,  false, false, false, false},
-    {{"turks"},   {"turks"},   GK_TURKS,   false, false, false, false, false},
-  };
-  static constexpr GPUInfo AMDGCNGPUs[32] = {
-  // Name           Canonical    Kind        Has   Has    Has    Has   Has
-  //                Name                     FMAF  Fast   LDEXPF FP64  Fast
-  //                                               FMAF                FMA
-    {{"gfx600"},    {"gfx600"},  GK_GFX600,  true, true,  true,  true, true},
-    {{"tahiti"},    {"gfx600"},  GK_GFX600,  true, true,  true,  true, true},
-    {{"gfx601"},    {"gfx601"},  GK_GFX601,  true, false, true,  true, true},
-    {{"hainan"},    {"gfx601"},  GK_GFX601,  true, false, true,  true, true},
-    {{"oland"},     {"gfx601"},  GK_GFX601,  true, false, true,  true, true},
-    {{"pitcairn"},  {"gfx601"},  GK_GFX601,  true, false, true,  true, true},
-    {{"verde"},     {"gfx601"},  GK_GFX601,  true, false, true,  true, true},
-    {{"gfx700"},    {"gfx700"},  GK_GFX700,  true, false, true,  true, true},
-    {{"kaveri"},    {"gfx700"},  GK_GFX700,  true, false, true,  true, true},
-    {{"gfx701"},    {"gfx701"},  GK_GFX701,  true, true,  true,  true, true},
-    {{"hawaii"},    {"gfx701"},  GK_GFX701,  true, true,  true,  true, true},
-    {{"gfx702"},    {"gfx702"},  GK_GFX702,  true, true,  true,  true, true},
-    {{"gfx703"},    {"gfx703"},  GK_GFX703,  true, false, true,  true, true},
-    {{"kabini"},    {"gfx703"},  GK_GFX703,  true, false, true,  true, true},
-    {{"mullins"},   {"gfx703"},  GK_GFX703,  true, false, true,  true, true},
-    {{"gfx704"},    {"gfx704"},  GK_GFX704,  true, false, true,  true, true},
-    {{"bonaire"},   {"gfx704"},  GK_GFX704,  true, false, true,  true, true},
-    {{"gfx801"},    {"gfx801"},  GK_GFX801,  true, true,  true,  true, true},
-    {{"carrizo"},   {"gfx801"},  GK_GFX801,  true, true,  true,  true, true},
-    {{"gfx802"},    {"gfx802"},  GK_GFX802,  true, false, true,  true, true},
-    {{"iceland"},   {"gfx802"},  GK_GFX802,  true, false, true,  true, true},
-    {{"tonga"},     {"gfx802"},  GK_GFX802,  true, false, true,  true, true},
-    {{"gfx803"},    {"gfx803"},  GK_GFX803,  true, false, true,  true, true},
-    {{"fiji"},      {"gfx803"},  GK_GFX803,  true, false, true,  true, true},
-    {{"polaris10"}, {"gfx803"},  GK_GFX803,  true, false, true,  true, true},
-    {{"polaris11"}, {"gfx803"},  GK_GFX803,  true, false, true,  true, true},
-    {{"gfx810"},    {"gfx810"},  GK_GFX810,  true, false, true,  true, true},
-    {{"stoney"},    {"gfx810"},  GK_GFX810,  true, false, true,  true, true},
-    {{"gfx900"},    {"gfx900"},  GK_GFX900,  true, true,  true,  true, true},
-    {{"gfx902"},    {"gfx902"},  GK_GFX900,  true, true,  true,  true, true},
-    {{"gfx904"},    {"gfx904"},  GK_GFX904,  true, true,  true,  true, true},
-    {{"gfx906"},    {"gfx906"},  GK_GFX906,  true, true,  true,  true, true},
-  };
+  bool hasFP64() const {
+    return getTriple().getArch() == llvm::Triple::amdgcn ||
+           !!(GPUFeatures & llvm::AMDGPU::FEATURE_FP64);
+  }
 
-  static GPUInfo parseR600Name(StringRef Name);
+  /// Has fast fma f32
+  bool hasFastFMAF() const {
+    return !!(GPUFeatures & llvm::AMDGPU::FEATURE_FAST_FMA_F32);
+  }
 
-  static GPUInfo parseAMDGCNName(StringRef Name);
+  /// Has fast fma f64
+  bool hasFastFMA() const {
+    return getTriple().getArch() == llvm::Triple::amdgcn;
+  }
 
-  GPUInfo parseGPUName(StringRef Name) const;
+  bool hasFMAF() const {
+    return getTriple().getArch() == llvm::Triple::amdgcn ||
+           !!(GPUFeatures & llvm::AMDGPU::FEATURE_FMA);
+  }
 
-  GPUInfo GPU;
+  bool hasFullRateDenormalsF32() const {
+    return !!(GPUFeatures & llvm::AMDGPU::FEATURE_FAST_DENORMAL_F32);
+  }
+
+  bool hasLDEXPF() const {
+    return getTriple().getArch() == llvm::Triple::amdgcn ||
+           !!(GPUFeatures & llvm::AMDGPU::FEATURE_LDEXP);
+  }
 
   static bool isAMDGCN(const llvm::Triple &TT) {
     return TT.getArch() == llvm::Triple::amdgcn;
   }
 
+  static bool isR600(const llvm::Triple &TT) {
+    return TT.getArch() == llvm::Triple::r600;
+  }
+
 public:
   AMDGPUTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts);
 
@@ -187,10 +88,12 @@ public:
   void adjust(LangOptions &Opts) override;
 
   uint64_t getPointerWidthV(unsigned AddrSpace) const override {
-    if (GPU.Kind <= GK_R600_LAST)
+    if (isR600(getTriple()))
       return 32;
+
     if (AddrSpace == Private || AddrSpace == Local)
       return 32;
+
     return 64;
   }
 
@@ -321,20 +224,22 @@ public:
 
   bool isValidCPUName(StringRef Name) const override {
     if (getTriple().getArch() == llvm::Triple::amdgcn)
-      return GK_NONE != parseAMDGCNName(Name).Kind;
-    else
-      return GK_NONE != parseR600Name(Name).Kind;
+      return llvm::AMDGPU::parseArchAMDGCN(Name) != llvm::AMDGPU::GK_NONE;
+    return llvm::AMDGPU::parseArchR600(Name) != llvm::AMDGPU::GK_NONE;
   }
 
   void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override;
 
   bool setCPU(const std::string &Name) override {
-    if (getTriple().getArch() == llvm::Triple::amdgcn)
-      GPU = parseAMDGCNName(Name);
-    else
-      GPU = parseR600Name(Name);
+    if (getTriple().getArch() == llvm::Triple::amdgcn) {
+      GPUKind = llvm::AMDGPU::parseArchAMDGCN(Name);
+      GPUFeatures = llvm::AMDGPU::getArchAttrAMDGCN(GPUKind);
+    } else {
+      GPUKind = llvm::AMDGPU::parseArchR600(Name);
+      GPUFeatures = llvm::AMDGPU::getArchAttrR600(GPUKind);
+    }
 
-    return GK_NONE != GPU.Kind;
+    return GPUKind != llvm::AMDGPU::GK_NONE;
   }
 
   void setSupportedOpenCLOpts() override {
@@ -342,16 +247,20 @@ public:
     Opts.support("cl_clang_storage_class_specifiers");
     Opts.support("cl_khr_icd");
 
-    if (GPU.HasFP64)
+    bool IsAMDGCN = isAMDGCN(getTriple());
+
+    if (hasFP64())
       Opts.support("cl_khr_fp64");
-    if (GPU.Kind >= GK_CEDAR) {
+
+    if (IsAMDGCN || GPUKind >= llvm::AMDGPU::GK_CEDAR) {
       Opts.support("cl_khr_byte_addressable_store");
       Opts.support("cl_khr_global_int32_base_atomics");
       Opts.support("cl_khr_global_int32_extended_atomics");
       Opts.support("cl_khr_local_int32_base_atomics");
       Opts.support("cl_khr_local_int32_extended_atomics");
     }
-    if (GPU.Kind >= GK_AMDGCN_FIRST) {
+
+    if (IsAMDGCN) {
       Opts.support("cl_khr_fp16");
       Opts.support("cl_khr_int64_base_atomics");
       Opts.support("cl_khr_int64_extended_atomics");
@@ -378,6 +287,27 @@ public:
     }
   }
 
+  LangAS getOpenCLBuiltinAddressSpace(unsigned AS) const override {
+    switch (AS) {
+    case 0:
+      return LangAS::opencl_generic;
+    case 1:
+      return LangAS::opencl_global;
+    case 3:
+      return LangAS::opencl_local;
+    case 4:
+      return LangAS::opencl_constant;
+    case 5:
+      return LangAS::opencl_private;
+    default:
+      return getLangASFromTargetAS(AS);
+    }
+  }
+
+  LangAS getCUDABuiltinAddressSpace(unsigned AS) const override {
+    return LangAS::Default;
+  }
+
   llvm::Optional<LangAS> getConstantAddressSpace() const override {
     return getLangASFromTargetAS(Constant);
   }
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/ARC.cpp b/contrib/llvm/tools/clang/lib/Basic/Targets/ARC.cpp
new file mode 100644
index 000000000000..2159ab8e2020
--- /dev/null
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/ARC.cpp
@@ -0,0 +1,25 @@
+//===--- ARC.cpp - Implement ARC target feature support -------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file implements ARC TargetInfo objects.
+//
+//===----------------------------------------------------------------------===//
+
+#include "ARC.h"
+#include "clang/Basic/Builtins.h"
+#include "clang/Basic/MacroBuilder.h"
+#include "clang/Basic/TargetBuiltins.h"
+
+using namespace clang;
+using namespace clang::targets;
+
+void ARCTargetInfo::getTargetDefines(const LangOptions &Opts,
+                                     MacroBuilder &Builder) const {
+  Builder.defineMacro("__arc__");
+}

diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/ARC.h b/contrib/llvm/tools/clang/lib/Basic/Targets/ARC.h
new file mode 100644
index 000000000000..ee20568f3d5b
--- /dev/null
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/ARC.h
@@ -0,0 +1,74 @@
+//===--- ARC.h - Declare ARC target feature support -------------*- C++ -*-===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+//
+// This file declares ARC TargetInfo objects.
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_ARC_H
+#define LLVM_CLANG_LIB_BASIC_TARGETS_ARC_H
+
+#include "clang/Basic/TargetInfo.h"
+#include "clang/Basic/TargetOptions.h"
+#include "llvm/ADT/Triple.h"
+#include "llvm/Support/Compiler.h"
+
+namespace clang {
+namespace targets {
+
+class LLVM_LIBRARY_VISIBILITY ARCTargetInfo : public TargetInfo {
+public:
+  ARCTargetInfo(const llvm::Triple &Triple, const TargetOptions &)
+      : TargetInfo(Triple) {
+    NoAsmVariants = true;
+    LongLongAlign = 32;
+    SuitableAlign = 32;
+    DoubleAlign = LongDoubleAlign = 32;
+    SizeType = UnsignedInt;
+    PtrDiffType = SignedInt;
+    IntPtrType = SignedInt;
+    UseZeroLengthBitfieldAlignment = true;
+    resetDataLayout("e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-"
+                    "i32:32:32-f32:32:32-i64:32-f64:32-a:0:32-n32");
+  }
+
+  void getTargetDefines(const LangOptions &Opts,
+                        MacroBuilder &Builder) const override;
+
+  ArrayRef<Builtin::Info> getTargetBuiltins() const override { return None; }
+
+  BuiltinVaListKind getBuiltinVaListKind() const override {
+    return TargetInfo::VoidPtrBuiltinVaList;
+  }
+
+  const char *getClobbers() const override { return ""; }
+
+  ArrayRef<const char *> getGCCRegNames() const override {
+    static const char *const GCCRegNames[] = {
+        "r0",  "r1",  "r2",  "r3",  "r4",  "r5",     "r6",  "r7",
+        "r8",  "r9",  "r10", "r11", "r12", "r13",    "r14", "r15",
+        "r16", "r17", "r18", "r19", "r20", "r21",    "r22", "r23",
+        "r24", "r25", "gp",  "sp",  "fp",  "ilink1", "r30", "blink"};
+    return llvm::makeArrayRef(GCCRegNames);
+  }
+
+  ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
+    return None;
+  }
+
+  bool validateAsmConstraint(const char *&Name,
+                             TargetInfo::ConstraintInfo &Info) const override {
+    return false;
+  }
+};
+
+} // namespace targets
+} // namespace clang
+
+#endif // LLVM_CLANG_LIB_BASIC_TARGETS_ARC_H
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/ARM.cpp b/contrib/llvm/tools/clang/lib/Basic/Targets/ARM.cpp
index 19fcc5abea97..16644ace108b 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/ARM.cpp
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/ARM.cpp
@@ -28,8 +28,8 @@ void ARMTargetInfo::setABIAAPCS() {
   DoubleAlign = LongLongAlign = LongDoubleAlign = SuitableAlign = 64;
   const llvm::Triple &T = getTriple();
 
-  bool IsNetBSD = T.getOS() == llvm::Triple::NetBSD;
-  bool IsOpenBSD = T.getOS() == llvm::Triple::OpenBSD;
+  bool IsNetBSD = T.isOSNetBSD();
+  bool IsOpenBSD = T.isOSOpenBSD();
   if (!T.isOSWindows() && !IsNetBSD && !IsOpenBSD)
     WCharType = UnsignedInt;
 
@@ -189,6 +189,8 @@ StringRef ARMTargetInfo::getCPUAttr() const {
     return "8_3A";
   case llvm::ARM::ArchKind::ARMV8_4A:
     return "8_4A";
+  case llvm::ARM::ArchKind::ARMV8_5A:
+    return "8_5A";
   case llvm::ARM::ArchKind::ARMV8MBaseline:
     return "8M_BASE";
   case llvm::ARM::ArchKind::ARMV8MMainline:
@@ -215,8 +217,8 @@ ARMTargetInfo::ARMTargetInfo(const llvm::Triple &Triple,
                              const TargetOptions &Opts)
     : TargetInfo(Triple), FPMath(FP_Default), IsAAPCS(true), LDREX(0),
       HW_FP(0) {
-  bool IsOpenBSD = Triple.getOS() == llvm::Triple::OpenBSD;
-  bool IsNetBSD = Triple.getOS() == llvm::Triple::NetBSD;
+  bool IsOpenBSD = Triple.isOSOpenBSD();
+  bool IsNetBSD = Triple.isOSNetBSD();
 
   // FIXME: the isOSBinFormatMachO is a workaround for identifying a Darwin-like
   // environment where size_t is `unsigned long` rather than `unsigned int`
@@ -280,9 +282,9 @@ ARMTargetInfo::ARMTargetInfo(const llvm::Triple &Triple,
       setABI("apcs-gnu");
       break;
     default:
-      if (Triple.getOS() == llvm::Triple::NetBSD)
+      if (IsNetBSD)
         setABI("apcs-gnu");
-      else if (Triple.getOS() == llvm::Triple::OpenBSD)
+      else if (IsOpenBSD)
         setABI("aapcs-linux");
       else
         setABI("aapcs");
@@ -661,7 +663,7 @@ void ARMTargetInfo::getTargetDefines(const LangOptions &Opts,
   }
 
   // ACLE 6.4.9 32-bit SIMD instructions
-  if (ArchVersion >= 6 && (CPUProfile != "M" || CPUAttr == "7EM"))
+  if ((CPUProfile != "M" && ArchVersion >= 6) || (CPUProfile == "M" && DSP))
     Builder.defineMacro("__ARM_FEATURE_SIMD32", "1");
 
   // ACLE 6.4.10 Hardware Integer Divide
@@ -994,6 +996,7 @@ WindowsARMTargetInfo::checkCallingConvention(CallingConv CC) const {
   case CC_OpenCLKernel:
   case CC_PreserveMost:
   case CC_PreserveAll:
+  case CC_Swift:
     return CCCR_OK;
   default:
     return CCCR_Warning;
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/Hexagon.cpp b/contrib/llvm/tools/clang/lib/Basic/Targets/Hexagon.cpp
index 0ef1f6db281e..94e1388e381e 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/Hexagon.cpp
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/Hexagon.cpp
@@ -25,14 +25,7 @@ void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
   Builder.defineMacro("__qdsp6__", "1");
   Builder.defineMacro("__hexagon__", "1");
 
-  if (CPU == "hexagonv4") {
-    Builder.defineMacro("__HEXAGON_V4__");
-    Builder.defineMacro("__HEXAGON_ARCH__", "4");
-    if (Opts.HexagonQdsp6Compat) {
-      Builder.defineMacro("__QDSP6_V4__");
-      Builder.defineMacro("__QDSP6_ARCH__", "4");
-    }
-  } else if (CPU == "hexagonv5") {
+  if (CPU == "hexagonv5") {
     Builder.defineMacro("__HEXAGON_V5__");
     Builder.defineMacro("__HEXAGON_ARCH__", "5");
     if (Opts.HexagonQdsp6Compat) {
@@ -55,6 +48,9 @@ void HexagonTargetInfo::getTargetDefines(const LangOptions &Opts,
   } else if (CPU == "hexagonv65") {
     Builder.defineMacro("__HEXAGON_V65__");
     Builder.defineMacro("__HEXAGON_ARCH__", "65");
+  } else if (CPU == "hexagonv66") {
+    Builder.defineMacro("__HEXAGON_V66__");
+    Builder.defineMacro("__HEXAGON_ARCH__", "66");
   }
 
   if (hasFeature("hvx-length64b")) {
@@ -150,9 +146,9 @@ struct CPUSuffix {
 };
 
 static constexpr CPUSuffix Suffixes[] = {
-    {{"hexagonv4"}, {"4"}},   {{"hexagonv5"}, {"5"}},
-    {{"hexagonv55"}, {"55"}}, {{"hexagonv60"}, {"60"}},
-    {{"hexagonv62"}, {"62"}}, {{"hexagonv65"}, {"65"}},
+    {{"hexagonv5"},  {"5"}},  {{"hexagonv55"}, {"55"}},
+    {{"hexagonv60"}, {"60"}}, {{"hexagonv62"}, {"62"}},
+    {{"hexagonv65"}, {"65"}}, {{"hexagonv66"}, {"66"}},
 };
 
 const char *HexagonTargetInfo::getHexagonCPUSuffix(StringRef Name) {
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/Mips.cpp b/contrib/llvm/tools/clang/lib/Basic/Targets/Mips.cpp
index cbd5a01c3da8..d43edeae608f 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/Mips.cpp
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/Mips.cpp
@@ -59,6 +59,16 @@ void MipsTargetInfo::fillValidCPUList(
   Values.append(std::begin(ValidCPUNames), std::end(ValidCPUNames));
 }
 
+unsigned MipsTargetInfo::getISARev() const {
+  return llvm::StringSwitch<unsigned>(getCPU())
+             .Cases("mips32", "mips64", 1)
+             .Cases("mips32r2", "mips64r2", 2)
+             .Cases("mips32r3", "mips64r3", 3)
+             .Cases("mips32r5", "mips64r5", 5)
+             .Cases("mips32r6", "mips64r6", 6)
+             .Default(0);
+}
+
 void MipsTargetInfo::getTargetDefines(const LangOptions &Opts,
                                       MacroBuilder &Builder) const {
   if (BigEndian) {
@@ -84,13 +94,8 @@ void MipsTargetInfo::getTargetDefines(const LangOptions &Opts,
     Builder.defineMacro("_MIPS_ISA", "_MIPS_ISA_MIPS64");
   }
 
-  const std::string ISARev = llvm::StringSwitch<std::string>(getCPU())
-                                 .Cases("mips32", "mips64", "1")
-                                 .Cases("mips32r2", "mips64r2", "2")
-                                 .Cases("mips32r3", "mips64r3", "3")
-                                 .Cases("mips32r5", "mips64r5", "5")
-                                 .Cases("mips32r6", "mips64r6", "6")
-                                 .Default("");
+  const std::string ISARev = std::to_string(getISARev());
+
   if (!ISARev.empty())
     Builder.defineMacro("__mips_isa_rev", ISARev);
 
@@ -129,9 +134,22 @@ void MipsTargetInfo::getTargetDefines(const LangOptions &Opts,
   if (IsSingleFloat)
     Builder.defineMacro("__mips_single_float", Twine(1));
 
-  Builder.defineMacro("__mips_fpr", HasFP64 ? Twine(64) : Twine(32));
-  Builder.defineMacro("_MIPS_FPSET",
-                      Twine(32 / (HasFP64 || IsSingleFloat ? 1 : 2)));
+  switch (FPMode) {
+  case FPXX:
+    Builder.defineMacro("__mips_fpr", Twine(0));
+    break;
+  case FP32:
+    Builder.defineMacro("__mips_fpr", Twine(32));
+    break;
+  case FP64:
+    Builder.defineMacro("__mips_fpr", Twine(64));
+    break;
+}
+
+  if (FPMode == FP64 || IsSingleFloat)
+    Builder.defineMacro("_MIPS_FPSET", Twine(32));
+  else
+    Builder.defineMacro("_MIPS_FPSET", Twine(16));
 
   if (IsMips16)
     Builder.defineMacro("__mips16", Twine(1));
@@ -189,7 +207,7 @@ void MipsTargetInfo::getTargetDefines(const LangOptions &Opts,
 bool MipsTargetInfo::hasFeature(StringRef Feature) const {
   return llvm::StringSwitch<bool>(Feature)
       .Case("mips", true)
-      .Case("fp64", HasFP64)
+      .Case("fp64", FPMode == FP64)
       .Default(false);
 }
 
@@ -235,5 +253,30 @@ bool MipsTargetInfo::validateTarget(DiagnosticsEngine &Diags) const {
     return false;
   }
 
+  // -fpxx is valid only for the o32 ABI
+  if (FPMode == FPXX && (ABI == "n32" || ABI == "n64")) {
+    Diags.Report(diag::err_unsupported_abi_for_opt) << "-mfpxx" << "o32";
+    return false;
+  }
+
+  // -mfp32 and n32/n64 ABIs are incompatible
+  if (FPMode != FP64 && FPMode != FPXX && !IsSingleFloat &&
+      (ABI == "n32" || ABI == "n64")) {
+    Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfpxx" << CPU;
+    return false;
+  }
+  // Mips revision 6 and -mfp32 are incompatible
+  if (FPMode != FP64 && FPMode != FPXX && (CPU == "mips32r6" ||
+      CPU == "mips64r6")) {
+    Diags.Report(diag::err_opt_not_valid_with_opt) << "-mfp32" << CPU;
+    return false;
+  }
+  // Option -mfp64 permitted on Mips32 iff revision 2 or higher is present
+  if (FPMode == FP64 && (CPU == "mips1" || CPU == "mips2" ||
+      getISARev() < 2) && ABI == "o32") {
+    Diags.Report(diag::err_mips_fp64_req) << "-mfp64";
+    return false;
+  }
+
   return true;
 }
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/Mips.h b/contrib/llvm/tools/clang/lib/Basic/Targets/Mips.h
index 11e9ac914430..d49f49888b0c 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/Mips.h
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/Mips.h
@@ -57,7 +57,7 @@ class LLVM_LIBRARY_VISIBILITY MipsTargetInfo : public TargetInfo {
   bool UseIndirectJumpHazard;
 
 protected:
-  bool HasFP64;
+  enum FPModeEnum { FPXX, FP32, FP64 } FPMode;
   std::string ABI;
 
 public:
@@ -66,15 +66,20 @@ public:
         IsNan2008(false), IsAbs2008(false), IsSingleFloat(false),
         IsNoABICalls(false), CanUseBSDABICalls(false), FloatABI(HardFloat),
         DspRev(NoDSP), HasMSA(false), DisableMadd4(false),
-        UseIndirectJumpHazard(false), HasFP64(false) {
+        UseIndirectJumpHazard(false), FPMode(FPXX) {
     TheCXXABI.set(TargetCXXABI::GenericMIPS);
 
-    setABI(getTriple().isMIPS32() ? "o32" : "n64");
+    if (Triple.isMIPS32())
+      setABI("o32");
+    else if (Triple.getEnvironment() == llvm::Triple::GNUABIN32)
+      setABI("n32");
+    else
+      setABI("n64");
 
     CPU = ABI == "o32" ? "mips32r2" : "mips64r2";
 
-    CanUseBSDABICalls = Triple.getOS() == llvm::Triple::FreeBSD ||
-                        Triple.getOS() == llvm::Triple::OpenBSD;
+    CanUseBSDABICalls = Triple.isOSFreeBSD() ||
+                        Triple.isOSOpenBSD();
   }
 
   bool isIEEE754_2008Default() const {
@@ -127,7 +132,7 @@ public:
   void setN32N64ABITypes() {
     LongDoubleWidth = LongDoubleAlign = 128;
     LongDoubleFormat = &llvm::APFloat::IEEEquad();
-    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
+    if (getTriple().isOSFreeBSD()) {
       LongDoubleWidth = LongDoubleAlign = 64;
       LongDoubleFormat = &llvm::APFloat::IEEEdouble();
     }
@@ -137,7 +142,7 @@ public:
 
   void setN64ABITypes() {
     setN32N64ABITypes();
-    if (getTriple().getOS() == llvm::Triple::OpenBSD) {
+    if (getTriple().isOSOpenBSD()) {
       Int64Type = SignedLongLong;
     } else {
       Int64Type = SignedLong;
@@ -181,6 +186,8 @@ public:
     return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
   }
 
+  unsigned getISARev() const;
+
   void getTargetDefines(const LangOptions &Opts,
                         MacroBuilder &Builder) const override;
 
@@ -305,7 +312,7 @@ public:
     IsSingleFloat = false;
     FloatABI = HardFloat;
     DspRev = NoDSP;
-    HasFP64 = isFP64Default();
+    FPMode = isFP64Default() ? FP64 : FPXX;
 
     for (const auto &Feature : Features) {
       if (Feature == "+single-float")
@@ -325,9 +332,11 @@ public:
       else if (Feature == "+nomadd4")
         DisableMadd4 = true;
       else if (Feature == "+fp64")
-        HasFP64 = true;
+        FPMode = FP64;
       else if (Feature == "-fp64")
-        HasFP64 = false;
+        FPMode = FP32;
+      else if (Feature == "+fpxx")
+        FPMode = FPXX;
       else if (Feature == "+nan2008")
         IsNan2008 = true;
       else if (Feature == "-nan2008")
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/NVPTX.cpp b/contrib/llvm/tools/clang/lib/Basic/Targets/NVPTX.cpp
index fd4ee1606061..ca41c4d14ca3 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/NVPTX.cpp
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/NVPTX.cpp
@@ -188,6 +188,9 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions &Opts,
       case CudaArch::GFX810:
       case CudaArch::GFX900:
       case CudaArch::GFX902:
+      case CudaArch::GFX904:
+      case CudaArch::GFX906:
+      case CudaArch::GFX909:
       case CudaArch::LAST:
         break;
       case CudaArch::UNKNOWN:
@@ -221,6 +224,8 @@ void NVPTXTargetInfo::getTargetDefines(const LangOptions &Opts,
         return "700";
       case CudaArch::SM_72:
         return "720";
+      case CudaArch::SM_75:
+        return "750";
       }
       llvm_unreachable("unhandled CudaArch");
     }();
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/Nios2.cpp b/contrib/llvm/tools/clang/lib/Basic/Targets/Nios2.cpp
deleted file mode 100644
index 48f662dd98c1..000000000000
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/Nios2.cpp
+++ /dev/null
@@ -1,56 +0,0 @@
-//===--- Nios2.cpp - Implement Nios2 target feature support ---------------===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file implements Nios2 TargetInfo objects.
-//
-//===----------------------------------------------------------------------===//
-
-#include "Nios2.h"
-#include "Targets.h"
-#include "clang/Basic/MacroBuilder.h"
-#include "clang/Basic/TargetBuiltins.h"
-#include "llvm/ADT/StringSwitch.h"
-
-using namespace clang;
-using namespace clang::targets;
-
-const Builtin::Info Nios2TargetInfo::BuiltinInfo[] = {
-#define BUILTIN(ID, TYPE, ATTRS)                                               \
-  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
-#define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE)                               \
-  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE},
-#include "clang/Basic/BuiltinsNios2.def"
-};
-
-bool Nios2TargetInfo::isFeatureSupportedByCPU(StringRef Feature,
-                                              StringRef CPU) const {
-  const bool isR2 = CPU == "nios2r2";
-  return llvm::StringSwitch<bool>(Feature)
-      .Case("nios2r2mandatory", isR2)
-      .Case("nios2r2bmx", isR2)
-      .Case("nios2r2mpx", isR2)
-      .Case("nios2r2cdx", isR2)
-      .Default(false);
-}
-
-void Nios2TargetInfo::getTargetDefines(const LangOptions &Opts,
-                                       MacroBuilder &Builder) const {
-  DefineStd(Builder, "nios2", Opts);
-  DefineStd(Builder, "NIOS2", Opts);
-
-  Builder.defineMacro("__nios2");
-  Builder.defineMacro("__NIOS2");
-  Builder.defineMacro("__nios2__");
-  Builder.defineMacro("__NIOS2__");
-}
-
-ArrayRef<Builtin::Info> Nios2TargetInfo::getTargetBuiltins() const {
-  return llvm::makeArrayRef(BuiltinInfo, clang::Nios2::LastTSBuiltin -
-                                             Builtin::FirstTSBuiltin);
-}
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/Nios2.h b/contrib/llvm/tools/clang/lib/Basic/Targets/Nios2.h
deleted file mode 100644
index ffeb414d4778..000000000000
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/Nios2.h
+++ /dev/null
@@ -1,151 +0,0 @@
-//===--- Nios2.h - Declare Nios2 target feature support ---------*- C++ -*-===//
-//
-//                     The LLVM Compiler Infrastructure
-//
-// This file is distributed under the University of Illinois Open Source
-// License. See LICENSE.TXT for details.
-//
-//===----------------------------------------------------------------------===//
-//
-// This file declares Nios2 TargetInfo objects.
-//
-//===----------------------------------------------------------------------===//
-
-#ifndef LLVM_CLANG_LIB_BASIC_TARGETS_NIOS2_H
-#define LLVM_CLANG_LIB_BASIC_TARGETS_NIOS2_H
-
-#include "clang/Basic/TargetInfo.h"
-#include "clang/Basic/TargetOptions.h"
-#include "llvm/ADT/Triple.h"
-#include "llvm/Support/Compiler.h"
-
-namespace clang {
-namespace targets {
-
-class LLVM_LIBRARY_VISIBILITY Nios2TargetInfo : public TargetInfo {
-  void setDataLayout() {
-    if (BigEndian)
-      resetDataLayout("E-p:32:32:32-i8:8:32-i16:16:32-n32");
-    else
-      resetDataLayout("e-p:32:32:32-i8:8:32-i16:16:32-n32");
-  }
-
-  static const Builtin::Info BuiltinInfo[];
-  std::string CPU;
-  std::string ABI;
-
-public:
-  Nios2TargetInfo(const llvm::Triple &triple, const TargetOptions &opts)
-      : TargetInfo(triple), CPU(opts.CPU), ABI(opts.ABI) {
-    SizeType = UnsignedInt;
-    PtrDiffType = SignedInt;
-    MaxAtomicPromoteWidth = MaxAtomicInlineWidth = 32;
-    setDataLayout();
-  }
-
-  StringRef getABI() const override { return ABI; }
-  bool setABI(const std::string &Name) override {
-    if (Name == "o32" || Name == "eabi") {
-      ABI = Name;
-      return true;
-    }
-    return false;
-  }
-
-  bool isValidCPUName(StringRef Name) const override {
-    return Name == "nios2r1" || Name == "nios2r2";
-  }
-
-  void fillValidCPUList(SmallVectorImpl<StringRef> &Values) const override {
-    Values.append({"nios2r1", "nios2r2"});
-  }
-
-  bool setCPU(const std::string &Name) override {
-    if (isValidCPUName(Name)) {
-      CPU = Name;
-      return true;
-    }
-    return false;
-  }
-
-  void getTargetDefines(const LangOptions &Opts,
-                        MacroBuilder &Builder) const override;
-
-  ArrayRef<Builtin::Info> getTargetBuiltins() const override;
-
-  bool isFeatureSupportedByCPU(StringRef Feature, StringRef CPU) const;
-
-  bool
-  initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
-                 StringRef CPU,
-                 const std::vector<std::string> &FeatureVec) const override {
-    static const char *allFeatures[] = {"nios2r2mandatory", "nios2r2bmx",
-                                        "nios2r2mpx", "nios2r2cdx"
-    };
-    for (const char *feature : allFeatures) {
-      Features[feature] = isFeatureSupportedByCPU(feature, CPU);
-    }
-    return true;
-  }
-
-  bool hasFeature(StringRef Feature) const override {
-    return isFeatureSupportedByCPU(Feature, CPU);
-  }
-
-  BuiltinVaListKind getBuiltinVaListKind() const override {
-    return TargetInfo::VoidPtrBuiltinVaList;
-  }
-
-  ArrayRef<const char *> getGCCRegNames() const override {
-    static const char *const GCCRegNames[] = {
-        // CPU register names
-        // Must match second column of GCCRegAliases
-        "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", "r8", "r9", "r10",
-        "r11", "r12", "r13", "r14", "r15", "r16", "r17", "r18", "r19", "r20",
-        "r21", "r22", "r23", "r24", "r25", "r26", "r27", "r28", "r29", "r30",
-        "r31",
-        // Floating point register names
-        "ctl0", "ctl1", "ctl2", "ctl3", "ctl4", "ctl5", "ctl6", "ctl7", "ctl8",
-        "ctl9", "ctl10", "ctl11", "ctl12", "ctl13", "ctl14", "ctl15"
-    };
-    return llvm::makeArrayRef(GCCRegNames);
-  }
-
-  bool validateAsmConstraint(const char *&Name,
-                             TargetInfo::ConstraintInfo &Info) const override {
-    switch (*Name) {
-    default:
-      return false;
-
-    case 'r': // CPU registers.
-    case 'd': // Equivalent to "r" unless generating MIPS16 code.
-    case 'y': // Equivalent to "r", backwards compatibility only.
-    case 'f': // floating-point registers.
-    case 'c': // $25 for indirect jumps
-    case 'l': // lo register
-    case 'x': // hilo register pair
-      Info.setAllowsRegister();
-      return true;
-    }
-  }
-
-  const char *getClobbers() const override { return ""; }
-
-  ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override {
-    static const TargetInfo::GCCRegAlias aliases[] = {
-        {{"zero"}, "r0"},      {{"at"}, "r1"},          {{"et"}, "r24"},
-        {{"bt"}, "r25"},       {{"gp"}, "r26"},         {{"sp"}, "r27"},
-        {{"fp"}, "r28"},       {{"ea"}, "r29"},         {{"ba"}, "r30"},
-        {{"ra"}, "r31"},       {{"status"}, "ctl0"},    {{"estatus"}, "ctl1"},
-        {{"bstatus"}, "ctl2"}, {{"ienable"}, "ctl3"},   {{"ipending"}, "ctl4"},
-        {{"cpuid"}, "ctl5"},   {{"exception"}, "ctl7"}, {{"pteaddr"}, "ctl8"},
-        {{"tlbacc"}, "ctl9"},  {{"tlbmisc"}, "ctl10"},  {{"badaddr"}, "ctl12"},
-        {{"config"}, "ctl13"}, {{"mpubase"}, "ctl14"},  {{"mpuacc"}, "ctl15"},
-    };
-    return llvm::makeArrayRef(aliases);
-  }
-};
-
-} // namespace targets
-} // namespace clang
-#endif // LLVM_CLANG_LIB_BASIC_TARGETS_NIOS2_H
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/OSTargets.cpp b/contrib/llvm/tools/clang/lib/Basic/Targets/OSTargets.cpp
index 50abd4ce0c8c..6252a51ef710 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/OSTargets.cpp
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/OSTargets.cpp
@@ -33,7 +33,7 @@ void getDarwinDefines(MacroBuilder &Builder, const LangOptions &Opts,
     Builder.defineMacro("_FORTIFY_SOURCE", "0");
 
   // Darwin defines __weak, __strong, and __unsafe_unretained even in C mode.
-  if (!Opts.ObjC1) {
+  if (!Opts.ObjC) {
     // __weak is always defined, for use in blocks and with objc pointers.
     Builder.defineMacro("__weak", "__attribute__((objc_gc(weak)))");
     Builder.defineMacro("__strong", "");
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/OSTargets.h b/contrib/llvm/tools/clang/lib/Basic/Targets/OSTargets.h
index d0354784acf9..085efa02cc5f 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/OSTargets.h
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/OSTargets.h
@@ -133,6 +133,15 @@ public:
   /// is very similar to ELF's "protected";  Darwin requires a "weak"
   /// attribute on declarations that can be dynamically replaced.
   bool hasProtectedVisibility() const override { return false; }
+
+  TargetInfo::IntType getLeastIntTypeByWidth(unsigned BitWidth,
+                                             bool IsSigned) const final {
+    // Darwin uses `long long` for `int_least64_t` and `int_fast64_t`.
+    return BitWidth == 64
+               ? (IsSigned ? TargetInfo::SignedLongLong
+                           : TargetInfo::UnsignedLongLong)
+               : TargetInfo::getLeastIntTypeByWidth(BitWidth, IsSigned);
+  }
 };
 
 // DragonFlyBSD Target
@@ -257,6 +266,8 @@ protected:
     Builder.defineMacro("__HAIKU__");
     Builder.defineMacro("__ELF__");
     DefineStd(Builder, "unix", Opts);
+    if (this->HasFloat128) 
+      Builder.defineMacro("__FLOAT128__");
   }
 
 public:
@@ -267,7 +278,38 @@ public:
     this->PtrDiffType = TargetInfo::SignedLong;
     this->ProcessIDType = TargetInfo::SignedLong;
     this->TLSSupported = false;
+    switch (Triple.getArch()) {
+    default:
+      break;
+    case llvm::Triple::x86:
+    case llvm::Triple::x86_64:
+      this->HasFloat128 = true;
+      break;
+    }
+  }
+};
+
+// Hurd target
+template <typename Target>
+class LLVM_LIBRARY_VISIBILITY HurdTargetInfo : public OSTargetInfo<Target> {
+protected:
+  void getOSDefines(const LangOptions &Opts, const llvm::Triple &Triple,
+                    MacroBuilder &Builder) const override {
+    // Hurd defines; list based off of gcc output.
+    DefineStd(Builder, "unix", Opts);
+    Builder.defineMacro("__GNU__");
+    Builder.defineMacro("__gnu_hurd__");
+    Builder.defineMacro("__MACH__");
+    Builder.defineMacro("__GLIBC__");
+    Builder.defineMacro("__ELF__");
+    if (Opts.POSIXThreads)
+      Builder.defineMacro("_REENTRANT");
+    if (Opts.CPlusPlus)
+      Builder.defineMacro("_GNU_SOURCE");
   }
+public:
+  HurdTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
+      : OSTargetInfo<Target>(Triple, Opts) {}
 };
 
 // Minix Target
@@ -303,7 +345,6 @@ protected:
     // Linux defines; list based off of gcc output
     DefineStd(Builder, "unix", Opts);
     DefineStd(Builder, "linux", Opts);
-    Builder.defineMacro("__gnu_linux__");
     Builder.defineMacro("__ELF__");
     if (Triple.isAndroid()) {
       Builder.defineMacro("__ANDROID__", "1");
@@ -313,6 +354,8 @@ protected:
       this->PlatformMinVersion = VersionTuple(Maj, Min, Rev);
       if (Maj)
         Builder.defineMacro("__ANDROID_API__", Twine(Maj));
+    } else {
+        Builder.defineMacro("__gnu_linux__");
     }
     if (Opts.POSIXThreads)
       Builder.defineMacro("_REENTRANT");
@@ -341,7 +384,6 @@ public:
       break;
     case llvm::Triple::x86:
     case llvm::Triple::x86_64:
-    case llvm::Triple::systemz:
       this->HasFloat128 = true;
       break;
     }
@@ -397,7 +439,7 @@ public:
     case llvm::Triple::x86:
     case llvm::Triple::x86_64:
       this->HasFloat128 = true;
-      // FALLTHROUGH
+      LLVM_FALLTHROUGH;
     default:
       this->MCountName = "__mcount";
       break;
@@ -643,6 +685,7 @@ public:
   WindowsTargetInfo(const llvm::Triple &Triple, const TargetOptions &Opts)
       : OSTargetInfo<Target>(Triple, Opts) {
     this->WCharType = TargetInfo::UnsignedShort;
+    this->WIntType = TargetInfo::UnsignedShort;
   }
 };
 
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/PPC.cpp b/contrib/llvm/tools/clang/lib/Basic/Targets/PPC.cpp
index b4eb3b1b97b7..6cfbed1713e1 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/PPC.cpp
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/PPC.cpp
@@ -83,8 +83,8 @@ void PPCTargetInfo::getTargetDefines(const LangOptions &Opts,
   if (getTriple().getArch() == llvm::Triple::ppc64le) {
     Builder.defineMacro("_LITTLE_ENDIAN");
   } else {
-    if (getTriple().getOS() != llvm::Triple::NetBSD &&
-        getTriple().getOS() != llvm::Triple::OpenBSD)
+    if (!getTriple().isOSNetBSD() &&
+        !getTriple().isOSOpenBSD())
       Builder.defineMacro("_BIG_ENDIAN");
   }
 
@@ -412,6 +412,36 @@ ArrayRef<TargetInfo::GCCRegAlias> PPCTargetInfo::getGCCRegAliases() const {
   return llvm::makeArrayRef(GCCRegAliases);
 }
 
+// PPC ELFABIv2 DWARF Definitoin "Table 2.26. Mappings of Common Registers".
+// vs0 ~ vs31 is mapping to 32 - 63,
+// vs32 ~ vs63 is mapping to 77 - 108. 
+const TargetInfo::AddlRegName GCCAddlRegNames[] = {
+    // Table of additional register names to use in user input.
+    {{"vs0"}, 32},   {{"vs1"}, 33},   {{"vs2"}, 34},   {{"vs3"}, 35}, 
+    {{"vs4"}, 36},   {{"vs5"}, 37},   {{"vs6"}, 38},   {{"vs7"}, 39},
+    {{"vs8"}, 40},   {{"vs9"}, 41},   {{"vs10"}, 42},  {{"vs11"}, 43},
+    {{"vs12"}, 44},  {{"vs13"}, 45},  {{"vs14"}, 46},  {{"vs15"}, 47},
+    {{"vs16"}, 48},  {{"vs17"}, 49},  {{"vs18"}, 50},  {{"vs19"}, 51},
+    {{"vs20"}, 52},  {{"vs21"}, 53},  {{"vs22"}, 54},  {{"vs23"}, 55},
+    {{"vs24"}, 56},  {{"vs25"}, 57},  {{"vs26"}, 58},  {{"vs27"}, 59},
+    {{"vs28"}, 60},  {{"vs29"}, 61},  {{"vs30"}, 62},  {{"vs31"}, 63},
+    {{"vs32"}, 77},  {{"vs33"}, 78},  {{"vs34"}, 79},  {{"vs35"}, 80},
+    {{"vs36"}, 81},  {{"vs37"}, 82},  {{"vs38"}, 83},  {{"vs39"}, 84},
+    {{"vs40"}, 85},  {{"vs41"}, 86},  {{"vs42"}, 87},  {{"vs43"}, 88},
+    {{"vs44"}, 89},  {{"vs45"}, 90},  {{"vs46"}, 91},  {{"vs47"}, 92},
+    {{"vs48"}, 93},  {{"vs49"}, 94},  {{"vs50"}, 95},  {{"vs51"}, 96},
+    {{"vs52"}, 97},  {{"vs53"}, 98},  {{"vs54"}, 99},  {{"vs55"}, 100},
+    {{"vs56"}, 101}, {{"vs57"}, 102}, {{"vs58"}, 103}, {{"vs59"}, 104},
+    {{"vs60"}, 105}, {{"vs61"}, 106}, {{"vs62"}, 107}, {{"vs63"}, 108},
+};
+
+ArrayRef<TargetInfo::AddlRegName> PPCTargetInfo::getGCCAddlRegNames() const {
+  if (ABI == "elfv2")
+    return llvm::makeArrayRef(GCCAddlRegNames);
+  else 
+    return TargetInfo::getGCCAddlRegNames(); 
+}
+
 static constexpr llvm::StringLiteral ValidCPUNames[] = {
     {"generic"}, {"440"},         {"450"},     {"601"},    {"602"},
     {"603"},     {"603e"},        {"603ev"},   {"604"},    {"604e"},
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/PPC.h b/contrib/llvm/tools/clang/lib/Basic/Targets/PPC.h
index 439c73a0e326..058970a0e098 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/PPC.h
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/PPC.h
@@ -176,6 +176,8 @@ public:
 
   ArrayRef<TargetInfo::GCCRegAlias> getGCCRegAliases() const override;
 
+  ArrayRef<TargetInfo::AddlRegName> getGCCAddlRegNames() const override;
+
   bool validateAsmConstraint(const char *&Name,
                              TargetInfo::ConstraintInfo &Info) const override {
     switch (*Name) {
@@ -201,6 +203,7 @@ public:
       case 's': // VSX vector register to hold scalar float data
       case 'a': // Any VSX register
       case 'c': // An individual CR bit
+      case 'i': // FP or VSX register to hold 64-bit integers data
         break;
       default:
         return false;
@@ -328,7 +331,7 @@ public:
       break;
     }
 
-    if (getTriple().getOS() == llvm::Triple::FreeBSD) {
+    if (getTriple().isOSFreeBSD()) {
       LongDoubleWidth = LongDoubleAlign = 64;
       LongDoubleFormat = &llvm::APFloat::IEEEdouble();
     }
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/Sparc.h b/contrib/llvm/tools/clang/lib/Basic/Targets/Sparc.h
index af2189f21468..5ae305bffb43 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/Sparc.h
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/Sparc.h
@@ -199,7 +199,7 @@ public:
     LongWidth = LongAlign = PointerWidth = PointerAlign = 64;
 
     // OpenBSD uses long long for int64_t and intmax_t.
-    if (getTriple().getOS() == llvm::Triple::OpenBSD)
+    if (getTriple().isOSOpenBSD())
       IntMaxType = SignedLongLong;
     else
       IntMaxType = SignedLong;
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/WebAssembly.cpp b/contrib/llvm/tools/clang/lib/Basic/Targets/WebAssembly.cpp
index b8a2a092aff4..2fdc84bb8cc8 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/WebAssembly.cpp
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/WebAssembly.cpp
@@ -24,6 +24,8 @@ using namespace clang::targets;
 const Builtin::Info WebAssemblyTargetInfo::BuiltinInfo[] = {
 #define BUILTIN(ID, TYPE, ATTRS)                                               \
   {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, nullptr},
+#define TARGET_BUILTIN(ID, TYPE, ATTRS, FEATURE)                               \
+  {#ID, TYPE, ATTRS, nullptr, ALL_LANGUAGES, FEATURE},
 #define LIBBUILTIN(ID, TYPE, ATTRS, HEADER)                                    \
   {#ID, TYPE, ATTRS, HEADER, ALL_LANGUAGES, nullptr},
 #include "clang/Basic/BuiltinsWebAssembly.def"
@@ -35,6 +37,7 @@ static constexpr llvm::StringLiteral ValidCPUNames[] = {
 bool WebAssemblyTargetInfo::hasFeature(StringRef Feature) const {
   return llvm::StringSwitch<bool>(Feature)
       .Case("simd128", SIMDLevel >= SIMD128)
+      .Case("unimplemented-simd128", SIMDLevel >= UnimplementedSIMD128)
       .Case("nontrapping-fptoint", HasNontrappingFPToInt)
       .Case("sign-ext", HasSignExt)
       .Case("exception-handling", HasExceptionHandling)
@@ -55,6 +58,44 @@ void WebAssemblyTargetInfo::getTargetDefines(const LangOptions &Opts,
   defineCPUMacros(Builder, "wasm", /*Tuning=*/false);
   if (SIMDLevel >= SIMD128)
     Builder.defineMacro("__wasm_simd128__");
+  if (SIMDLevel >= UnimplementedSIMD128)
+    Builder.defineMacro("__wasm_unimplemented_simd128__");
+}
+
+void WebAssemblyTargetInfo::setSIMDLevel(llvm::StringMap<bool> &Features,
+                                         SIMDEnum Level) {
+  switch (Level) {
+  case UnimplementedSIMD128:
+    Features["unimplemented-simd128"] = true;
+    LLVM_FALLTHROUGH;
+  case SIMD128:
+    Features["simd128"] = true;
+    LLVM_FALLTHROUGH;
+  case NoSIMD:
+    break;
+  }
+}
+
+bool WebAssemblyTargetInfo::initFeatureMap(
+    llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags, StringRef CPU,
+    const std::vector<std::string> &FeaturesVec) const {
+  if (CPU == "bleeding-edge") {
+    Features["nontrapping-fptoint"] = true;
+    Features["sign-ext"] = true;
+    setSIMDLevel(Features, SIMD128);
+  }
+  // Other targets do not consider user-configured features here, but while we
+  // are actively developing new features it is useful to let user-configured
+  // features control availability of builtins
+  setSIMDLevel(Features, SIMDLevel);
+  if (HasNontrappingFPToInt)
+    Features["nontrapping-fptoint"] = true;
+  if (HasSignExt)
+    Features["sign-ext"] = true;
+  if (HasExceptionHandling)
+    Features["exception-handling"] = true;
+
+  return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
 }
 
 bool WebAssemblyTargetInfo::handleTargetFeatures(
@@ -68,6 +109,14 @@ bool WebAssemblyTargetInfo::handleTargetFeatures(
       SIMDLevel = std::min(SIMDLevel, SIMDEnum(SIMD128 - 1));
       continue;
     }
+    if (Feature == "+unimplemented-simd128") {
+      SIMDLevel = std::max(SIMDLevel, SIMDEnum(UnimplementedSIMD128));
+      continue;
+    }
+    if (Feature == "-unimplemented-simd128") {
+      SIMDLevel = std::min(SIMDLevel, SIMDEnum(UnimplementedSIMD128 - 1));
+      continue;
+    }
     if (Feature == "+nontrapping-fptoint") {
       HasNontrappingFPToInt = true;
       continue;
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/WebAssembly.h b/contrib/llvm/tools/clang/lib/Basic/Targets/WebAssembly.h
index c04c5cb6fb3a..3dea9a373cb4 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/WebAssembly.h
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/WebAssembly.h
@@ -28,7 +28,8 @@ class LLVM_LIBRARY_VISIBILITY WebAssemblyTargetInfo : public TargetInfo {
   enum SIMDEnum {
     NoSIMD,
     SIMD128,
-  } SIMDLevel;
+    UnimplementedSIMD128,
+  } SIMDLevel = NoSIMD;
 
   bool HasNontrappingFPToInt;
   bool HasSignExt;
@@ -59,18 +60,12 @@ protected:
                         MacroBuilder &Builder) const override;
 
 private:
+  static void setSIMDLevel(llvm::StringMap<bool> &Features, SIMDEnum Level);
+
   bool
   initFeatureMap(llvm::StringMap<bool> &Features, DiagnosticsEngine &Diags,
                  StringRef CPU,
-                 const std::vector<std::string> &FeaturesVec) const override {
-    if (CPU == "bleeding-edge") {
-      Features["simd128"] = true;
-      Features["nontrapping-fptoint"] = true;
-      Features["sign-ext"] = true;
-    }
-    return TargetInfo::initFeatureMap(Features, Diags, CPU, FeaturesVec);
-  }
-
+                 const std::vector<std::string> &FeaturesVec) const override;
   bool hasFeature(StringRef Feature) const final;
 
   bool handleTargetFeatures(std::vector<std::string> &Features,
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/X86.cpp b/contrib/llvm/tools/clang/lib/Basic/Targets/X86.cpp
index e295cff9d5d2..53b4c153e952 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/X86.cpp
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/X86.cpp
@@ -142,7 +142,6 @@ bool X86TargetInfo::initFeatureMap(
     setFeatureEnabledImpl(Features, "gfni", true);
     setFeatureEnabledImpl(Features, "vpclmulqdq", true);
     setFeatureEnabledImpl(Features, "avx512bitalg", true);
-    setFeatureEnabledImpl(Features, "avx512vnni", true);
     setFeatureEnabledImpl(Features, "avx512vbmi2", true);
     setFeatureEnabledImpl(Features, "avx512vpopcntdq", true);
     setFeatureEnabledImpl(Features, "rdpid", true);
@@ -152,6 +151,12 @@ bool X86TargetInfo::initFeatureMap(
     setFeatureEnabledImpl(Features, "avx512vbmi", true);
     setFeatureEnabledImpl(Features, "sha", true);
     LLVM_FALLTHROUGH;
+  case CK_Cascadelake:
+    //Cannonlake has no VNNI feature inside while Icelake has
+    if (Kind != CK_Cannonlake)
+      // CLK inherits all SKX features plus AVX512_VNNI
+      setFeatureEnabledImpl(Features, "avx512vnni", true);
+    LLVM_FALLTHROUGH;
   case CK_SkylakeServer:
     setFeatureEnabledImpl(Features, "avx512f", true);
     setFeatureEnabledImpl(Features, "avx512cd", true);
@@ -166,10 +171,12 @@ bool X86TargetInfo::initFeatureMap(
     setFeatureEnabledImpl(Features, "xsavec", true);
     setFeatureEnabledImpl(Features, "xsaves", true);
     setFeatureEnabledImpl(Features, "mpx", true);
-    if (Kind != CK_SkylakeServer) // SKX inherits all SKL features, except SGX
+    if (Kind != CK_SkylakeServer
+        && Kind != CK_Cascadelake)
+      // SKX/CLX inherits all SKL features, except SGX
       setFeatureEnabledImpl(Features, "sgx", true);
     setFeatureEnabledImpl(Features, "clflushopt", true);
-    setFeatureEnabledImpl(Features, "rtm", true);
+    setFeatureEnabledImpl(Features, "aes", true);
     LLVM_FALLTHROUGH;
   case CK_Broadwell:
     setFeatureEnabledImpl(Features, "rdseed", true);
@@ -196,7 +203,6 @@ bool X86TargetInfo::initFeatureMap(
     setFeatureEnabledImpl(Features, "xsaveopt", true);
     LLVM_FALLTHROUGH;
   case CK_Westmere:
-    setFeatureEnabledImpl(Features, "aes", true);
     setFeatureEnabledImpl(Features, "pclmul", true);
     LLVM_FALLTHROUGH;
   case CK_Nehalem:
@@ -248,10 +254,10 @@ bool X86TargetInfo::initFeatureMap(
     setFeatureEnabledImpl(Features, "clflushopt", true);
     setFeatureEnabledImpl(Features, "mpx", true);
     setFeatureEnabledImpl(Features, "fsgsbase", true);
+    setFeatureEnabledImpl(Features, "aes", true);
     LLVM_FALLTHROUGH;
   case CK_Silvermont:
     setFeatureEnabledImpl(Features, "rdrnd", true);
-    setFeatureEnabledImpl(Features, "aes", true);
     setFeatureEnabledImpl(Features, "pclmul", true);
     setFeatureEnabledImpl(Features, "sse4.2", true);
     setFeatureEnabledImpl(Features, "prfchw", true);
@@ -281,7 +287,6 @@ bool X86TargetInfo::initFeatureMap(
     setFeatureEnabledImpl(Features, "lzcnt", true);
     setFeatureEnabledImpl(Features, "bmi", true);
     setFeatureEnabledImpl(Features, "bmi2", true);
-    setFeatureEnabledImpl(Features, "rtm", true);
     setFeatureEnabledImpl(Features, "fma", true);
     setFeatureEnabledImpl(Features, "rdrnd", true);
     setFeatureEnabledImpl(Features, "f16c", true);
@@ -796,8 +801,6 @@ bool X86TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
       HasCLDEMOTE = true;
     } else if (Feature == "+rdpid") {
       HasRDPID = true;
-    } else if (Feature == "+retpoline") {
-      HasRetpoline = true;
     } else if (Feature == "+retpoline-external-thunk") {
       HasRetpolineExternalThunk = true;
     } else if (Feature == "+sahf") {
@@ -862,6 +865,11 @@ bool X86TargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
 /// definitions for this particular subtarget.
 void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
                                      MacroBuilder &Builder) const {
+  std::string CodeModel = getTargetOpts().CodeModel;
+  if (CodeModel == "default")
+    CodeModel = "small";
+  Builder.defineMacro("__code_model_" + CodeModel + "_");
+
   // Target identification.
   if (getTriple().getArch() == llvm::Triple::x86_64) {
     Builder.defineMacro("__amd64__");
@@ -948,6 +956,7 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
   case CK_Broadwell:
   case CK_SkylakeClient:
   case CK_SkylakeServer:
+  case CK_Cascadelake:
   case CK_Cannonlake:
   case CK_IcelakeClient:
   case CK_IcelakeServer:
@@ -1083,6 +1092,9 @@ void X86TargetInfo::getTargetDefines(const LangOptions &Opts,
   if (HasMWAITX)
     Builder.defineMacro("__MWAITX__");
 
+  if (HasMOVBE)
+    Builder.defineMacro("__MOVBE__");
+
   switch (XOPLevel) {
   case XOP:
     Builder.defineMacro("__XOP__");
@@ -1397,7 +1409,6 @@ bool X86TargetInfo::hasFeature(StringRef Feature) const {
       .Case("rdpid", HasRDPID)
       .Case("rdrnd", HasRDRND)
       .Case("rdseed", HasRDSEED)
-      .Case("retpoline", HasRetpoline)
       .Case("retpoline-external-thunk", HasRetpolineExternalThunk)
       .Case("rtm", HasRTM)
       .Case("sahf", HasLAHFSAHF)
@@ -1678,6 +1689,7 @@ bool X86TargetInfo::validateOperandSize(StringRef Constraint,
         return false;
       break;
     }
+    LLVM_FALLTHROUGH;
   case 'v':
   case 'x':
     if (SSELevel >= AVX512F)
diff --git a/contrib/llvm/tools/clang/lib/Basic/Targets/X86.h b/contrib/llvm/tools/clang/lib/Basic/Targets/X86.h
index 1d23b0ef6933..05930ae9eec0 100644
--- a/contrib/llvm/tools/clang/lib/Basic/Targets/X86.h
+++ b/contrib/llvm/tools/clang/lib/Basic/Targets/X86.h
@@ -98,7 +98,6 @@ class LLVM_LIBRARY_VISIBILITY X86TargetInfo : public TargetInfo {
   bool HasMOVBE = false;
   bool HasPREFETCHWT1 = false;
   bool HasRDPID = false;
-  bool HasRetpoline = false;
   bool HasRetpolineExternalThunk = false;
   bool HasLAHFSAHF = false;
   bool HasWBNOINVD = false;
@@ -226,6 +225,7 @@ public:
     case 'Y':
       if ((++I != E) && ((*I == '0') || (*I == 'z')))
         return "xmm0";
+      break;
     default:
       break;
     }
@@ -291,9 +291,6 @@ public:
     return checkCPUKind(CPU = getCPUKind(Name));
   }
 
-  bool supportsMultiVersioning() const override {
-    return getTriple().isOSBinFormatELF();
-  }
   unsigned multiVersionSortPriority(StringRef Name) const override;
 
   bool setFPMath(StringRef Name) override;